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Электронный компонент: RF2609

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!
NO
T FOR NEW DESIGNS
10-9
10
IF
AMP
L
IE
R
S
Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7625 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
Se
e Up
gra
ded Pr
odu
cts RF2
619 &
RF2
629
1
2
3
4
5
6
7
8
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
CDMA+
CDMA-
GND
GND
GND
GND
GND
NC
GC
VCC
VCC
VCC
GND
GND
OUT+
OUT-
GAIN
CONTROL
.244
.228
.050
.016
8MAX
0MIN
.010
.008
.157
.150
.025
.196
.189
1
.012
.008
.009
.069
.053
.010
.004
RF2609
CDMA/FM TRANSMIT AGC AMPLIFIER
CDMA/FM Cellular Systems
Supports Dual-Mode AMPS/CDMA
Supports Dual-Mode TACS/CDMA
General Purpose Linear IF Amplifier
Portable Battery Powered Equipment
Commercial and Consumer Systems
The RF2609 is a complete AGC amplifier designed for
the transmit section of dual-mode CDMA/FM cellular
applications. It is designed to amplify IF signals while pro-
viding more than 84dB of gain control range. Noise Fig-
ure, IP3, and other specifications are designed to be
compatible with the IS-95 Interim Standard for CDMA cel-
lular communications. This circuit is designed as part of
the RFMD CDMA Chip Set, consisting of this Transmit IF
AGC Amp, a Transmit Upconverter, a Receive LNA/Mixer,
and a Receive IF AGC Amp. The IC is manufactured on
an advanced high frequency Silicon Bipolar process and
is packaged in a standard miniature 16-lead plastic SSOP
package.
Supports Dual Mode Operation
-48dB to +42dB Gain Control Range
IS-95 CDMA Compatible
Monolithic Construction
12MHz to 175MHz Operation
Miniature Surface Mount Package
RF2609
CDMA/FM Transmit AGC Amplifier
RF2609 PCBA
Fully Assembled Evaluation Board
10
Rev B3 000822
Package Style: SSOP-16
10-10
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
Absolute Maximum Ratings
Parameter
Rating
Unit
Supply Voltage
-0.5 to +7.0
V
DC
Control Voltage
-0.5 to +5.0
V
Input Power Levels
+10
dBm
Operating Ambient Temperature
-40 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
T = 25C, 130MHz, V
CC
= 3.6V, Z
S
=1k
,
Z
L
=1k
, 1k
External Output Terminating
Resistor (Effective Z
L
=500
) (See Applica-
tion Example)
Frequency Range
12 to 175
MHz
Maximum Gain
+39
+42
dB
V
GC
=2.76V
Minimum Gain
-48
-45
dB
V
GC
= 0.2V
Gain Slope
47
dB/V
Measured in 0.5V increments
Gain Control Voltage Range
0 to 3
V
DC
Gain Control Input Impedance
30
k
Noise Figure
10
dB
At maximum gain and 130MHz
Input IP3
-26
-25
dBm
At +10 gain and referenced to 1k
Input Impedance
1
k
Differential
Stability (Max VSWR)
10:1
Spurious< -70dBm
Power Supply
Voltage
3.3 to 3.6
V
Current Consumption
23
25
mA
Maximum gain
Current Consumption
22
mA
Minimum gain
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
10-11
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
Pin
Function
Description
Interface Schematic
1
CDMA+
CDMA Balanced Input Pin. This pin is internally DC biased and should
be DC blocked if connected to a device with a DC level, other than V
CC
,
present. A DC to connection to V
CC
is acceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input
is AC coupled to ground. The balanced input impedance is 1k
, while
the single-ended input impedance is 500
.
2
CDMA-
Same as pin 2, except complementary input.
See pin 1 schematic.
3
GND
Ground connection. Keep traces physically short and connect immedi-
ately to ground plane for best performance.
4
GND
Same as pin 3.
5
GND
Same as pin 3.
6
GND
Same as pin 3.
7
GND
Same as pin 3.
8
NC
No Connection pin. This pin is internally biased and should not be con-
nected to any external circuitry, including ground or V
CC
.
9
OUT-
Balanced Output pin. This is an open-collector output, designed to
operate into a 500
balanced load. The load sets the operating imped-
ance, but an external choke or matching inductor to V
CC
must also be
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to V
CC
, a DC blocking capacitor must
be used if the next stage's input has a DC path to ground.
10
OUT+
Same as pin 9, except complementary output.
See pin 9 schematic.
11
GND
Same as pin 3.
12
GND
Same as pin 3.
13
VCC
Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane. Pins 13, 14, and 15 may share one bypass capacitor if
trace lengths are kept minimal.
14
VCC
Same as pin 13.
15
VCC
Same as pin 13.
16
GC
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are valid only for a 3.3k
DC source
impedance.
580
V
CC
580
CDMA-
CDMA+
OUT-
OUT+
23.5 k
15 k
12.7 k
V
CC
10-12
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
Application Schematic
1
2
3
4
5
6
7
8
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
10 nF
10 nF
R2:
1 k
C2
C2
L1
C1
L1
C1
V
CC
10 nF
V
CC
CDMA Filter
OUT+
OUT-
IN+
IN-
Measurement
Reference Plane
Z
IN
=1 k
Z
S
=1 k
Z
OUT
=1 k
Z
LOAD
=1 k
R2 sets the balanced output impedance to 1 k
. L1 and C2
serve dual purposes. L1 serves as an output bias choke,
and C2 serves as a series DC block. In addition, the values
of L1 and C2 may be chosen to form an impedance
matching network if the load impedance is not 1k
.
Otherwise, the values of L1 and C1 are chosen to form a
parallel-resonant tank circuit at the IF when the IF filter's
input impedance is 1 k
.
Z
LOAD,EFF
=500
Measurement
Reference Plane
10 nF
10 nF
3.3 k
GAIN
GAIN
CONTROL
10-13
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
Evaluation Board Schematic
(Download Bill of Materials from www.rfmd.com.)
1
2
3
4
5
6
7
8
1 6
1 5
1 4
1 3
1 2
1 1
1 0
9
GAIN
CONTROL
T1
C1
5.1 pF
C3
0.01
F
C2
5.1 pF
C4
0.01
F
50
strip
SMA
J1
L2
270 nH
L1
270 nH
R1
3.3 k
C12
0.01
F
P1-3
P1-1
C10
0.01
F
C11
0.01
F
L4
100 nH
C9
20 pF
C8
36 pF
T2
WB3040
R2
1k
C5
36 pF
L3
100 nH
C6
0.01
F
P1-1
C7
20 pF
50
strip
SMA
J2
2609400A
CDMA
OUT
1
2
3
P1-1
P1-3
VCC
GND
P1
GC
10-14
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
Evaluation Board Layout
10-15
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
RF2609 IIP3 vs. Gain
(Vcc=3.6 V, 130 MHz)
-50
-40
-30
-20
-10
0
10
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dB)
IIP3 (dB)
-30 C
+25 C
+80 C
RF2609 Gain vs. Gain Control Voltage
(Vcc=3.6 V, 130 MHz)
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
GC (volts)
Gain (dB)
+25C
-30C
+80C
RF2609 Noise Figure vs. Gain
(Vcc=3.6 V, 130 MHz)
0
10
20
30
40
50
60
70
80
-60
-40
-20
0
20
40
60
Gain (dB)
Noise Figure (dB)
RF2609 OIP3 vs. Gain
(Vcc=3.6 V, 130 MHz)
-70
-60
-50
-40
-30
-20
-10
0
10
20
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dB)
OIP3 (dB)
-30 C
+25 C
+85 C
RF2609 Gain vs. Gain Control Voltage
(Vcc=3.3 V, 130 MHz)
-60
-50
-40
-30
-20
-10
0
10
20
30
40
50
60
0.0
0.5
1.0
1.5
2.0
2.5
3.0
GC (volts)
Gain (dB)
-30 C
+25 C
+85 C
RF2609 OIP3 vs. Gain
(Vcc=3.3 V, 130 MHz)
-70
-60
-50
-40
-30
-20
-10
0
10
20
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dB)
OIP3 (dB)
-30 C
+25 C
85 C
10-16
RF2609
Rev B3 000822
10
IF
AMP
L
IE
R
S
NO
T FOR NEW DESIGNS
See Upg
ra
ded Pr
odu
cts RF26
19 & RF2
629
RF2609 IIP3 vs. Gain
(Vcc=3.3 V, 130 MHz)
-50
-40
-30
-20
-10
0
10
-60.0
-40.0
-20.0
0.0
20.0
40.0
60.0
Gain (dB)
IIP3 (dB)
-30 C
+25 C
+85 C