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Product Description
Ordering Information
Typical Applications
Features
Functional Block Diagram
RF Micro Devices, Inc.
7628 Thorndike Road
Greensboro, NC 27409, USA
Tel (336) 664 1233
Fax (336) 664 0454
http://www.rfmd.com
Optimum Technology Matching Applied
Si BJT
GaAs MESFET
GaAs HBT
Si Bi-CMOS
SiGe HBT
Si CMOS
InGaP/HBT
GaN HEMT
SiGe Bi-CMOS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CDMA+
CDMA-
GND
FM+
FM-
GND
IN SELECT
NC
GC
VCC
VCC
VCC
GND
GND
OUT+
OUT-
GAIN
CONTROL
IN
SEL.
RF2617
3V CDMA/FM RECEIVE AGC AMPLIFIER
3V CDMA/FM Cellular Systems
Supports Dual-Mode AMPS/CDMA
Supports Dual-Mode TACS/CDMA
General Purpose Linear IF Amplifier
Commercial and Consumer Systems
Portable Battery Powered Equipment
The RF2617 is a complete AGC amplifier designed for
the receive section of 3V dual-mode CDMA/FM cellular
applications. It is designed to amplify IF signals while pro-
viding more than 90dB of gain control range. Noise Fig-
ure, IP
3
, and other specifications are designed to be
compatible with the IS-95 Interim Standard for CDMA cel-
lular communications. This circuit is designed as part of
the RFMD CDMA Chip Set, consisting of a Transmit IF
AGC Amp, a Transmit Upconverter, a Receive LNA/Mixer,
and this Receive IF AGC Amp. The IC is manufactured on
an advanced high frequency Silicon Bipolar process, and
is packaged in a standard miniature 16-lead plastic SSOP
package.
Supports Dual Mode Operation
-48dB to +48dB Gain Control Range
Single 3V Power Supply
Digitally Selectable Inputs
-2dBm Input IP
3
12MHz to 285MHz Operation
RF2617
3V CDMA/FM Receive AGC Amplifier
RF2617 PCBA
Fully Assembled Evaluation Board
0
Rev B5 021008
0.157
0.150
0.025
0.012
0.008
0.196
0.189
0.2440
0.2284
0.0688
0.0532
0.050
0.016
0.0098
0.0075
8 MAX
0MIN
NOTES:
1. Shaded lead is Pin 1.
2. All dimensions are excluding mold flash.
3. Lead coplanarity - 0.005 with respect to datum "A".
-A-
0.0098
0.0040
Package Style: SSOP-16
NOT FOR NEW DESIGNS
!
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Absolute Maximum Ratings
Parameter
Value
Unit
Supply Voltage
-0.5 to +7.0
V
DC
Control Voltage
-0.5 to +5.0
V
DC
Input RF Power
+10
dBm
Operating Ambient Temperature
-40 to +85
C
Storage Temperature
-40 to +150
C
Parameter
Specification
Unit
Condition
Min.
Typ.
Max.
Overall
T=25C, 85MHz, V
CC
=3.0V, Z
S
=500
,
Z
L
=500
, 500
External CDMA Input Ter-
minating Resistor, 500
External Output
Terminating Resistor (Effective Z
S
=333
,
Effective Z
L
=250
) (See application sche-
matic).
Frequency Range
12 to 285
MHz
CDMA Maximum Gain
+45
+48
dB
V
GC
=2.4V
CDMA Minimum Gain
-48
-45
dB
V
GC
=0.3V
FM Maximum Gain
+45
+49
dB
V
GC
=2.4V
FM Minimum Gain
-48
-45
dB
V
GC
=0.3V
Gain Slope
57
dB/V
Measured in 0.5V increments
Gain Control Voltage Range
0 to 3
V
DC
Source impedance of 4.7k
Gain Control Input Impedance
30
k
Noise Figure
5
8
dB
At maximum gain and 85MHz
Input IP
3
-44
-40
dBm
At +40dB gain, referenced to 500
-4
-2
dBm
At minimum gain, referenced to 500
Stability (Max VSWR)
10:1
Spurious<-70dBm
IF Input
Input Impedance
1
k
CDMA, differential
Input Impedance
850
FM, single-ended
CDMA to FM Isolation
30
dB
Power Supply
Voltage
2.7 to 3.3
V
Current Consumption
13
15
mA
Minimum gain, V
CC
=3.0V
Current Consumption
14
16
mA
Maximum gain, V
CC
=3.0V
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate
at the time of this printing. However, RF Micro Devices reserves the right to
make changes to its products without notice. RF Micro Devices does not
assume responsibility for the use of the described product(s).
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Pin
Function
Description
Interface Schematic
1
CDMA+
CDMA balanced input pin. This pin is internally DC-biased and should
be DC-blocked if connected to a device with a DC level other than V
CC
present. A DC to connection to V
CC
is acceptable. For single-ended
input operation, one pin is used as an input and the other CDMA input
is AC-coupled to ground. The balanced input impedance is 1k
, while
the single-ended input impedance is 500
.
2
CDMA-
Same as pin 2, except complementary input.
See pin 1.
3
GND
Ground connection. For best performance, keep traces physically short
and connect immediately to ground plane.
4
FM+
FM balanced input pin. This pin is internally DC-biased and should be
DC-blocked if connected to a device with DC present. For single-ended
input operation, one pin is used as an input and the other FM input is
AC-coupled to ground. The balanced input impedance is 1.7k
, while
the single-ended input impedance is 850
.
5
FM-
Same as pin 4, except complementary input.
See pin 4.
6
GND
Same as pin 3.
7
IN SELECT
Selects which IF input (CDMA or FM) is used. This is a digitally con-
trolled input. A logic "high" selects the CDMA input amplifier. A logic
"low" selects the FM input amplifier. The threshold voltage is approxi-
mately 1.3V.
8
NC
No connection pin. This pin is internally biased and should not be con-
nected to any external circuitry, including ground or V
CC
.
9
OUT-
Balanced output pin. This is an open-collector output, designed to
operate into a 250
balanced load. The load sets the operating imped-
ance, but an external choke or matching inductor to V
CC
must also be
supplied in order to correctly bias this output. This bias inductor is typi-
cally incorporated in the matching network between the output and next
stage. Because this pin is biased to V
CC
, a DC-blocking capacitor must
be used if the next stage's input has a DC path to ground.
10
OUT+
Same as pin 9, except complementary output.
See pin 9.
11
GND
Same as pin 3.
12
GND
Same as pin 3.
13
VCC
Supply Voltage pin. External bypassing is required. The trace length
between the pin and the bypass capacitors should be minimized. The
ground side of the bypass capacitors should connect immediately to
ground plane.
14
VCC
Same as pin 13.
15
VCC
Same as pin 13.
16
GC
Analog gain adjustment for all amplifiers. Valid control ranges are from
0V to 3.0V. Maximum gain is selected with 3.0V. Minimum gain is
selected with 0V. These voltages are only valid for a 4.7k
DC source
impedance.
700
BIAS
700
CDMA-
CDMA+
650
BIAS
650
FM-
FM+
20 k
IN SELECT
OUT-
OUT+
23.5 k
15 k
12.7 k
V
CC
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Application Schematic
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
GAIN
CONTROL
IN
SEL.
10 nF
CDMA-
FM IN
CDMA+
IF IN
SELECT
4.7 k
GC
10 nF
L1
L1
V
CC
OUT+
OUT-
V
CC
R2
500
C1
C2
Measurement
Reference Plane
Z
LOAD
=500
Z
S
=500
Z
IN, EFF
=500
Z
IN
=1 k
Z
S
=850
Z
S, EFF
=333
Z
IN
=850
Measurement
Reference Plane
Z
LOAD,EFF
=250
Z
OUT
=500
R1 sets the CDMA balanced input impedance. The effective input impedance is then 500
.
R2 sets the balanced output impedance to 500
. L1 and C2 serve dual purposes. L1 serves
as an output bias choke, and C2 serves as a series DC block. In addition, the values of L1
and C2 may be chosen to form an impedance matching network of the load impedance is not
500
. Otherwise, the values of L1 and C1 are chosen to form a parallel-resonant tank circuit
at the IF when the load impedance is 500
.
10 nF
10 nF
FM IF Filter
CDMA IF Filter
R1
1 k
C2
C1
C2
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