1
Memory ICs
2,048-Bit Serial Electrically Erasable PROM
BR93LC56 / BR93LC56F / BR93LC56RF / BR93LC56FV
Features
Low power CMOS technology
128
16 bit configuration
2.7V to 5.5V operation
Low power dissipation
3mA (max.) active current: 5V
5
A (max.) standby current: 5V
Auto increment for efficient data bump
Automatic erase-before-write
Hardware and software write protection
Default to write-disabled state at power up
Software instructions for write-enable / disable
Vcc lock out inadvertent write protection
8-pin SOP / 8-pin SSOP-B / 8-pin DIP packages
Device status signal during write cycle
TTL compatible Input / Output
100,000 ERASE / write cycles
10 years Data Retention
Pin assignments
Pin descriptions
1
2
3
4
8
7
6
5
CS
SK
DI
DO
V
CC
N.C.
N.C.
GND
BR93LC56 /
BR93LC56RF
1
2
3
4
8
7
6
5
N.C.
V
CC
CS
SK
N.C.
GND
DO
DI
BR93LC56F /
BR93LC56FV
CS
SK
DI
DO
GND
N.C.
N.C.
V
CC
Pin
name
Function
Chip select input
Serial clock input
Start bit, operating code, address, and serial
data input
Serial data output, READY / BUSY internal
status display output
Ground
Not connected
Not connected
Power supply
Overview
The BR93LC56 is CMOS serial input / output-type memory circuits (EEPROMs) that can be programmed electrically.
Each is configured of 128 words
16 bits (2,048 bits), and each word can be accessed individually and data read
from it and written to it.
Operation control is performed using five types of commands. The commands, addresses, and data are input
through the DI pin under the control of the CS and SK pins. In a write operation, the internal status signal (READY or
BUSY) can be output from the DO pin.
The only difference between the BR93LC56 / F / RF / FV is the write disable voltage and its accompanying write
enable voltage. All other functions and characteristics are the same.
2
Memory ICs
BR93LC56 / BR93LC56F / BR93LC56RF / BR93LC56FV
Block diagram
16bit
16bit
7bit
7bit
CS
SK
DI
DO
Command decode
Control
Clock generation
Command
register
Dummy bit
Address
buffer
Data
register
Power supply
voltage detector
Write
disable
High voltage
generator
Address
decoder
R / W
amplifier
2,048-bit
EEPROM array
Absolute maximum ratings (Ta = 25C)
Parameter
Symbol
Limits
Unit
V
CC
0.3 ~ + 6.5
V
BR93LC56
Pd
500
1
mW
BR93LC56F / RF
350
2
300
3
Tstg
65 ~ + 125
C
BR93LC56FV
Topr
40 ~ + 85
C
--
0.3 ~ V
CC
+ 0.3
V
Applied voltage
Power
dissipation
Storage temperature
Operating temperature
Terminal voltage
1 Reduced by 5.0mW for each increase in Ta of 1
C over 25
C.
2 Reduced by 3.5mW for each increase in Ta of 1
C over 25
C.
3 Reduced by 3.0mW for each increase in Ta of 1
C over 25
C.
Recommended operating conditions (Ta = 25C)
Parameter
Symbol
Min.
Typ.
Max.
Unit
V
CC
--
5.5
V
2.0
--
5.5
V
V
IN
0
--
V
CC
V
2.7
Power supply
voltage
Input voltage
Writing
Reading
3
Memory ICs
BR93LC56 / BR93LC56F / BR93LC56RF / BR93LC56FV
Electrical characteristics (unless otherwise noted, Ta = 40 to + 85C, V
CC
= 5V 10%)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
V
IL
0.3
--
0.8
V
V
IH
2.0
--
--
--
V
CC
+ 0.3
V
V
OL1
--
--
0.4
V
I
OL
= 2.1mA
V
OH1
2.4
--
--
V
I
OH
= 0.4mA
V
OL2
--
--
0.2
V
I
OL
= 10
A
V
OH2
V
CC
0.4
--
--
V
I
OH
= 10
A
I
LI
1.0
--
A
V
IN
= 0V ~ V
CC
I
LO
1.0
--
A
V
OUT
= 0V ~ V
CC
, CS = GND
I
CC1
--
1.5
3
mA
I
CC2
--
0.7
1.5
mA
I
SB
--
1.0
5
A
CS = SK = DI = GND, DO = OPEN
1.0
1.0
V
IN
= V
IH
/ V
IL
, DO = OPEN
V
IN
= V
IH
/ V
IL
, DO = OPEN
f = 1MHz, WRITE
f = 1MHz, READ
Input low level voltage
Input high level voltage
Output low level voltage 1
Output high level voltage 1
Output low level voltage 2
Output high level voltage 2
Input leakage current
Output leakage current
Operating current
dissipation 1
Standby current
Operating current
dissipation 2
(unless otherwise noted, Ta = 40 to + 85C, V
CC
= 3V 10%)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
V
IL
0.3
--
0.15
V
CC
V
V
IH
0.7
V
CC
--
--
--
V
CC
+ 0.3
V
V
OL
--
--
0.2
V
I
OL
= 10
A
V
OH
V
CC
0.4
--
--
V
I
OH
= 10
A
I
LI
1.0
--
A
V
IN
= 0V ~ V
CC
I
LO
1.0
--
A
V
OUT
= 0V ~ V
CC
, CS = GND
I
CC1
--
0.5
2
mA
I
CC2
--
0.2
1
mA
I
SB
--
0.4
3
A
CS = SK = DI = GND, DO = OPEN
1.0
1.0
V
IN
= V
IH
/ V
IL
, DO = OPEN,
f = 250kHz, WRITE
V
IN
= V
IH
/ V
IL
, DO = OPEN,
f = 250kHz, READ
Input low level voltage
Input high level voltage
Output low level voltage
Output high level voltage
Input leakage current
Output leakage current
Operating current
dissipation 1
Standby current
Operating current
dissipation 2
Electrical characteristics (unless otherwise noted, Ta = 40 to + 85C, V
CC
= 2.0V 10%)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
V
IL
0.3
--
0.15
V
CC
V
V
IH
0.7
V
CC
--
--
--
V
CC
+ 0.3
V
V
OL
--
--
0.2
V
I
OL
= 10
A
V
OH
V
CC
0.4
--
--
V
I
OH
= 10
A
I
LI
1.0
--
1.0
A
V
IN
= 0V ~ V
CC
I
LO
1.0
--
1.0
A
V
OUT
= 0V ~ V
CC
, CS = 0V
I
CC2
--
0.2
1
mA
I
SB
--
0.4
3
A
CS = SK = DI = 0V, DO = OPEN
V
IN
= V
IH
/ V
IL
, DO = OPEN
f = 200kHz, READ
Input low level voltage
Input high level voltage
Output low level voltage
Output high level voltage
Input leakage current
Output leakage current
Operating current
dissipation 2
Standby current
4
Memory ICs
BR93LC56 / BR93LC56F / BR93LC56RF / BR93LC56FV
(2) Operation timing characteristics
(unless otherwise noted, Ta = 40 to + 85C, V
CC
= 5V 10%)
Parameter
Symbol
Min.
Typ.
Max.
Unit
f
SK
--
--
1
MHz
t
SKH
450
--
--
ns
t
SKL
450
--
--
ns
t
CS
450
--
--
ns
t
CSS
50
--
--
ns
t
DIS
100
--
--
ns
t
CSH
0
--
--
ns
t
DIH
100
--
--
ns
t
PD1
--
--
500
ns
t
PD0
--
--
500
ns
t
SV
--
--
500
ns
t
DF
--
--
100
ns
--
--
10
ms
t
E / W
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output confirmation
Time from CS to output High impedance
Write cycle time
Circuit operation
(1) Command mode
With these ICs, commands are not rec-
ognized or acted upon until the start bit
is received. The start bit is taken as the
first "1" that is received after the CS pin
rises.
1 After setting of the read command
and input of the SK clock, data corre-
sponding to the specified address is
output, with data corresponding to up-
per addresses then output in se-
quence. (Auto increment function)
2 When the write or write all addresses command is executed, all data in the selected memory cell is erased auto-
matically, and the input data is written to the cell.
3 These modes are optional modes. Please contact Rohm for information on operation timing.
1
10
1
00
1
01
D15 ~ D0
--
--
1
00
D15 ~ D0
--
--
--
1
00
1
11
1
00
0A6 ~ A0
11XXXXXX
0A6 ~ A0
01XXXXXX
00XXXXXX
0A6 ~ A0
10XXXXXX
Command
Read (READ)
1
Write enabled (WEN)
Write (WRITE)
2
Write all addresses (WRAL)
2
Write disabled (WDS)
Erase (ERASE)
3
Chip erase (ERAL)
3
Start
bit
Operating
code
Address
Data
X: Either V
IH
or V
IL
5
Memory ICs
BR93LC56 / BR93LC56F / BR93LC56RF / BR93LC56FV
For low voltage operation (unless otherwise noted, Ta = 40 to + 85C, V
CC
= 3V 10%)
Parameter
Symbol
Min.
Typ.
Max.
Unit
f
SK
--
--
250
kHz
t
SKH
1
--
--
s
t
SKL
1
--
--
s
t
CS
1
--
--
s
t
CSS
200
--
--
ns
t
DIS
400
--
--
ns
t
CSH
0
--
--
ns
t
DIH
400
--
--
ns
t
PD1
--
--
2
s
t
PD0
--
--
2
s
t
SV
--
--
2
s
t
DF
--
--
400
ns
--
--
25
ms
t
E / W
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output confirmation
Time from CS to output High impedance
Write cycle time
When reading at low voltage (unless otherwise noted, Ta = 40 to + 85C, V
CC
= 2.0V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
f
SK
--
--
200
kHz
t
SKH
2
--
--
s
t
SKL
2
--
--
s
t
CS
2
--
--
s
t
CSS
400
--
--
ns
t
DIS
800
--
--
ns
t
CSH
0
--
--
ns
t
DIH
800
--
--
ns
t
PD1
--
--
4
s
t
PD0
--
--
4
s
t
DF
--
--
800
ns
SK clock frequency
SK "H" time
SK "L" time
CS "L" time
CS setup time
DI setup time
CS hold time
DI hold time
Data "1" output delay time
Data "0" output delay time
Time from CS to output High impedance
Not designed for radioactive rays.
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