1
Standard ICs
Picture cell driver for STN (LCD driver)
for low voltage power supplies
BU9718KV
The BU9718KV is a driver IC designed for the character-type STN liquid crystal panels which are ideal for applica-
tions such as portable devices. The number of display segments includes 32 output segments and 3 common out-
puts, enabling drive of up to 96 segments. A compact 48-pin QFP package with a pitch of 0.5 mm is used, enabling
compact size for the set as a whole.
Features
1) Operates on 3V power supply.
2) Low current dissipation. (0.1
A in low power mode
(actual value))
3) Compact package. (molded section is 7.0 mm )
4) Up to 32 segment output pins and 3 common output
pins are provided, enabling a total display of up to
96 segments.
5) 1 / 3 duty display.
6) Either 1 / 2 or 1 / 3 bias can be selected for power sup-
ply for LCD display.
Applications
Portable terminals (POS, ECR, PDA, and others),
movie projectors, cameras, telephones (cordless hand-
held telephone units), and others Low-voltage power
supply sets
Absolute maximum ratings (Ta = 25C, V
SS
= 0V)
Parameter
Power supply voltage
1
Input voltage
1
Output voltage
1
Output current
V
DD
V
IN
V
OUT
I
SO
0.3 ~ + 7.0
0.3 ~ V
DD
+ 0.3
0.3 ~ V
DD
+ 0.3
300
V
Symbol
V
DD
OSC, CS, CK, DI, RES
OSC
S
1
~ S
32
Pin
Limits
Unit
V
V
A
I
CO
3
COM
1
~ COM
3
mA
Power dissipation
Pd
400
2
--
mW
Storage temperature
Tstg
55 ~ + 125
--
C
1 Max. voltage that can be applied with a V
SS
pin
2 Reduced by 4.0mW for each increase in Ta 1
C over 25
C.
Recommended operating conditions (Ta = 25C, V
SS
= 0V)
Parameter
Power supply voltage
V
DD
V
Symbol
V
DD
Pin
2.7
Min.
--
Typ.
3.5
Input voltage
Oscillation freq., with
external input
V
DD1
V
V
DD1
0
2 / 3 V
DD
V
DD
V
DD2
V
V
DD2
0
1 / 3 V
DD
V
DD
f
OSC
kHz
OSC
--
38
100
External resistance
R
k
OSC
--
47
--
External capacitance
C
pF
OSC
--
1000
--
Operating temperature
Topr
C
--
40
--
85
Max.
Unit
Indicates the max. voltage that can be applied with a V
SS
pin.
3
Standard ICs
BU9718KV
Pin descriptions
Pin No.
1--11
13--23
26--35
Pin name
S
23
--S
32
S
12
--S
22
S
1
--S
11
Segment data output pin; outputs LCD drive voltage that
matches COM
1
- COM
3
compatible data
I / O
O
Function
Processing when not in use
44
OSC
--
Oscillation pin (for common, segment alternation waves)
V
SS
45
CS
I
Chip segment input; when CS = H, data can be transferred
V
SS
46
CK
I
Synchronous clock input for serial data transfer
V
SS
47
DI
I
Serial data input
V
SS
OPEN
36
37
38
COM
3
COM
2
COM
1
Common drive output; frame freq. f
C
= (f
OSC
/ 384) Hz
O
V
SS
39
I
V
DD
RES
Reset input; when RES = L, resets internal data
(include. control data)
41
--
OPEN
V
DD1
Internal standard voltage for liquid-crystal drive; when using
1 / 2 bias mode, connects to V
DD2
42
--
OPEN
V
DD2
Internal standard voltage for liquid-crystal drive; when using
1 / 2 bias mode, connects to V
DD1
Electrical characteristics (unless otherwise noted, Ta = 25C, V
DD
= 2.7V to 3.5V, V
SS
= 0V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Pin
Input high level voltage
V
IH
0.8 V
DD
--
V
DD
V
--
CS, CK, DI, RES
CS, CK, DI, RES
CS, CK, DI, RES
CS, CK, DI, RES
Input low level voltage
V
IL
0
--
0.2 V
DD
V
--
Input high level current
I
IH
0
--
6.0
A
V
I
= V
DD
Input low level current
I
IL
0
--
6.0
A
V
I
= V
SS
Output high level voltage
V
SOH
--
V
DD
1.0
--
V
I
O
= 20
A
S
1
~ S
32
V
COH
--
V
DD
1.0
--
V
I
O
= 100
A
COM
1
~ COM
3
Output low level voltage
Output medium level voltage
V
SOL
--
1.0
--
V
I
O
= 20
A
S
1
~ S
32
V
COL
--
1.0
--
V
I
O
= 100
A
COM
1
~ COM
3
Power supply current
I
Q
--
0.1
30
A
Low-power mode
--
I
DD
--
100
300
A
f
OSC
= 38kHz
--
V
CM1
--
1 / 2 V
DD
1.0
--
V
1 / 2bias
COM
1
~ COM
3
V
SM1
--
2 / 3 V
DD
1.0
--
V
1 / 3bias
S
1
~ S
32
V
CM2
--
2 / 3 V
DD
1.0
--
V
1 / 3bias
COM
1
~ COM
3
V
SM2
--
1 / 3 V
DD
1.0
--
V
1 / 3bias
S
1
~ S
32
V
CM3
--
1 / 3 V
DD
1.0
--
V
1 / 3bias
COM
1
~ COM
3
4
Standard ICs
BU9718KV
AC characteristics (unless otherwise noted, Ta = 25C, V
DD
= 2.7V to 3.5V, V
SS
= 0V)
Parameter
Symbol
Min.
Typ.
Max.
Unit
Conditions
Pin
Guaranteed oscillation range
Operating frequency
Data set-up time
Data hold time
CS set-up time
CS hold time
CK "H" level pulse width
CK "L" level pulse width
Rise time
Fall time
f
OSC
10
38
80
kHz
C = 1000pF R = 47k
External input
OSC
f
OSC
--
--
100
kHz
OSC
t
DS
200
--
--
ns
CK, DI
t
DH
200
--
--
ns
CK, DI
t
CS
200
--
--
ns
CS, CK
t
CH
200
--
--
ns
CS, CK
t
CKH
200
--
--
ns
CK
t
CKL
200
--
--
ns
CK
tr
--
--
100
ns
CS, CK, DI
tf
--
--
--
--
--
--
--
--
--
--
100
ns
CS, CK, DI
AC timing waveform
(1) When CK is stopped at "L"
(2) When CK is stopped at "H"
0.8V
DD
0.8V
DD
CS
CK
DI
0.8V
DD
0.8V
DD
0.2V
DD
0.5V
DD
0.5V
DD
0.2V
DD
t
CS
t
DS
t
DH
tr
tf
t
CKH
t
CKL
t
CH
CS
CK
DI
0.2V
DD
0.8V
DD
0.2V
DD
0.5V
DD
0.5V
DD
0.2V
DD
t
CS
t
DS
t
DH
tr
tf
t
CKH
t
CKL
t
CH
Fig.1
Fig.2
5
Standard ICs
BU9718KV
Timing charts
(1) When CK is stopped at "L"
CS
CK
DI
D1
D2
Display data
Control code
D3
D95
0
0
0
0
0
BM
LC
OE
Fig.3
When CS is HIGH, data can be transferred. Data is sent to the shift register at the rising edge of CK. After all of the
DI data has been transferred, CS should be set to LOW. The voltage corresponding to the display data transferred at
the falling edge of CS is output.
(2) When CK is stopped at "H"
CS
CK
DI
D1
D2
Display data
Control code
D3
D96
0
0
0
0
0
BM
LC
OE
Fig.4
Control code table
Output enable control
Normal operation
No display; all display data = 0 (internal oscillation circuit is operating)
OE
0
1
Low-power mode control
Normal operation
Low-power mode = internal oscillation circuit has stopped; segment and common output = 0
LC
0
1
Bias mode control
1 / 3 bias
1 / 2 bias
BM
0
1
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