ADC1393X

0.18

m 10-BIT 150MSPS ADC

GENERAL DESCRIPTION

The adc1393x is a CMOS 10-bit low-voltage and high-speed A/D converter (ADC) for video and other applications. It

has a four-step pipelined architecture, which consists of sample & hold amplifier, multiplying D/A converters (DACs),

and subranging flash ADCs.

The maximum conversion rate of adc1393x is 150MSPS and supply voltage is 1.8V single.

FEATURES

-- Process : CMOS
-- Resolution : 10Bit
-- Maximum Conversion Rate : 150MSPS
-- Power Supply : 1.8V Single
-- Power Consumption : 144mW
-- Differential Linearity Error :

1.0 LSB (Typ)

-- Integral Linearity Error :

2.0 LSB (Typ)

-- Internal Sample-and-Hold
-- Internal Reference Generation
-- Operational Temperature Range : -40~85

TYPICAL APPLICATIONS

-- Network Applications

Ethernet, Wireless LAN

-- HDTV, High Resolution Digital TV
-- Portable equipments for low-power applications

0.18

m 10-BIT 150MSPS ADC

ADC1393X

FUNCTIONAL BLOCK DIAGRAM

MDAC1

SHA

Flash1

AINT

MDAC2

CML

Flash2

Flash3

IVREF

CKGEN

DCLOGIC

AINC

REFTOP
REFBOT

REFMID

IVCN<2:0>

IV2R

CKIN

MINV

LINV DECM<1:0>

DO<9:0>

UDF

OVF

CML1

VDDA

VSSA

VDDD

VSSD

SUBST

Ver 1.0 (Jan. 2002)

This datasheet is a preliminary version. No responsibility is assumed by SEC for its use nor for any infringements of

patents or other rights of third parties that may result from its use. The content of this datasheet is subject to change

without any notice.

ADC1393X

0.18

m 10-BIT 150MSPS ADC

CORE PIN DESCRIPTION

Name

I/O Type

I/O Pad

Pin Description

AINT

piar50_abb

Analog Input (+1.15V ~ +0.65V)

AINC

piar50_abb

Analog Input (+0.65V ~ +1.15V)

IVCN<2:0>

picc_abb

IVREF Control (Normally 100)

IVZR

picc_abb

Normally connect VSSD

CML1

poa_abb

Internal Bias Point (Use Ext. BypassCap)

REFMID

poa_abb

Ref Midpoint (Use Ext. BypassCap)

DO[9:0]

pot16_abb

Digital Output

OVF

pot16_abb

Output Overflow Check

UDF

pot16_abb

Output Underflow Check

REFTOP

pia_abb

Reference Top Bias (+1.65V)

(Bypass Capacitor Required)

REFBOT

pia_abb

Reference Bottom Bias (+0.65V)

(Bypass Capacitor Required)

MINV

picc_abb

Connect VDDD = Invert MSB

(Normally Connect VSSD)

LINV

picc_abb

Connect VDDD = Invert all LSBs

(Normally Connect VSSD)

VDDA

vdd1t_abb

Analog Power (+1.8V)

VSSA

vss1t_abb

Analog Ground (0.0V)

SUBST

vbb1_abb

Analog Substrate Bias (0.0V)

VDDD

vdd1t_abb

Digital Power (+1.8V)

VSSD

vss1t_abb

Digital Ground (0.0V)

CKIN

picc_abb

External System Clock

DECM<1:0>

picc_abb

Decimator Control (Normally 00)

I/O Type Abbr.
-- AI: Analog Input
-- DI: Digital Input
-- AO: Analog Output
-- DO: Digital Output
-- AB: Analog Bi-direction
-- DB: Digital Bi-direction
-- AP: Analog Power
-- AG: Analog Ground
-- DP: Digital Power
-- DG: Digital Ground

0.18

m 10-BIT 150MSPS ADC

ADC1393X

ABSOLUTE MAXIMUM RATINGS

Characteristic

Symbol

Value

Unit

Supply Voltage

VDDA

VDDD

-0.3 to 2.5

Analog Input Voltage

AINT/AINC

-0.3 to VDDA + 0.3

Digital Input Voltage

-0.3 to VDDD + 0.3

Digital Output Voltage

, V

-0.3 to VDDD + 0.3

Storage Temperature Range

stg

-55 to 125

NOTES:
1. Absolute maximum rating specifies the values beyond which the device may be damaged permanently. Exposure to

ABSOLUTE MAXIMUM RATING conditions for extended periods may affect reliability. Each condition value is applied
with the other values kept within the following operating conditions and function operation under any of these conditions
is not implied.

voltages

are

measured

with

respect

VSSA/VSSD

unless

otherwise

specified.

100pF

capacitor

discharged

through

1.5k

resistor

(Human

body

model).

RECOMMENDED OPERATING CONDITIONS

Characteristics

Symbol

Min

Typ

Max

Unit

Supply Voltage

VDDA - VSSA

VDDD - VSSD

1.71

1.8

1.89

Supply Voltage Difference

VDDA - VDDD

-0.1

0.0

0.1

Reference Input Voltage

REFTOP

REFBOT

1.15
0.65

Analog Input Voltage

AINT

AINC

0.65

1.15

Digital Input 'L' Voltage

Digital Input 'H' Voltage

3.0

0.3

Operating Temperature

opr

NOTES:
1. It

strongly

recommended

that

all

the

supply

pins

(VDDA,

VDDD)

powered

from

the

same

source

avoid

power

latch-up.

2. Reference Input Voltage REFTOP and REFBOT are generated internally and not adjustable.

ADC1393X

0.18

m 10-BIT 150MSPS ADC

DC ELECTRICAL CHARACTERISTICS

Characteristics

Symbol

Min

Typ

Max

Unit

Test Conditions

Resolution

Bits

Differential Linearity Error

DLE

0.5

1.0

LSB

AINT: 0.65V~ 1.15V(Ramp Input)

AINC: 1.15V~ 0.65V(Ramp Input)

Integral Linearity Error

ILE

1.0

2.0

LSB

1MHz

20MHz

Bottom Offset Voltage Error

EOB

LSB

EOB = AI(0, 1) - 0

Top Offset Voltage Error

EOT

LSB

EOT = REFTOP - AI(1022, 1023)

NOTES:
1. Converter

Specifications

(unless

otherwise

specified)

VDDA=1.8V

VDDD=1.8V

VSSA=GND

VSSD=GND

SUBST=GND
REFTOP=1.15V

REFBOT=0.65V

IVCN<2:0>=<1 0 0>, IVZR=Low, MINV, LINV=Low, DECM<1:0>=<0 0>
T

= 25

2. AI(D1, D2) denotes the net voltage difference of AINT and AINC when the corresponding Digital Output code changes

from D1 to D2.

AC ELECTRICAL CHARACTERISTICS

Characteristics

Symbol

Min

Typ

Max

Unit

Test Conditions

Conversion Rate

150

MSPS

Dynamic Supply Current

= I(VDDA) + I(VDDD)

Analog Input Range

1.0

Vpp

0.65V ~ 1.15V Differential Input

Analog Input Capacitance

Analog Input Bandwidth

MHz

Digital Output Data Delay

See

"DELAY TIMING DIAGRAM"

Signal to

Noise Distortion Ratio (SNDR)

SNDR1

SNDR2

SNDR3

AIN : 1,30,75MHz respectively

(Sine Input)

: 150MHz

0.18

m 10-BIT 150MSPS ADC

ADC1393X

INPUT-OUTPUT MAPPING TABLE

Index

AINT (V)

AINC (V)

Digital Output

0.65V ~ 0.65V+1

LSB

1.15V ~ 1.15V-1

LSB

0000000000

0.65V+1

LSB

~ 0.65V+2

LSB

1.15V-1

LSB

~ 1.15V-2

LSB

0000000001

0.65V+2

LSB

~ 0.65V+3

LSB

1.15V-2

LSB

~ 1.15V-3

LSB

0000000010

511

0.65V+511

LSB

~ 0.65V+512

LSB

1.15V-511

LSB

~ 1.15V-512

LSB

0111111111

512

0.65V+512

LSB

~ 0.65V+513

LSB

1.15V+512

LSB

~ 1.15V-513

LSB

1000000000

513

0.65V+513

LSB

~ 0.65V+514

LSB

1.15V-513

LSB

~ 1.15V-514

LSB

1000000001

1021

0.65V+1021

LSB

~ 0.65V+1022

LSB

1.15V-1021

LSB

~ 1.15V-1022

LSB

1111111101

1022

0.65V+1022

LSB

~ 0.65V+1023

LSB

1.15V-1022

LSB

~ 1.15V-1023

LSB

1111111110

1023

0.65V+1023

LSB

~ 1.15V

1.15V-1023

LSB

~ 0.65V

1111111111

NOTES:
1. For Differential Input

.AINT = REFBOT ~ REFTOP
.AINC = REFTOP ~ REFBOT
.1

LSB

= (REFTOP - REFBOT)/1024

and for Single Input

.AINT = (REFTOP + REFBOT)/2 - (REFTOP - REFBOT) ~ (REFTOP + REFBOT)/2 + (REFTOP - REFBOT)
.AINC = (REFTOP + REFBOT)/2
.1

LSBS = 2´(REFTOP - REFBOT)/1024

2. Using Differential Input Mode : AINT = 0.65 ~ 1.15, AINC = 1.15 ~ 0.65

LSBD = (REFTOP - REFBOT)/1024 = 0.976562mV

0.18

m 10-BIT 150MSPS ADC

ADC1393X

FEEDBACK REQUEST

It should be quite helpful to our ADC core development if you specify your system requirements on ADC in the

following characteristic checking table and fill out the additional questions.

We appreciate your interest in our products. Thank you very much.

Characteristic

Min

Typ

Max

Unit

Remarks

Analog Power Supply Voltage

Digital Power Supply Voltage

Bit Resolution

Bit

Reference Input Voltage

Analog Input Voltage

Operating Temperature

Integral Non-linearity Error

LSB

Differential Non-linearity Error

LSB

Bottom Offset Voltage Error

Top Offset Voltage Error

Maximum Conversion Rate

MSPS

Dynamic Supply Current

Power Dissipation

Signal-to-noise Ratio

Pipeline Delay

CLK

Digital Output Format

(Provide detailed description & timing diagram)

1. Between single input-output and differential input-output configurations, which one is suitable for your system

and why?

2. Please comment on the internal/external pin configurations you want our ADC to have, if you have any reason to

prefer some type of configuration.

3. Freely list those functions you want to be implemented in our ADC, if you have any.

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