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BW1217X

GENERAL DESCRIPTION

The bw1217x is a CMOS 10-bit A/D converter for video applications. It is a three-step pipelined A/D converter
which consists of sample & hold, two multiplying DACs, and three 4-bit flash ADCs.

The maximum conversion rate of bw1217x is 30MSPS and supply voltage is 3.3V single.

TYPICAL APPLICATIONS

-- PC or computer based video signal processing such as multi-media, scanner, etc.

-- General Purpose video applications including camcorder, digital video, broad-casting and studio equipments.

-- Medical electronics such as digital scope, transit recorder, radar.

FEATURES

-- Resolution: 10Bit

-- Differential Linearity Error:

1.0 LSB

-- Integral Linearity Error:

2.0 LSB

-- Maximum Conversion Rate: 30MSPS

-- Sample & Hold Function Implemented

-- Low Power Consumption: 82.5mW(Typ)

-- Power Supply: 3.3V Single

-- Operation Temperature Range: 0

C~70

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BW1217X

CORE PIN DESCRIPTION

Name

I/O Type

I/O PAD

Pin Description

AINT

piar50_bb

Analog

Input

Range:

1.9V

1.4V

AINC

piar50_bb

Analog

Input

Input Range: 1.4V ~ 1.9V

REFMID

pia_bb

Reference

Mid

Point

(Test

Pin)

REFTOP

pia_bb

Reference

Top

(1.9V)

REFBOT

pia_bb

Reference

Bottom(1.4V)

VDDA

vdda

Analog

Power

(3.3V)

VSSA

vssa

Analog

Ground

VBBA

vbba

Analog

Sub

Bias

ITEST

pia_bb

open = use

internal

bias

point

STBY

picc_bb

high = power

saving

standby

mode

(normally

gnd)

CKIN

picc_bb

Sampling

Clock

Input

CML

pia_bb

Internal

Bias

Point (Test

Pin)

DO[9:0]

pot2_bb

Digital

Output

OVF

pot2_bb

Overflow

UDF

pot2_bb

Underflow

VBBD

vbba

Digital

Sub

Bias

VSSD

vssd

Digital

Ground

VDDD

vddd

Digital

Power

I/O Type Abbr.

-- AI: Analog Input

-- DI: Digital Input

-- AO: Analog Output

-- DO: Digital Output

-- AB: Analog Bidirectional

-- DB: Digital Bidirectional

-- AP: Analog Power

-- DP: Digital Power

-- AG: Analog Ground

-- DG: Digital Ground

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BW1217X

ABSOLUTE MAXIMUM RATINGS

Characteristic

Symbol

Value

Unit

Supply Voltage

VDD

4.5

Analog Input Voltage

AIN

VSS to VDD

Digital Input Voltage

CLK

VSS to VDD

Digital Output Voltage

OH,

VSS to VDD

Storage Temperature Range

Tstg

-45 to 125

NOTES:
1.

ABSOLUTE

MAXIMUM

RATING

specifies

the

values

beyond

which

the

device

may

damaged

permanently.

Exposure

ABSOLUTE

MAXIMUM

RATING

conditions

for

extended

periods

may

affect

reliability.

Each

condition

value

applied

with

the

other

values

kept

within

the

following

operating

conditions

and

function

operation

under

any

these

conditions

not

implied.

All

voltages

are

measured

with

respect

VSS

unless

otherwise

specified.

100pF

capacitor

discharged

through

1.5K

resistor

(Human

body

model)

RECOMMENDED OPERATING CONDITIONS

Characteristics

Symbol

Min

Typ

Max

Unit

Supply Voltage

VDDA - VSSA

VDDD - VSSD

3.15

3.3

3.45

Supply Voltage Difference

VDDA - VDDD

-0.1

0.0

0.1

Reference Input Voltage(Externally)

REFTOP
REFBOT

1.9
1.4

Analog Input Voltage (+)

AINT

1.4

1.9

Analog Input Voltage (-)

AINC

1.9

1.4

Operating Temperature

Topr

NOTE: It

strongly

recommended

that

all

the

supply

pins

(VDDA,

VDDD)

powered

from

the

same

source

avoid

power

latch-up.

BW1217X

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DC ELECTRICAL CHARACTERISTICS

Characteristics

Symbol

Min

Typ

Max

Unit

Conditions

Resolution

Bits

Reference Current

IREF

Differential Linearity Error

DLE

±1.0

LSB

AINT: 0.2 ~ 1.2V
(Ramp Input)

Integral Linearity Error

ILE

±2.0

LSB

Fck: 1MHz

Bottom Offset Voltage Error

EOB

LSB

Top Offset Voltage Error

EOT

LSB

NOTES:
1.

Converter

Specifications

(unless

otherwise

specified)

VDDA=3.3V

VDDD=3.3V

VSSA=GND

VSSD=GND

Ta=25

TBD:

Determined

AC ELECTRICAL CHARACTERISTICS

Characteristics

Symbol

Min

Typ

Max

Unit

Conditions

Maximum Conversion Rate

MSPS

AINT: 1MHz Sine Signal

(source resolution > 12-
bit)

Dynamic Supply Current

Ivdd

fc = 30MHz
(without system load)

Signal - to - Noise Ratio

SNR

AINT = 1MHz
fc = 30MHz

BW1217X

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FUNCTIONAL DESCRIPTION

1. bw1217x is a three step A/D Converter comprising three 4-bit flash ADC and two multiplying DAC. The N-bit

flash ADC is composed of 2

(n-1)

latching comparators, and multiplying DAC is composed of 2*(N+2) capacitors

and two fully-differential amplifier.

2. bw1217x operates as follows. During the first "L" cycle of external clock the analog input data is tracked and

sampled, and the input is held from the rising edge of the external clock, which is fed to the first 4-bit flash
ADC, and the first multiplying DAC. Multiplying DAC reconstructs a voltage corresponding to the first 4-bit
ADC's output, and finally amplifies a residue voltage by 2

. The second 4-bit flash ADC, and MDAC are

worked

as same manner, finally amplifiers a residue voltage, which is the difference between first MDAC's output and
reconstructed voltage by 2

. The third 4-bit flash ADC, and MDAC are worked as previous stages.

3. bw1217x has the error correction scheme, which handles the output from mismatch in the first, second and

third flash ADC.

MAIN BLOCK DESCRIPTION

1. SAH

SAH(track and hold) is the circuit that samples the analog input signal and holds that value until next sample-
time. It is good as small as its different value between analog input signal and output signal. SAH amp gain
must be higher than 66dB at least for less than 1/2LSB of SAH error voltage at 10bit ADC and its conversion
frequency is 30MHz, its settling-time must be shorten than 12ns. This SAH is consist of fully differential op
amp, switching tr. and sampling capacitor. The sampling clock are non-overlapping clocks(Q1,Q2) and
sampling capacitor value is 1.2pF. SAH uses independentbias to protect interruption of any other circuit. SAH
amp is designed that open-loop dc gain is higher than 70dB, phase margin is higher than 60degree. Its input
block is designed to be the rail-to-rail architecture using complementary differential pair.

2. FLASH

The 4-bit flash converter compares analog signal(SAH output) with reference voltage, and that result transfers
to MDAC and digital correction logic block. It is realized fully differential comparators of 15EA. Considering self-
offset, dynamic feed through error, it should distinguish 40mV at least. First, the comparators charge the
reference voltage at the sampling capacitors before transferred SAH output. Q2 works this process and Q1
discharges this sampling capacitors. That is, the comparators compare relative different values dual input
voltage with dual reference voltage. Its output during Q1 operation is stored at the pre-latch block by Q1P.

3. MDAC

MDAC is the most important block at this ADC and it decides the characteristics. MDAC is consist of
amp1,amp2, selection logic and capacitor array(c_array). C_array's compositions are the capacitors to charge
the analog input and the reference voltage, Switches to control the path. Selection logic controls the c_array
internal switches. If Q1 is high, selection's output is all low, the switches of tsw1 are off, the switches of tsw2
are all on. Therefore the capacitors of c_array charges analog input values held at SAH. If Q2 is high, it is
reversed and final MDAC output voltage is described the following equation.

Vout = (AIN - Vref)*8-Vref/2

AIN=AINT-1.5V

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BW1217X

CORE EVALUATION GUIDE

1. ADC function is evaluated by external check on the bidirectional pads connected to input nodes of HOST DSP

back-end circuit.

2. The reference voltages may be biased internally through resistor divider.

BW1217X

1.9V

REF

ITES

REFTOP

OVF

UDF

REFBOT

1.4V

Power Used:
VDDA, VDDD, VBBD,
VSSA, VSSD, VBBA

DO[9:0]

Digital

Mux

HOST

DSP

CORE

DO[9:0]

Bidirectional

PAD

DO[9:0]

(ADC Function Test &

Externally Forced Digital Input)

CKIN

AINC

AINT

STBY

NOTES:
1. : 10uF electrolytic capacitor unless otherwise specified
2. : 0.1uF ceramic capacitor unless otherwise specifed

BW1217X

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PACKAGE CONFIGURATION

NOTES

You

can

test

ADC

function

checking

external

bidirectional

pad

connected

internal

signal

path.

ESD

(Electro Static

Discharge)

sensitive

device.

Although

the

digital

control

inputs

are

diode

protected,

permanent

damage

may

occur

devices

subjected

high

electrostatic

discharges.

recommended

that

unused

devices

stored

conductive

foam

shunts

avoid

performance

degradation

loss

functionality.

The

protective

foam

should

discharged

the

destination

socket

before

devices

are

inserted.
3. NC

denotes

"No

Connection".

BW1217X

VBBD

OVF

UDF

D<9>

D<8>

D<5>

D<4>

D<3>

D<2>

D<7>

D<6>

CML

VDDA

VBBA

VSSA

AINT

AIN

REFMID

STBY

VDDR

VSSR

CKIN

VSSA

ITEST

Video-in

GND

3.3V

Analog Power

Reference

Bottom

Reference

Top

3.3V

Digital
Power

GND

TR
I
S

TA
TE

D<
0>

D<
1>

RE
FB
OT

RE
FT
OP

VD
DD

VS
SD

Digital Output Bits 0 and 1

i
g
i
t
a

l

O

u
tp

i
ts 2 T

r
oug
h 9

NOTES:
1. : 10uF electrolytic capacitor unless otherwise specified
2. : 0.1uF ceramic capacitor unless otherwise specifed

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BW1217X

PACKAGE PIN DESCRIPTION

Name

Pin No.

I/O Type

Pin Description

REFTOP

External Reference Top Bias.(1.9V)

REFBOT

External Reference Bottom Bias.(1.4V)

CML

Internal Bias Point (Test Pin)

VDDA

6,7

3.3V Analog Power

VBBA

Analog Sub Bias

VSSA

9,10

Analog Ground

AINT

Analog Input (+)
Input Range: 1.4~1.9V

AINC

Analog Input. (-)
Input Range: 1.9~1.4V

REFMID

Reference Mid Point (Test Pin)

ITEST

open=use internal bias point

STBY

High = power saving standby mode (normally gnd)

VDDR

Ouput Driver Power (3.3V)

VSSR

Output Driver Ground

CKIN

Sampling Clock Input

TRISTATE

high = high impedance digital output

(normally gnd)

DO[9:0]

27~36

Digital Output

UDF

Underflow

OVF

Overflow

VBBD

Digital Substrate Bias

VSSD

45,46

Digital Ground

VDDD

47,48

Digital Power(3.3V)

NOTE: I/O

TYPE

and

denote

PAD

Power

and

PAD

Ground

respectively.

BW1217X

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USER GUIDE

1. Resolution Control.

-- Modular structure is the most important feature of bw1217x.

-- You can get any resolution you want by combining each primary module (MDAC + FLASH) without major

circuit change.

-- It means you don't have to redesign the most difficult analog block for another resolution.

-- But this simple resolution control method has a limit up to 10bits, otherwise the internal op-amp must be

redesigned.

mdac1

flash1

mdac2

flash2

flash3

dclogic

module

10-bit

sha

ain

2. Speed Up

-- The initial target speed of bw1217x was 30MHz, but it proved to operate well at 35MHz or more due to a

lot of design margin.

3. Input Range Variation.

-- The default of the input of this ADC is differential -0.5V ~ +0.5V.

-- The bias voltages of both AINT and AINC are 0.2V~1.2V, and their offset is 0.7V.

-- In order to change to another input voltage range, alter the voltage values of AINT and AINC after setting

Reftop and Refbot to the maximum value of input range.

-- If you want single ended input, fix AINC to 0.7V as a ground and the internal input voltage level is V(aint)-0.7V.

4. Verilog Modeling

-- Verilog modeling needs 64bits for only one analog real signal.

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BW1217X

FEEDBACK REQUEST

It should be quite helpful to our ADC core development if you specify your system requirements on ADC in the
following characteristic cheking table and fill out the additional questions.

We appreciate your interest in our products. Thank you very much.

Characteristic

Min

Typ

Max

Unit

Remarks

Analog Power Supply Voltage

Digital Power Supply Voltage

Bit Resolution

Bit

Reference Input Voltage

Analog Input Voltage

Vpp

Operating Temperature

Integral Non-linearity Error

LSB

Differential Non-linearity Error

LSB

Bottom Offset Voltage Error

Top Offset Voltage Error

Maximum Conversion Rate

MSPS

Dynamic Supply Current

Power Dissipation

Signal-to-noise Ratio

Pipeline Delay

CLK

Digital Output Format (Provide detailed
description & timing diagram)

1. Between single input-output and differential input-output configurations, which one is suitable for your system

and why?

2. Please comment on the internal/external pin configurations you want our ADC to have, if you have any reason

to prefer some type of configuration.

3. Freely list those functions you want to be implemented in our ADC, if you have any.

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ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: BW1217X