Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges,or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
Monolithic Linear IC
5V CD Headphone-stereo Power Amplifier
Ordering number:ENN4033A
LA4536M
SANYO Electric Co.,Ltd. Semiconductor Company
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
O3098HA (KT)/62598RM (KI) No.40331/9
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0.55
1.8
max
1.0
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5.1
0.15
6.4
1.5
0.1
4.4
5.15
0.625
Package Dimensions
unit:mm
3086A-MFP10S
[LA4536M]
The LA4536M is a low noise, low distortion headphone-
stereo power IC designed for use on a portable CD.
Features
Less current drain.
Accept 16
load drive.
Excellent voltage reduction characteristic.
Excellent ripple rejection.
Power switch function and built-in muting circuit.
Low noise (7
V), low gain (11dB).
SANYO : MFP10S
Specifications
Absolute Maximum Ratings
at Ta = 25C
C
C
Operating Characteristics
at Ta = 25C
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1
LA4536M
No.40332/9
Equivalent Circuit Block Diagram
Operating Characteristics
at Ta = 25C, R
L
=16
, Rg=600
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5
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0
5
6
.
0
V
*1 : Quiescent current is the current flowing into pin 6. The current flowing into pin 1 and pin 10 is at the maximum value and calculated from
the equation (V pin0.5V)/16[V/k
], increasing total current.
POWER
SWITCH
1
P/SW
IN 1
PRE GND
IN 2
REF
2
3
4
5
10
MT/SW
OUT 1
POWER GND
OUT 2
VCC
9
8
7
6
BIAS
MUTE
CIRCUIT
Amp1
Amp2
A11160
VCC=5.0V, V5
0.1V
VCC=5.0V, V5
0.85V
VCC=5.0V, V5
0.1V
VCC=5.0V, V5
0.85V
LA4536M
No.40333/9
Test Circuit
Sample Application Circuit
1
2
3
4
5
10
9
8
7
6
SG
P/SW
MT/SW
P/SW
LA4536M
IN 1
PRE
GND
IN 2
REF
MT/SW
OUT 1
POWER
GND
OUT 2
VCC
V1
I1
+
22
F
4.7
F
220
F
220
F
VCC
ICC
VR
DC
RIPPLE
0.1
F
0.1
F
2.2
2.2
+
+
+
2
2
2
3
4
1
1
1
Rg
1k
Rg
1k
RL
16
RL
16
V10
I10
2
3
4
1
A
A11161
1
2
3
4
5
10
9
8
7
6
SG
1
SG
2
VR
VR
P/SW
MT/SW
P/SW
LA4536M
IN 1
PRE
GND
IN 2
REF
MT/SW
OUT 1
POWER
GND
OUT 2
VCC
+
22
F
4.7
F
220
F
220
F
OFF
ON
VCC
0.1
F
0.1
F
2.2
2.2
+
+
+
+
ON
OFF
RL
16
RL
16
A11162
LA4536M
No.40334/9
Pin Functions
(V
CC
=5.0V)
Pin No.
2
4
1
3
6
10
8
5
7
9
Symbol
Pin voltage
Equivalent circuit
Pin function
P/SW1
PRE GND
V
CC
MT/SW
POWER
GND
REF
OUT2
OUT1
2.1
2.1
2.1
IN1
IN2
2.1
2.1
A11164
A11165
1
20k
10k
500
2
4
A11166
23k
5
A11167
4.7k
7
9
A11168
20k
10
The system runs on when the V
CC
is applied to this
pin and turns off by connectiong this pin to GND.
Input pin connection.
Input impedance is 10k
.
2.1V fixed bias is applied to this pin.
Output pin connection.
The muting function turns on when this pin is
connected to GND and turns off by applying the V
CC
to this pin.
LA4536M
No.40335/9
2
3
7
5
2
3
7
10
5
2
3
7
1.0
5
2
3
7
0.1
5
2
3
7
0.01
5
2
3
7
5
1000
100
2
3
7
5
10
2
3
7
5
1.0
0
--10
--20
--30
--40
--50
--60
--70
10
20
--60
--50
--40
--30
--20
--10
0
10
20
--70
0
2
1
0
2 3
5 7
2
3
5
7
40
2
3
5
7
100
2
3
5
7
1000
2
60
80
100
120
140
160
3
4
5
6
7
8
1
2
2
3
5
7
5
2
3
2
3
7
0.1
5
7
1.0
2
10
3
5
7
3
4
5
6
10
100
2
2
4
6
8
10
12
14
16
3
5 7
1.0
10
2
2
2
100
3
2
3
2
7
5
10
3
2
7
5
0
20
40
60
80
100
3
3
5
7
1.0
2
3
5 7 10
2
3
2
3
5 7 100
100
5
7
3
3
2
5
5
7
100
2
3
5
7 1k
2
3
5
7
2
3
5
7
10k
1k
2 3
5 7
10k
2 3
5 7
100k
2 3
5 7
7
8
0.1
1.0
2
3
5
7 10
2
3
2
3
5
7 100
4.0V
Output, V
O
dBm
Output power, P
O
mW
VO VIN
Total harmonic distortion, THD %
Total harmonic distortion, THD %
Input voltage, VIN dBm
PO
VG
5.0V
VCC=4.0V
VO=10dBm
RL=16
VCC=5.0V
RL=16
f=1kHz
RL=16
f=1kHz
RL=16
THD=10%
PO=1mW
f=1kHz
RL=16
VCC=5.0V
f=1kHz
RL=16
2 output on
f=1kHz
RL=16
2 output on
VCC=4.0V
RL=16
Rg=1k
VO=10dBm
THD
THD=10%
10dBm
THD
=10%
V CC
=6.0V
5.0V
22
F
C REF
=100
F
VCC=6.0V
VO=20dBm
PO,THD VCC
VG VCC
Power supply voltage, VCC V
Power supply voltage, VCC V
Pd PO
Output power, PO mW
THD PO
Output power, PO mW
Frequency, fIN Hz
VG fIN
ICC PO
CT fIN
Voltage gain, VG dB
Current drain, I
CC
mA
Power dissipation, Pd m W
Crosstalk, CT dB
Voltage gain, VG dB
Output power, PO mW
Frequency, fIN Hz
220
F
16
OUT
+
LA4536M
No.40336/9
0
--90
2
3
3
2
5
5
7
7
--100
--70
--80
--60
100
10
2
3
3
2
5
5
7
7
1.0
0.1
2
3
5
7
0.01
2
3
3
3
2
2
5
5
5
7
7
1.0
0.1
2
3
5
7
0.01
--40
--50
--30
--20
1
2
0
7
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
0
1
2
3
4
5
6
7
8
3
5 7
2
1
3
5
4
6
7
8
0
5
2
3
2
3
7
0.1
5
7
10
2
3
5
7
100
2
3
6
7
8
4
5
100
2
3
5
7 1k
2
3
5
7 10k
2
0
0
0.2
0.4
0.6
0.8
1.0
1.2
1
4
5
6
2
3
2
3
5
7
1.0
2
3
5
7
10
2
3
2
3
5
7
100
0
1.0
2.0
3.0
4.0
7
8
3
5
7
Flat
DIN AUDIO
Pin 10 (MT)
Pin 1 (P/SW)
Mute on ICCM on
No signal V
IN
=0
THD=10% at output
Ripple rejection, SVRR dBm
Output noise voltage, V
NO
V
SVRR VCC
Output noise voltage, V
NO
V
Supply voltage, VCC V
VNO Rg
IPIN(ON) VCC
Signal source impedance, Rg
Supply voltage, VCC V
ICCOP OFF VCC
Supply voltage, VCC V
VNO VCC
Supply voltage, VCC V
Supply voltage, VCC V
VPIN VCC
ICC VCC
VDC VCC
Pin off voltage, V
PIN(OFF)
V
Current drain, I
CC
mA
Quiescent current, I
CCOP OFF
mA
Voltage, V
DC
V
Pin on current, I
PIN(ON)
A
Supply voltage, VCC V
Supply voltage, VCC V
V5,V7,V9
V5 : VREF
V7,V9 : POWER OUT
VIN=0
Rg=1k
Mute switch on
Rg=1k
VIN=0
VIN=0
Rg=0
Pin V5
0.5V
Rg=1k
f=1kHz
RL=16
(Dual Ope)
PWR SW OFF
CREF=22
F
VR=20dBm
fR=100Hz
Rg=1k
RL=16
VCC=5.0V
VIN=0
Rg=1k
Pin V5
0.1V
Rg=1k
RL=16
Flat
Rg=0
DIN
Rg=0
ON
ON
Pin 10 (MT) MT is OFF
Pin 1 (P/SW)PWR is OFF
LA4536M
No.40337/9
40
60
80
1.6
1.7
1.8
2.2
2.3
1.9
2.4
2.0
20
2.1
160
140
120
100
180
200
--20
--40
4
6
8
10
12
14
16
0
20
40
60
80
100
--40
--20
0
20
40
60
80
100
--20
--40
0
20
40
60
80
100
--40
--20
0
20
40
60
80
100
0
2
6
4
8
12
10
14
16
Output power, P
O
mW
Voltage, V
DC
V
PO Ta
Voltage gain deviation, VG dB
Ambient temperature, Ta C
f=1kHz
THD=10%
RL=16
(Dual Ope)
VCC=5.0V
VO=10dBm
RL=16
(Dual Ope)
f=1kHz
Rg=1k
VIN=0
VCC=5.0V
VIN=0
Rg=1k
VCC=5.0V
4.0V
5.0V
VCC
=6.0V
VDC Ta
Ambient temperature, Ta C
VG Ta
Ambient temperature, Ta C
Ambient temperature, Ta C
ICCO Ta
Quiescent current, I
CCO
mA
P.SW OFF
P.SW ON
P.SW OFF
P.SW ON
P.SW OFF
VCC=5.0V
P.SW ON
VCC=5.0V
Output AC waveform, VIN=0
Output AC
waveform
Output AC waveform
Output AC waveform, VIN=0
P.SW DC waveform
P.SW DC waveform
P.SW DC waveform
P.SW DC waveform
LA4536M
No.40338/9
Application Notes
Popping noise reduction
The switching sequence shown below can minimize the popping noise.
To minimize poping noise, the PWR mute switch should be turned on t1 (about 0.1s) after power-on and turned off t2
(about 0.1s) before power-off. Turn on and off the PWR mute switch by applying V
CC
with the PWR be in no state.
1V/div M.SW OFF
1V/div M.SW ON
M.SW OFF
M.SW ON
M.SW ON
M.SW OFF
VCC=5.0V
VCC=5.0V
Output AC waveform, VIN=0
Output AC waveform
Output AC waveform, VIN=0
Output AC waveform
M.SW DC waveform
M.SW DC waveform
M.SW DC waveform
M.SW DC waveform
PWR.SW
PWR, Mute SW
t3
t1
t2
VCC
A11163
Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.
SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.
In the event that any or all SANYO products(including technical data,services) described or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be expor ted without obtaining the expor t license from the author ities
concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co. , Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.
This catalog provides information as of June, 2003. Specifications and information herein are subject to
change without notice.
LA4536M
PS No.40339/9
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