SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

Ordering number : ENN8095

N1004TN (OT) No.8095-1/12

Overview

The LB11693 reduces motor noise by imparting a slope to the output current when switching the phase to which power
is applied. This motor driver includes an automatic recovery constraint protection circuit and is optimal for driving 24 V
fan motors.

Functions and Features

· Soft phase switching + direct PWM drive
· PWM control based on both a DC voltage input (the CTL voltage) and a pulse input
· Provides a 5 V regulator output
· One Hall-effect sensor FG output
· Integrating amplifier
· Automatic recovery constraint protection circuit (on/off = 1/14), RD output
· Current limiter circuit
· LVSD circuit
· Thermal protection circuitt

SANYO Semiconductors

DATA SHEET

LB11693

Monolithic Digital IC

Three-Phase Brushless Motor Driver
for 24 V Fan Motors

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft's
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

Specifications

Absolute Maximum Ratings

at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage

max

Output current

IO max

500 ms

1.8

Allowable power dissipation 1

Pd max1

Independent IC

Allowable power dissipation 2

Pd max2

With an infinite heat sink

Operating temperature

Topr

30 to +100

°C

Storage temperature

Tstg

55 to +150

°C

No.8095-2/12

LB11693

Allowable Operating Conditions

at Ta = 25°C

Parameter

Symbol

Conditions

Ratings

Unit

Supply voltage range

9.5 to 28

Constant voltage output current

IREG

0 to 30

RD output current

IRD

0 to 10

FG output current

IFG

0 to 10

Electrical Characteristics

at Ta = 25°C, V

= VM = 24 V

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

Current drain 1

13.5

Current drain 2

Stop mode

4.0

5.5

Output Block

Output saturation voltage 1

sat1

= 0.7 A, V

(SINK) + V

(SOURCE)

1.5

2.05

Output saturation voltage 2

sat2

= 1.5 A, V

(SINK) + V

(SOURCE)

2.2

2.9

Output leakage current

leak

100

µA

High side diode forward voltage 1

VD1

ID = 0.7 A

1.25

1.65

High side diode forward voltage 2

VD2

ID = 1.5 A

1.9

2.5

5 V Constant Voltage Output

Output voltage

VREG

= 5 mA

4.7

5.0

5.3

Line regulation

VREG1

= 9.5 to 28 V

100

Load regulation

VREG2

= 5 to 20 mA

100

Hall Sensor Amplifier

Input bias current

IB (HA)

µA

Differential-mode input voltage range

VHIN

Sine wave input

350

mVp-p

Common-mode input voltage range

VICM

Differential input, 50 mVp-p

1.5

VREG 1.0

Input offset voltage

VIOH

Design target value

CSD Pin

High-level output voltage

VOH (CSD)

2.75

3.0

3.25

Low-level output voltage

VOL (CSD)

0.85

1.0

1.15

External capacitor charge current

ICSD1

3.3

2.4

1.4

µA

External capacitor discharge current

ICSD2

0.09

0.17

0.23

µA

Charge/discharge current ratio

RCSD

Charge current/discharge current

times

Undervoltage Protection Circuit (LVS pin)

Operating voltage

VSDL

3.6

3.8

4.0

Release voltage

VSDH

4.1

4.3

4.5

Hysteresis

VSD

0.35

0.5

0.65

Current Limiter Circuit (RF pin)

Limit voltage

VRF

0.45

0.5

0.55

Thermal Protection Operation

Thermal protection operating temperature

TSD

Design target value (junction temperature)

150

170

°C

Hysteresis

TSD

Design target value (junction temperature)

°C

CTL Amplifier

Input offset voltage

VIO (CTL)

+10

Input bias current

IB (CTL)

µA

Common-mode input voltage range

VICM

VREG 1.7

High-level output voltage

VOH (CTL)

ITOC = 0.2 mA

VREG 1.2

VREG 0.8

Low-level output voltage

VOL (CTL)

ITOC = 0.2 mA

0.8

1.05

Open-loop gain

G (CTL)

f (CTL) = 1 kHz

PWM Oscillator Circuit

High-level output voltage

VOH (PWM

2.75

3.0

3.25

Low-level output voltage

VOL (PWM)

1.1

1.3

1.4

Amplitude

V (PWM)

1.5

1.7

2.0

Vp-p

External capacitor charge current

ICHG

VPWM = 2.1 V

125

µA

Oscillator frequency

f (PWM)

C = 2200 pF

15.5

19.5

27.0

kHz

TOC Pin

Input voltage 1

VTOC1

Output duty: 100%

2.72

3.0

3.30

Input voltage 2

VTOC2

Output duty: 0%

1.07

1.3

1.45

Input voltage 1L

VTOC1L

Design target value, when VREG = 4.7 V, 100%

2.72

2.80

2.90

Input voltage 2L

VTOC2L

Design target value, when VREG = 4.7 V, 0%

1.07

1.17

1.27

Input voltage 1H

VTOC1H

Design target value, when VREG = 5.3 V, 100%

3.08

3.20

3.30

Input voltage 2H

VTOC2H

Design target value, when VREG = 5.3 V, 0%

1.21

1.33

1.45

Continued on next page.

No.8095-3/12

LB11693

Parameter

Symbol

Conditions

Ratings

Unit

min

typ

max

RD Pin

Low-level output voltage

VOL (RD)

IRD = 5 mA

0.1

0.3

Output leakage current

IL (RD)

VRD = 28 V

µA

FG Pin

Low-level output voltage

VOL (FG)

IFG = 5 mA

0.1

0.3

Output leakage current

IL (FG)

VFG = 28 V

µA

FGFIL Pin

Charge current

IFGFIL1

µA

Discharge current

IFGFIL2

µA

FG Amplifier Schmitt Block (IN1)

Amplifier gain

G (FG)

Design target value

times

Hysteresis

VIS (FG)

Design target value, input equivalent

S/S Pin

High-level input voltage range

VIH (SS)

2.0

VREG

Low-level input voltage range

VIL (SS)

1.0

Input open voltage

VIO (SS)

2.6

2.9

3.2

Hysteresis

VIS (SS)

0.16

0.25

0.34

High-level input current

IIH (SS)

VS/S = VREG

100

130

µA

Low-level input current

IIL (SS)

VS/S = 0 V

170

130

µA

PWMIN Pin

Input frequency range

f (PI)

kHz

High-level input voltage range

VIH (PI)

2.0

VREG

Low-level input voltage range

VIL (PI)

1.0

Input open voltage

VIO (PI)

2.6

2.9

3.2

Hysteresis

VIS (PI)

0.16

0.25

0.34

High-level input current

IIH (PI)

VPWMIN = VREG

100

130

µA

Low-level input current

IIL (PI)

VPWMIN = 0 V

170

130

µA

F/R Pin

High-level input voltage range

VIH (FR)

2.0

VREG

Low-level input voltage range

VIL (FR)

1.0

Input open voltage

VIO (FR)

VREG 0.5

VREG

Hysteresis

VIS (FR)

0.16

0.25

0.34

High-level input current

IIH (FR)

VF/R = VREG

+10

µA

Low-level input current

IIL (FR)

VF/R = 0 V

165

115

µA

Continued from preceding page.

0.4

0.6

4.0

26.75

20.0

R1.7

8.4

(1.81)

1.78

1.0

12.7

11.2

Package Dimensions

unit : mm

3147C

SANYO : DIP28H (500mil)

4
3

-30

120

1.2

8.0

Ambient temperature, Ta --

With an infinite heat sink

Allowable power dissipation, Pdmax

Independent IC

Pdmax -- Ta

No.8095-5/12

LB11693

Pin Functions

Pin No.

Symbol

Function

Equivalent circuit

1
2

OUT1
OUT2
OUT3

Motor drive outputs

GND2

Motor drive output system ground

Low side output transistor drive current supply

Motor drive output power supply and output current
detection
Connect the resistor Rf between this pin and V

CC.

The output current will be limited to the current value set
by the equation IOUT = VRF/Rf.

300

VCC

Power supply for systems other than the motor drive
output

VREG

5 V regulator output
Insert a capacitor (about 0.1 µF) between this pin and
ground for stabilization.

VCC

LVS

Undervoltage protection voltage detection
To detect VREG, connect this pin to VREG.
To detect V

, set the detection voltage by inserting a

zener diode in series.

VREG

9.5 k

52 k

FGFIL

FG filter connection
This pin is normally left open. If noise on the FG signal is a
problem, insert a capacitor between this pin and ground.

VREG

300

Continued on next page.

No.8095-10/12

LB11693

Functional Description

1. Output Drive Circuit
This IC reduces motor vibration and noise by smoothly switching the output current when switching phases. Since
control of the change (slope) in the output current during phase switching uses the slope of the Hall sensor input
waveform, if the slope of the Hall sensor input waveform is too steep, the changes in the output current during phase
switching will also be too steep. This will reduce the noise and vibration minimizing effect of this design. Thus care is
required with regard to the slope of the Hall sensor input waveform.
Motor speed control is implemented by PWM switching of the low side output transistor. The drive output is adjusted
by changing the duty. The LB11693 includes the diode between OUT and VM used for the regenerative current when
the PWM signal is off.
When the slope (amplitude) of the Hall sensor input waveform is large, if the circuit is used with a large current, the
parasitic diode between OUT and ground will operate due to the low side kickback during phase switching. If waveform
disruptions or other problems occur, add an external rectifying diode or Schottky diode between OUT and ground.

2. Power Supply Stabilization
Since this IC uses a PWM switching technique, the power supply line level can be disturbed easily. Electrolytic
capacitors with adequate capacitance to stabilize the power supply lines must be inserted between V

and ground. The

power supply lines will be especially subject to disturbance if diodes are inserted in the power supply lines to prevent
damage if the power supply is connected with reversed polarity. Here, even larger capacitances should be used. The
connected electrolytic capacitors must be placed as close to the IC pins (V

, VM, and the two ground pins) as

possible. If the heat sink or some other obstacle prevents the electrolytic capacitors from being connected close to the
IC, ceramic capacitors with a capacitance of about 0.1 µF must be connected near the pins.

3. VREG Pin
The VREG pin is both the 5 V regulator output and the power supply for the IC's internal control circuits. Therefore, a
capacitor with a capacitance of at least 0.1 µF must be connected between VREG and ground. The ground side of the
connected capacitor must be connected to the GND1 pin with a line that is as short as possible.

4. FC Pin
The capacitor connected to the FC pin is required to correct the control loop frequency characteristics. (Use a value of
about 0.1 µF.)

5. VD Pin
The VD pin supplies the low side output transistor drive current (about 0.1 A, maximum).
The IC internal power consumption can be suppressed by connecting a resistor between the V

and VD pins to divide

the power consumption due to the low side transistor drive current. The IC internal power consumption due to the drive
current can be made smaller to the extent the VD pin voltage is lowered. However, a voltage of 4 V or higher must be
assured for the VD pin voltage. When used with V

= 24 V, insert a resistor of between 50

(0.5 W) and 100

W) between the V

and VD pins.

6. Hall Input Signals
A signal input with an amplitude (differential) of 50 mVp-p or higher is required for the Hall inputs. If disturbances in
the output waveform occur due to noise, capacitors must be connected across the Hall input pins (the + and sides).

7. Current Limiter Circuit
The current limiter circuit limits the output current peak value to a level determined by the equation I = VRF/Rf (VRF =
0.5 V typical, Rf: current detection resistor). This circuit limits the current by controlling the low side output transistor
PWM at the PWM frequency determined by the PWM pin external capacitor. In particular, it reduces the on duty of the
PWM signal.

8. Forward/Reverse Direction Switching
This IC is designed with the assumption that the motor direction (forward or reverse) will not be switched while the
motor is turning. We recommend operating this IC with the F/R pin held fixed at either the low or high level. When this
pin is left open, the internal pull-up resistor (about 40 k

) will set the pin to the high level. However, if there are large

fluctuations in signal levels in the circuit, this pull-up resistor should be strengthened by adding an external resistor.
If a direction switching operation is performed while the motor is turning, large currents will flow due to the braking
operation. However, this IC's current limiter circuit cannot limit these braking currents. Thus direction switching is only

No.8095-11/12

LB11693

possible if the braking current is limited to be under Iomax (1.8 A) by the motor coil resistance or other factors. Also,
since a transient through current will flow at the instant the direction is switched if the direction switching operation is
performed just from the F/R pin, a period where drive is turned off must be provided when switching directions.
Through currents must be prevented by setting the IC to the stop state with the S/S pin or TOC pin to provide a drive off
period where the duty due to the PWMIN pin is set to 0% and switching the F/R pin during that period.

9. Power Saving Circuit
This IC goes to a low-power mode (power saving state) when set to the stop state with the S/S pin. In the power saving
state, the bias currents in most of the circuits are cut off. However, the 5 V regulator output is still provided in the
power saving state.

10. Notes on the PWM Frequency
The PWM frequency is determined by the capacitor C (F) connected to the PWM pin.

PWM

1/(23400

It is preferable to use a frequency in the range 15 kHz to 25 kHz for the PWM frequency. The connected capacitor must
be connected to the GND1 pin with a line as short as possible.

11. Control Methods
The output duty can be controlled by either of the following methods

· Control based on comparing the TOC pin voltage to the PWM oscillator waveform

The low side output transistor duty is determined according to the result of comparing the TOC pin voltage to the
PWM oscillator waveform. When the TOC pin voltage is 1.3 V or lower, the duty will be 0%, and when it is 3.0 V
or higher, the duty will be 100%.
Since the TOC pin is the output of the control amplifier (CTL), a control voltage cannot be directly input to the
TOC pin. Normally, the control amplifier is used as a full feedback amplifier (with the EI pin connected to the
TOC pin) and a DC voltage is input to the EI+ pin (the EI+ pin voltage will become equal to the TOC pin voltage).
When the EI+ pin voltage becomes higher, the output duty increases. Since the motor will be driven when the EI+
pin is in the open state, a pull-down resistor must be connected to the EI+ pin if the motor should not operate when
EI+ is open.
When TOC pin voltage control is used, a low-level input must be applied to the PWMIN pin or that pin connected
to ground.

· Control based on a pulse signal input to the PWMIN pin

A pulse signal with a frequency in the range 15 to 25 kHz can be input to the PWMIN pin, and the duty of the low
side output transistor can be controlled based on the duty of that input signal. Note that the output is on when a low
level is input to the PWMIN pin, and off when a high level is input. When the PWMIN pin is open it goes to the
high level input and the output is be turned off.
When controlling motor operation from the PWMIN pin, the EI pin must be connected to ground, and the EI+ pin
must be connected to the TOC pin.

12. Undervoltage Protection Circuit
The undervoltage protection circuit turns the low side output transistor off when
the LVS pin voltage falls below the minimum operation voltage (about 3.8 V).
The operating voltage detection level is set up for 5 V systems. The detected
voltage level can be increased by shifting the voltage by inserting a zener diode
in series with the LVS pin. The LVS influx current during detection is about
65 µA. To minimize the effect of sample-to-sample variations in the zener
voltage, the current flowing in the zener diode must be increased thus
stabilizing the rise in the zener diode voltage. If this is required, insert a resistor between the LVS pin and ground.
If the LVS pin is left open, the internal pull-down resistor will result in the IC seeing a ground level input, and the
output will be turned off. Therefore, a voltage in excess of the LVS circuit clear voltage (about 4.3 V) must be applied
to the LVS pin if the application does not use the undervoltage protection circuit. The maximum rating for the LVS pin
applied voltage is 30 V.

13. Constraint Protection Circuit
When the motor is physically constrained (held stopped), the CSD pin external capacitor is charged (to about 3.0 V) by
a constant current of about 2.4 µA and is then discharged (to about 1.0 V) by a constant current of about 0.17 µA. This
process is repeated, generating a sawtooth waveform. The constraint protection circuit turns motor drive (the low side

To the LVS pin

To the power supply
level to be detected

PS No.8095-12/12

LB11693

Specifications of any and all SANYO products described or contained herein stipulate the performance,
characteristics, and functions of the described products in the independent state, and are not guarantees
of the performance, characteristics, and functions of the described products as mounted in the customer's
products or equipment. To verify symptoms and states that cannot be evaluated in an independent device,
the customer should always evaluate and test devices mounted in the customer's products or equipment.

SANYO Electric Co., Ltd. strives to supply high-quality high-reliability products. However, any and all
semiconductor products fail with some probability. It is possible that these probabilistic failures could
give rise to accidents or events that could endanger human lives, that could give rise to smoke or fire,
or that could cause damage to other property. When designing equipment, adopt safety measures so
that these kinds of accidents or events cannot occur. Such measures include but are not limited to protective
circuits and error prevention circuits for safe design, redundant design, and structural design.

In the event that any or all SANYO products(including technical data,services) d escribed or
contained herein are controlled under any of applicable local export control laws and regulations,
such products must not be expor ted without obtaining the expor t license from the author ities
concerned in accordance with the above law.

No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system,
or otherwise, without the prior written permission of SANYO Electric Co. , Ltd.

Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification"
for the SANYO product that you intend to use.

Information (including circuit diagrams and circuit parameters) herein is for example only ; it is not
guaranteed for volume production. SANYO believes information herein is accurate and reliable, but
no guarantees are made or implied regarding its use or any infringements of intellectual property rights
or other rights of third parties.

This catalog provides information as of November, 2004. Specifications and information herein are

subject to change without notice.

output transistor) on and off repeatedly based on this sawtooth waveform. Motor drive is on during the period the CSD
pin external capacitor is being charged from about 1.0 V to about 3.0 V, and motor drive is off during the period the
CSD pin external capacitor is being discharged from about 3.0 V to about 1.0 V. The IC and the motor are protected by
this repeated drive on/off operation when the motor is physically constrained. When a 0.47 µF capacitor is connected to
the CSD pin, this repeated operation will turn motor drive on for about 0.4 seconds and off for about 5.5 seconds.
When the motor is turning, the CSD pin is held at a certain fixed voltage (which varies depending on the motor speed)
by the CSD pin external capacitor being charged and discharged by two processes. One is the constant current (about
2.4 µA) charge current, and the other is a roughly 10 µs discharge pulse generated internal in the IC when the Hall
sensor input IN1 changes state (on rising and falling edges on the FG output).
Since the Hall sensor input IN1 does not change state when the motor is not turning, discharge pulses are not generated,
and the CSD pin external capacitor is charged by the approximately 2.4 µA constant current until it reaches about 3.0 V.
At that point, the constraint protection circuit operates. The constraint protection state is cleared if the motor constraint
is released.
When the motor turns at an extremely low rate, the CSD pin voltage during this motor rotation will be held at a
relatively high voltage, and the constraint protection circuit will operate if this reaches the roughly 3.0 V threshold
level. Since the constraint protection circuit may operate if the Hall sensor input IN1 frequency falls below about 10 Hz,
care is required when using the constraint protection circuit with a motor that turns slowly.
Connect the CSD pin to ground if the constraint protection circuit is not used.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LB11693

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: LB11693