Document Outline

• Title Page - SPRS161H
• features
• Table of Contents
• description
• TMS320x240xA device summary
• functional block diagram of the LF2401A DSP controller
• functional block diagram of the LC2401A DSP controller
• terminal functions
• constraints while emulating with JTAG port pins and GPIO functions
• in-circuit emulation options
• memory map
• peripheral memory map
• device reset and interrupts
  • interrupt request structure
• DSP CPU core
• TMS320Lx2401A instruction set
  • addressing modes
• scan-based emulation
• functional block diagram of the 2401A DSP CPU
  • 2401A legend for the internal hardware
  • status and control registers
  • central processing unit
    • input scaling shifter
    • multiplier
    • central arithmetic logic unit
    • accumulator
    • auxiliary registers and auxiliary-register arithmetic unit (ARAU)
• internal memory
  • dual-access RAM (DARAM)
  • single-access RAM (SARAM)
  • ROM (LC2401A)
  • Flash EEPROM (LF2401A)
  • boot ROM�
  • Flash/ROM security
• PERIPHERALS
  • event manager module (EVA)
    • general-purpose (GP) timers
    • full-compare units
    • programmable deadband generator
    • PWM waveform generation
    • PWM characteristics
    • capture unit
    • input qualifier circuitry
  • enhanced analog-to-digital converter (ADC) module
  • serial communications interface (SCI) module
  • PLL-based clock module
    • external reference crystal clock option
    • external reference oscillator clock option
  • low-power modes
  • clock domains
  • other power-down options
  • digital I/O and shared pin functions
    • description of shared I/O pins
    • digital I/O control registers
  • watchdog (WD) timer module
• development support
  • Software Development Tools:
  • Hardware Development Tools:
  • device and development support tool nomenclature
    • TMX
    • TMP
    • TMS
    • TMDX
    • TMDS
  • documentation support
• LF2401A AND LC2401A ELECTRICAL SPECIFICATIONS DATA
  • absolute maximum ratings over operating case temperature range (unless otherwise noted)�
  • recommended operating conditions�
  • electrical characteristics over recommended operating case temperature range (unless otherwise noted)
  • current consumption by power-supply pins over recommended operating case temperature range at 40- MHz CLOCKOUT� ( LF2401A)
  • current consumption by power-supply pins over recommended operating case temperature range at 40- MHz CLOCKOUT� ( LC2401A)
  • current consumption by power-supply pins over recommended operating case temperature range during low- power modes at 40- MHz CLOCKOUT� ( LF2401A)
  • current consumption by power-supply pins over recommended operating case temperature range during low- power modes at 40- MHz CLOCKOUT� ( LC2401A)
• current consumption graphs
• reducing current consumption
• PARAMETER MEASUREMENT INFORMATION
  • signal transition levels
  • timing parameter symbology
  • general notes on timing parameters
• external reference crystal/clock with PLL circuit enabled
  • timing with the PLL circuit enabled
  • switching characteristics over recommended operating conditions [H = 0.5 tc(CO)] (see Figure 25)
  • timing requirements (see Figure 25)
• RS\ timing
  • timing requirements for a reset [H = 0.5tc(CO)] (see Figure 26 and Figure 27)
  • switching characteristics over recommended operating conditions for a reset [H = 0.5tc(CO)] (see Figure 28)
• low-power mode timing
  • switching characteristics over recommended operating conditions [H = 0.5tc(CO)] (see Figure 29, Figure 30, and Figure 31)
• LPM2 wake-up timing
  • switching characteristics over recommended operating conditions (see Figure 32)
  • timing requirements (see Figure 32)
• TIMING EVENT MANAGER INTERFACE
  • PWM timing
    • switching characteristics over recommended operating conditions for PWM timing [H = 0.5tc(CO)] (see Figure 33)
  • capture timing
    • timing requirements (see Figure 34)
  • interrupt timing
    • switching characteristics over recommended operating conditions (see Figure 35)
    • timing requirements (see Figure 35)
  • general-purpose input/output timing
    • switching characteristics over recommended operating conditions (see Figure 36)
    • timing requirements [H = 0.5tc(CO)] (see Figure 37)
  • 10-bit analog-to-digital converter (ADC)
  • recommended operating conditions
  • ADC operating frequency
  • operating characteristics over recommended operating condition ranges
  • internal ADC module timing� (see Figure 38)
  • Flash parameters @40 MHz CLOCKOUT (LF2401A)
• migrating from other 240xA devices to Lx2401A
  • PLL
  • on-chip bootloader
  • GPIO
  • EV
  • ADC
  • pins
  • DINR
  • XF pin
• peripheral register description
• MECHANICAL DATA
  • VF (S-PQFP-G32) PLASTIC QUAD FLATPACK
• REVISION HISTORY
• IMPORTANT NOTICE