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Электронный компонент: LC72133M

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CMOS LSI
Ordering number : EN5427A
22897HA (OT)/63196HA (OT) No. 5427-1/22
LC72133M, 72133V
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
PLL Frequency Synthesizer for
Electronic Tuning
Overview
The LC72133M and LC72133V are a phase-locked loop
frequency synthesizer LSI circuits for use in radio tuners.
It supports low-voltage (2.7 to 3.6 V) operation and can
implement high-performance AM/FM tuners easily.
Functions
High speed programmable dividers
-- FMIN: 10 to 120 MHz ..........pulse swallower
(built-in divide-by-two prescaler), V
DD
2.7 V
10 to 130 MHz ..........pulse swallower
(built-in divide-by-two prescaler), V
DD
3.0 V
-- AMIN: 2 to 40 MHz ..............pulse swallower
0.5 to 10 MHz ...........direct division
IF counter
-- IFIN:
0.4 to 12 MHz ...........AM/FM IF counter
Reference frequencies
-- Twelve selectable frequencies
(4.5 or 7.2 MHz crystal)
1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50 and 100 kHz
Phase comparator
-- Dead zone control
-- Unlock detection circuit
-- Deadlock clear circuit
Built-in MOS transistor for forming an active low-pass
filter
I/O ports
-- Dedicated output ports: 4
-- Input or output ports: 2
-- Support clock time base output
Serial data I/O
-- Support CCB format communication with the
system controller.
Operating ranges
-- Supply voltage........................2.7 to 3.6 V
-- Operating temperature............20 to +70C
Package
MFP20
SSOP20
Package Dimensions
unit: mm
3036B-MFP20
unit: mm
3179A-SSOP20
SANYO: MFP20
[LC72133M]
SANYO: SSOP20
[LC72133V]
CCB is a trademark of SANYO ELECTRIC CO., LTD.
CCB is SANYO's original bus format and all the bus
addresses are controlled by SANYO.
Pin Assignment
Block Diagram
No. 5427-2/22
LC72133M, 72133V
Specifications
Absolute Maximum Ratings
at Ta = 25C, V
SS
= 0 V
Allowable Operating Ranges
at Ta = 20 to +70C, V
SS
= 0 V
Note:
*
Recommended crystal oscillator CI values:
CI
120
(For a 4.5 MHz crystal)
CI
70
(For a 7.2 MHz crystal)
<Sample Oscillator Circuit>
Crystal oscillator: HC-49/U (manufactured by Kinseki, Ltd.), CL = 12 pF
C1 = C2 = 15 pF
The circuit constants for the crystal oscillator circuit depend on the crystal used, the printed circuit board pattern, and other items. Therefore we
recommend consulting with the manufacturer of the crystal for evaluation and reliability.
No. 5427-3/22
LC72133M, 72133V
Parameter
Symbol
Pins
Ratings
Unit
Supply voltage
V
DD
max
V
DD
0.3 to +5.5
V
V
IN
1 max
CE, CL, DI, AIN
0.3 to +5.5
V
Maximum input voltage
V
IN
2 max
XIN, FMIN, AMIN, IFIN
0.3 to V
DD
+ 0.3
V
V
IN
3 max
IO1, IO2
0.3 to +15
V
V
O
1 max
DO
0.3 to +5.5
V
Maximum output voltage
V
O
2 max
XOUT, PD
0.3 to V
DD
+ 0.3
V
V
O
3 max
BO1 to BO4, IO1, IO2, AOUT
0.3 to +15
V
I
O
1 max
BO1
0 to 3.0
mA
Maximum output current
I
O
2 max
AOUT, DO
0 to 6.0
mA
I
O
3 max
BO2 to BO4, IO1, IO2
0 to 6.0
mA
Allowable power dissipation
Pd max
Ta
70C: LC72133M
180
mW
Ta
70C: LC72133V
160
mW
Operating temperature
Topr
20 to +70
C
Storage temperature
Tstg
40 to +125
C
Parameter
Symbol
Pins
Conditions
min
typ
max
Unit
Supply voltage
V
DD
V
DD
2.7
3.6
V
Input high-level voltage
V
IH
1
CE, CL, DI
0.7 V
DD
5.5
V
V
IH
2
IO1, IO2
0.7 V
DD
13
V
Input low-level voltage
V
IL
CE, CL, DI, IO1, IO2
0
0.3 V
DD
V
V
O
1
DO
0
5.5
V
Output voltage
V
O
2
BO1 to BO4, IO1, IO2,
0
13
V
AOUT
f
IN
1
XIN
V
IN
1
1
8
MHz
f
IN
2-1
FMIN
V
IN
2-1
10
90
MHz
f
IN
2-2
FMIN
V
IN
2-2
10
120
MHz
Input frequency
f
IN
2-3
FMIN
V
IN
2-1, V
DD
3.0 V
10
130
MHz
f
IN
3
AMIN
V
IN
3, SNS = 1
2
40
MHz
f
IN
4
AMIN
V
IN
4, SNS = 0
0.5
10
MHz
f
IN
5
IFIN
V
IN
5
0.4
12
MHz
V
IN
1
XIN
f
IN
1
400
900
mVrms
V
IN
2-1
FMIN
f
IN
2-1, f
IN
2-3
70
900
mVrms
V
IN
2-2
FMIN
f
IN
2-2
100
900
mVrms
Input amplitude
V
IN
3
AMIN
f
IN
3, SNS = 1
70
900
mVrms
V
IN
4
AMIN
f
IN
4, SNS = 0
70
900
mVrms
V
IN
5-1
IFIN
f
IN
5, IFS = 1
70
900
mVrms
V
IN
5-2
IFIN
f
IN
6, IFS = 0
100
900
mVrms
Supported crystals
Xtal
XIN, XOUT
*
4.0
8.0
MHz
Electrical Characteristics for the Allowable Operating Ranges
at Ta = 20 to +70C, V
SS
= 0 V
No. 5427-4/22
LC72133M, 72133V
Parameter
Symbol
Pins
Conditions
min
typ
max
Unit
Rf1
XIN
1.0
M
Built-in feedback resistance
Rf2
FMIN
500
k
Rf3
AMIN
500
k
Rf4
IFIN
250
k
Built-in pull-down resistor
Rpd1
FMIN
200
k
Rpd2
AMIN
200
k
Hysteresis
V
HIS
CE, CL, DI, IO1, IO2
0.1 V
DD
V
Output high level voltage
V
OH
1
PD
I
O
= 1 mA
V
DD
1.0
V
V
OL
1
PD
I
O
= 1 mA
1.0
V
V
OL
2
BO1
I
O
= 0.5 mA
0.6
V
I
O
= 1 mA
1.2
V
Output low level voltage
V
OL
3
DO
I
O
= 1 mA
0.25
V
I
O
= 3 mA
0.75
V
V
OL
4
BO2 to BO4, IO1, IO2
I
O
= 1 mA
0.25
V
I
O
= 5 mA
1.25
V
V
OL
5
AOUT
I
O
= 1 mA, AIN = 1.3 V
0.5
V
I
IH
1
CE, CL, DI
V
I
= 5.5 V
5.0
A
I
IH
2
IO1, IO2
V
I
= 13 V
5.0
A
Input high level current
I
IH
3
XIN
V
I
= V
DD
1.3
8
A
I
IH
4
FMIN, AMIN
V
I
= V
DD
2.7
15
A
I
IH
5
IFIN
V
I
= V
DD
5.4
30
A
I
IH
6
AIN
V
I
= 5.5 V
200
nA
I
IL
1
CE, CL, DI
V
I
= 0 V
5.0
A
I
IL
2
IO1, IO2
V
I
= 0 V
5.0
A
Input low level current
I
IL
3
XIN
V
I
= 0 V
1.3
8
A
I
IL
4
FMIN, AMIN
V
I
= 0 V
2.7
15
A
I
IL
5
IFIN
V
I
= 0 V
5.4
30
A
I
IL
6
AIN
V
I
= 0 V
200
nA
I
OFF
1
BO1 to BO4, AOUT,
V
O
= 13 V
5.0
A
Output off leakage current
IO1, IO2
I
OFF
2
DO
V
O
= 5.5 V
5.0
A
High level three-state
I
OFFH
PD
V
O
= V
DD
0.01
200
nA
off leakage current
Low level three-state
I
OFFL
PD
V
O
= 0 V
0.01
200
nA
off leakage current
Input capacitance
C
IN
FMIN
6
pF
Xtal = 7.2 MHz,
I
DD
1
V
DD
f
IN
2 = 130 MHz,
2
5
mA
V
IN
2 = 70 mVrms
PLL block stopped
Current drain
I
DD
2
V
DD
(PLL INHIBIT),
0.3
mA
Xtal oscillator operating
(Xtal = 7.2 MHz)
I
DD
3
V
DD
PLL block stopped
30
A
Xtal oscillator stopped
Pin Functions
No. 5427-5/22
LC72133M, 72133V
Symbol
Pin No.
Type
Functions
Circuit configuration
XIN
XOUT
FMIN
AMIN
CE
CL
DI
DO
V
DD
1
20
14
13
2
4
3
5
15
Xtal OSC
Local oscillator
signal input
Local oscillator
signal input
Chip enable
Clock
Data input
Data output
Power supply
Crystal resonator connection
(4.5/7.2 MHz)
FMIN is selected when the serial data input DVS bit is
set to 1.
The input frequency range is from 10 to 130 MHz.
The input signal passes through the internal divide-by-
two prescaler and is input to the swallow counter.
The divisor can be in the range 272 to 65535. However,
since the signal has passed through the divide-by-two
prescaler, the actual divisor is twice the set value.
AMIN is selected when the serial data input DVS bit is
set to 0.
When the serial data input SNS bit is set to 1:
-- The input frequency range is 2 to 40 MHz.
-- The signal is directly input to the swallow counter.
-- The divisor can be in the range 272 to 65535, and
the divisor used will be the value set.
When the serial data input SNS bit is set to 0:
-- The input frequency range is 0.5 to 10 MHz.
-- The signal is directly input to a 12-bit programmable
divider.
-- The divisor can be in the range 4 to 4095, and the
divisor used will be the value set.
Set this pin high when inputting (DI) or outputting (DO)
serial data.
Used as the synchronization clock when inputting (DI) or
outputting (DO) serial data.
Inputs serial data transferred from the controller to the
LC72133.
Outputs serial data transferred from the LC72133 to the
controller.
The content of the output data is determined by the
serial data DOC0 to DOC2.
The LC72133 power supply pin (V
DD
= 2.7 to 3.6 V)
The power on reset circuit operates when power is first
applied.
Continued on next page.
Operating
FMIN input frequency
conditions
10 to 90 MHz
10 to 120 MHz 10 to 130 MHz
Operating power-
2.7 to 3.6 V
2.7 to 3.6 V
3.0 to 3.6 V
supply voltage
Operating input
70 to 900
100 to 900
70 to 900
levels
mVrms
mVrms
mVrms