D2700 RM (IM) Shindo No.6844-1/19

Ver.1.00

00000

Preliminary
Overview

The LC863532/28/24/20/16A are 8-bit single chip microcontrollers with the following on-chip functional blocks:

- CPU : Operable at a minimum bus cycle time of 0.424

- On-chip ROM capacity

Program ROM : 32K/28K/24K/20K/16K bytes
CGROM : 16K bytes

- On-chip RAM capacity : 512 bytes
- OSD RAM : 352

9 bits

- Closed-Caption TV controller and the on-screen display controller
- Four channels

6-bit AD Converter

- Three channels

7-bit PWM

- Two channels

16-bit timer/counter, 14-bit base timer

- IIC-bus compliant serial interface circuit (Multi-master type)
- ROM correction function
- 12-source 8-vectored interrupt system
- Integrated system clock generator and display clock generator

Only one X'tal oscillator (32.768kHz) for PLL reference is used for both generators
TV control and the Closed Caption function

All of the above functions are fabricated on a single chip.

Note : This product includes the IIC bus interface circuit. If you intend to use the IIC bus interface, please

notify us of this in advance of our receiving your program ROM code order.

Purchase of SANYO IIC components conveys a license under the Philips IIC Patents Rights to use these

components in an IIC system, provided that the system conforms to the IIC Standard Specification as
defined by Philips.

Trademarks
IIC is a trademark of Philips Corporation.

8-Bit Single-Chip Microcontroller

LC863532A/28A/24A/20A/16A

Ordering number : ENN*6844

CMOS IC

LC863532A/28A/24A/20A/16A

No.6844-2/19

Features

(1) Read-Only Memory (ROM) :

32768

8 bits / 28672

8 bits / 24576

8 bits

20486

8 bits / 16384

8 bits for program

16128

8 bits for CGROM

(2) Random Access Memory (RAM) :

384

8 bits (working area)

128

8 bits (working or ROM correction function)

352

9 bits (for CRT display)

(3) OSD functions

- Screen display

: 36 characters

16 lines (by software)

- RAM

: 352 words (9 bits per word)

Display area

: 36 words

8 lines

Control area

: 8 words

8 lines

- Characters

Up to 252 kinds of 16

32 dot character fonts

(4 characters including 1 test character are not programmable)

Each font can be divided into two parts and used as two fonts (Ex. 16

16 dot character font

At least 111 characters need to be divide between a 16

18 dot and 8

9 dot character font to display the caption

fonts.

- Various character attributes

Character colors

: 16 colors (analog mode: lv

p-p

output) / 8 colors (digital/mode)

Character background colors

: 16 colors (analog mode: lv

p-p

output) / 8 colors (digital/mode)

Fringe / shadow colors

: 16 colors (analog mode: lv

p-p

output) / 8 colors (digital/mode)

Full screen colors

: 16 colors (analog mode: lv

p-p

output) / 8 colors (digital/mode)

Rounding
Underline
Italic

character

(slanting)

- Attribute can be changed without spacing
- Vertical display start line number can be set for each row independently (Rows can be overlapped)
- Horizontal display start position can be set for each row independently
- Horizontal pitch (bit 9 - 16)

and vertical pitch (bit-32) can be set for each row independently

- Different display modes can be set for each row independently
Caption

· Text mode / OSD mode 1 / OSD mode 2 (Quarter size) / Simplifed graphic mode

- Ten character sizes

Horez.

Vert. = (1

1), (1

2), (2

4), (0.5

0.5)

(1.5

1), (1.5

2), (3

4), (0.75

0.5)

- Shuttering and scrolling on each row
- Simplified Graphic Display
*1 Note : range depends on display mode : refer to the manual for details.

(4) Bus Cycle Time / Instruction-Cycle Time

Bus cycle time Instruction cycle time Clock divider System clock oscillation Oscillation Frequency

Voltage

0.424

s 0.848

1/2 Internal

VCO

(Ref : X'tal 32.768kHz)

14.156MHz

4.5V to 5.5V

7.5

s 15.0

1/2

Internal RC

800kHz

4.5V to 5.5V

91.55

s 183.1

1/1

Crystal

32.768kHz

4.5V to 5.5V

183.1

s 366.2

1/2

Crystal

32.768kHz

4.5V to 5.5V

(5) Ports

- Input / Output Ports

: 4 ports (24 terminals)

Data direction programmable in nibble units

: 1 port (8 terminals)

(If the N-ch open drain output is selected by option, the corresponding port data can be read in output mode.)

Data direction programmable for each bit individually

: 3 ports (16 terminals)

LC863532A/28A/24A/20A/16A

No.6844-3/19

(6) AD converter

- 4 channels

6-bit AD converters

(7) Serial interfaces

- IIC-bus compliant serial interface (Multi-master type)

Consists of a single built-in circuit with two I/O channels. The two data lines and two clock lines can be connected
internally.

(8) PWM output

- 3 channels

7-bit PWM

(9) Timer

- Timer 0 : 16-bit timer/counter

With 2-bit prescaler + 8-bit programmable prescaler
Mode 0 : Two 8-bit timers with a programmable prescaler
Mode 1 : 8-bit timer with a programmable prescaler + 8-bit counter
Mode 2 : 16-bit timer with a programmable prescaler
Mode 3 : 16-bit counter

The resolution of timer is 1 tCYC.

- Timer 1 : 16-bit timer/PWM

Mode 0 : Two 8-bit timers
Mode 1 : 8-bit timer + 8-bit PWM
Mode 2 : 16-bit timer
Mode 3 : a variable-bit PWM (9 to 16 bits)

In mode 0/1, the resolution of timer/PWM is 1 tCYC

In mode 2/3, the resolution of timer/PWM is selectable by program; tCYC or 1/2 tCYC

- Base timer

Generate every 500ms overflow for a clock application (using 32.768kHz crystal oscillation for the base timer clock)
Generate every 976µs, 3.9ms, 15.6ms, 62.5ms overflow (using 32.768kHz crystal oscillation for the base timer
clock)
Clock for the base timer is selectable from 32.768kHz crystal oscillation, system clock or programmable prescaler
output of Timer 0

(10) Remote control receiver circuit (connected to the P73/INT3/T0IN terminal)

- Noise rejection function
- Polarity switching

(11) Watchdog timer

External RC circuit is required
Interrupt or system reset is activated when the timer overflows

(12) ROM correction function

Max 128 bytes / 2 addresses

LC863532A/28A/24A/20A/16A

No.6844-4/19

(13) Interrupts

- 12 sources 8 vectored interrupts

1. External Interrupt INT0

2. External Interrupt INT1

3. External Interrupt INT2, Timer/counter T0L (Lower 8 bits)

4. External Interrupt INT3, base timer

5. Timer/counter T0H (Upper 8 bits)

6. Timer T1H, Timer T1L

7. Vertical synchronous signal interrupt ( VS ), horizontal line (

)

IIC

- Interrupt priority control

Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high
priority can be assigned to the interrupts from 3 to 8 listed above. For the external interrupt INT0 and INT1, low or
highest priority can be set.

(14) Sub-routine stack level

- A maximum of 128 levels (stack is built in the internal RAM)

(15) Multiplication/division instruction
-

bits

8 bits (7 instruction cycle times)

- 16 bits / 8 bits (7 instruction cycle times)

(16) 3 oscillation circuits

- Built-in RC oscillation circuit used for the system clock

- Built-in VCO circuit used for the system clock and OSD
- X'tal oscillation circuit used for base timer, system clock and PLL reference

(17) Standby function

- HALT mode

The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is
stopped. This mode can be released by the interrupt request or the system reset.

- HOLD mode

The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X'tal oscillations. This mode can be
released by the following conditions.
· Pull the reset terminal ( RES ) to low level.
· Feed the selected level to either P70/INT0 or P71/INT1.

(18) Package

- MFP36S
- DIP36S

(19) Development tools

- Flash EEPROM:

LC86F3548A

- Evaluation chip:

LC863096

- Emulator:

EVA86000 (main) + ECB863400 (evaluation chip board)

+ POD36-CABLE (cable)
+ POD36-DIP (for DIP36S)
or POD36-MFP (for MFP36S)

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