Absolute Maximum Ratings
Symbol
Parameter
Value
Units
V
DSS
Drain to Source Voltage
500
V
I
D
Continuous Drain Current(@T
C
= 25
C)
8
A
Continuous Drain Current(@T
C
= 100
C)
5.1
A
I
DM
Drain Current Pulsed
(Note 1)
32
A
V
GS
Gate to Source Voltage
30
V
E
AS
Single Pulsed Avalanche Energy
(Note 2)
660
mJ
E
AR
Repetitive Avalanche Energy
(Note 1)
12.5
mJ
dv/dt
Peak Diode Recovery dv/dt
(Note 3)
5
V/ns
P
D
Total Power Dissipation(@T
C
= 25 C)
125
W
Derating Factor above 25 C
1.0
W/C
T
STG,
T
J
Operating Junction Temperature & Storage Temperature
- 55 ~ 150
C
T
L
Maximum Lead Temperature for soldering purpose,
1/8 from Case for 5 seconds.
300
C
Thermal Characteristics
Symbol
Parameter
Value
Units
Min.
Typ.
Max.
R
JC
Thermal Resistance, Junction-to-Case
-
-
1
C/W
R
CS
Thermal Resistance, Case to Sink
-
0.5
-
C/W
R
JA
Thermal Resistance, Junction-to-Ambient
-
-
62
C/W
SFP840
May, 2003. Rev. 0.
1/7
Features
High ruggedness
R
DS(on)
(Max 0.85 )@V
GS
=10V
Gate Charge (Typical 48nC)
Improved dv/dt Capability, High ruggedness
100% Avalanche Tested
Maximum Junction Temperature Range (150C)
General Description
This Power MOSFET is produced using SemiWell's advanced
planar stripe, DMOS technology. This latest technology has been
especially designed to minimize on-state resistance, have a high
rugged avalanche characteristics. This devices is specially well
suited for half bridge and full bridge resonant topolgy like a
electronic lamp ballast.
N-Channel MOSFET
SemiWell
Semiconductor
Copyright@SemiWell Semiconductor Co., Ltd., All rights reserved.
Symbol
2. Drain
3. Source
1. Gate
TO-220
1 2
3
Electrical Characteristics
( T
C
= 25 C unless otherwise noted )
Symbol
Parameter
Test Conditions
Min
Typ
Max
Units
Off Characteristics
BV
DSS
Drain-Source Breakdown Voltage
V
GS
= 0V, I
D
= 250uA
500
-
-
V
BV
DSS
/
T
J
Breakdown Voltage Temperature
coefficient
I
D
= 250uA, referenced to 25 C
-
0.6
-
V/C
I
DSS
Drain-Source Leakage Current
V
DS
= 500V, V
GS
= 0V
-
-
1
uA
V
DS
= 400V, T
C
= 125 C
-
-
10
uA
I
GSS
Gate-Source Leakage, Forward
V
GS
= 30V, V
DS
= 0V
-
-
100
nA
Gate-source Leakage, Reverse
V
GS
= -30V, V
DS
= 0V
-
-
-100
nA
On Characteristics
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 250uA
2.0
-
4.0
V
R
DS(ON)
Static Drain-Source On-state Resis-
tance
V
GS
=10 V, I
D
= 4A
-
-
0.85
Dynamic Characteristics
C
iss
Input Capacitance
V
GS
=0 V, V
DS
=25V, f = 1MHz
-
1470
-
pF
C
oss
Output Capacitance
-
170
-
C
rss
Reverse Transfer Capacitance
-
40
-
Dynamic Characteristics
t
d(on)
Turn-on Delay Time
V
DD
=250V, I
D
=8A, R
G
=50
see fig. 13.
(Note 4, 5)
-
22
-
ns
t
r
Rise Time
-
25
-
t
d(off)
Turn-off Delay Time
-
130
-
t
f
Fall Time
-
30
-
Q
g
Total Gate Charge
V
DS
=400V, V
GS
=10V, I
D
=8A
see fig. 12.
(Note 4, 5)
-
48
60
nC
Q
gs
Gate-Source Charge
-
7
-
Q
gd
Gate-Drain Charge(Miller Charge)
-
20
-
Source-Drain Diode Ratings and Characteristics
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit.
I
S
Continuous Source Current
Integral Reverse p-n Junction
Diode in the MOSFET
-
-
8
A
I
SM
Pulsed Source Current
-
-
32
V
SD
Diode Forward Voltage
I
S
=8A, V
GS
=0V
-
-
2.0
V
t
rr
Reverse Recovery Time
I
S
=8A, V
GS
=0V, dI
F
/dt=100A/us
-
335
-
ns
Q
rr
Reverse Recovery Charge
-
3.6
-
uC
SFP840
NOTES
1. Repeativity rating : pulse width limited by junction temperature
2. L = 18.5mH, I
AS
=8A, V
DD
= 50V, R
G
= 0 , Starting T
J
= 25C
3. I
SD
10A, di/dt 300A/us, V
DD
BV
DSS
, Starting T
J
= 25C
4. Pulse Test : Pulse Width 300us, Duty Cycle 2%
5. Essentially independent of operating temperature.
2/7
0
5
10
15
20
25
30
35
40
0
500
1000
1500
2000
2500
3000
C
iss
=C
gs
+C
gd
(C
ds
=shorted)
C
oss
=C
ds
+C
gd
C
rss
=C
gd
Notes :
1. V
GS
= 0V
2. f=1MHz
C
iss
C
oss
C
rss
Ca
pa
cit
anc
e [
p
F]
V
DS
, Drain-Source Voltage [V]
2
3
4
5
6
7
8
9
10
10
-1
10
0
10
1
V
GS
, Gate-Source Voltage [V]
I
D
, D
r
ain C
u
rrent [A
]
150
o
C
25
o
C
-55
o
C
Notes :
1. V
DS
= 50V
2. 250 s Pulse Test
0.2
0.4
0.6
0.8
1.0
1.2
1.4
1.6
10
-1
10
0
10
1
V
SD
, Source-Drain Voltage [V]
I
DR
,
Reverse Drain
C
u
r
r
ent
[A]
Notes :
1. V
GS
= 0V
2. 250 s Pulse Test
150
25
0
10
20
30
40
50
60
0
2
4
6
8
10
12
V
GS
, G
a
te-Sou
rce
Vol
t
a
ge
[V]
V
DS
= 250V
V
DS
= 400V
Note : I
D
= 8 A
Q
G
, Total Gate Charge [nC]
0
5
10
15
20
25
0.4
0.6
0.8
1.0
1.2
1.4
1.6
1.8
I
D
, Drain Current [A]
R
DS
(
O
N
)
,
D
r
ai
n-Sourc
e
O
n
-R
es
is
tanc
e [
]
V
GS
= 20V
V
GS
= 10V
10
-1
10
0
10
1
10
-1
10
0
10
1
V
DS
, Drain-Source Voltage [V]
I
D
, Drain Current [A]
Top : 15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
Bottom : 4.5V
3/7
Fig 3. On Resistance Variation vs.
Drain Current and Gate Voltage
Fig 4. On State Current vs.
Allowable Case Temperature
Fig 5. Capacitance Characteristics
Fig 6. Gate Charge Characteristics
SFP840
Fig 1. On-State Characteristics
Fig 2. Transfer Characteristics
-100
-50
0
50
100
150
200
0.0
0.5
1.0
1.5
2.0
2.5
3.0
R
DS
(
o
n)
, (Norm
a
li
z
ed)
Drai
n-Sou
r
c
e
O
n
-Res
i
s
t
a
nc
e
T
J
, Junction Temperature [
o
C]
Notes :
1. V
GS
= 10 V
2. I
D
= 4 A
-100
-50
0
50
100
150
200
0.8
0.9
1.0
1.1
1.2
BV
DS
S
,
(N
ormali
zed)
D
r
ain
-
S
ourc
e
B
r
e
a
kdo
w
n Voltage
T
J
, Junction Temperature [
o
C]
Notes :
1. V
GS
= 0 V
2. I
D
= 250 A
10
0
10
1
10
2
10
3
10
-1
10
0
10
1
10
2
DC
10 ms
1 ms
100 s
Operation in This Area
is Limited by R
DS(on)
Notes :
1. T
C
= 25
o
C
2. T
J
= 150
o
C
3. Single Pulse
I
D
, D
r
ain
C
u
rr
ent [A]
V
DS
, Drain-Source Voltage [V]
25
50
75
100
125
150
0
2
4
6
8
T
C'
Case Temperature [
o
C]
I
D'
Dr
a
i
n Cu
rren
t
[
A
]
1 0
-5
1 0
-4
1 0
-3
1 0
-2
1 0
-1
1 0
0
1 0
1
1 0
-2
1 0
-1
1 0
0
N o te s :
1 . Z
JC
(t) = 1
/W M a x.
2 . D u ty F a c to r, D = t
1
/t
2
3 . T
JM
- T
C
= P
D M
* Z
JC
(t)
s in g le p u ls e
D = 0 .5
0 .0 2
0 .2
0 .0 5
0 .1
0 .0 1
Z
JC
(
t
)
,
T
her
mal Res
pons
e
t
1
, S q u a re W a ve P u ls e D u ra tio n [s e c ]
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current
vs. Case Temperature
Fig 11. Transient Thermal Response Curve
Fig 7. Breakdown Voltage Variation
Fig 8. On-Resistance Variation
SFP840
4/7
5/7
Fig 13. Switching Time Test Circuit & Waveforms
Fig 14. Unclamped Inductive Switching Test Circuit & Waveforms
SFP840
Fig. 12. Gate Charge Test Circuit & Waveforms
E
AS
=
L
L
I
AS
2
----
2
1
--------------------
BV
DSS
-- V
DD
BV
DSS
E
AS
=
L
L
I
AS
2
----
2
1
E
AS
=
L
L
I
AS
2
----
2
1
----
2
1
--------------------
BV
DSS
-- V
DD
BV
DSS
V
DD
V
DS
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
BV
DSS
t
p
V
DD
I
AS
V
DS
(t)
I
D
(t)
Time
10V
DUT
R
G
L
L
I
D
I
D
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
1mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
Charge
V
GS
10V
Q
g
Q
gs
Q
gd
1mA
V
GS
DUT
V
DS
300nF
50K
200nF
12V
Same Type
as DUT
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
10V
V
DS
R
L
DUT
Pulse
Generator
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
V
V
DS
R
L
DUT
Pulse
Generator
R
G
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
10V
V
DS
R
L
DUT
Pulse
Generator
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
in
V
DS
10%
90%
t
d(on)
t
r
t
on
t
off
t
d(off)
t
f
V
DD
( 0.5 rated V
DS
)
V
V
DS
R
L
DUT
Pulse
Generator
R
G
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