LapCoder

UR5HCFJ8

Low-Power Keyboard

Encoder for Portable Systems

LapCoder is a trademark of Semtech Corporation.
All other trademarks belong to their respective
companies.

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HID & SYSTEM MANAGEMENT PRODUCTS, KEYCODER

FAMILY

DESCRIPTION

FEATURES

The LapCoder

UR5HCFJ8 is a

versatile, low-power keyboard
encoder for portable systems. The
LapCoder

provides two bi-

directional channels for
communication with a BIOS-
compatible system as well as any
optional keyboard-compatible
devices, such as a 101/102/104
desktop keyboard.

The LapCoder

fully supports the

IBM standard keyboard
communication protocol; each key
press generates one of the scan
codes designated in the IBM
technical reference manuals. The
LapCoder

handles the scanning,

debounce, and encoding of 82 keys
organized on an 8x16 matrix and
supports embedded numeric
keypad functions as well as
alternate scan codes for specific
keys, so that a keyboard with only
82 keys is able to emulate the
functionality of a 101/102/104
keyboard.

In addition to the system's keyboard
communication port the LapCoder

provides a fully functional keyboard
input port that can be used by a
standard 82/101/102/104 keyboard
or another 8042-compatible device,
such as an external numeric
keypad, an OCR, or a bar-code
reader. Input from both the matrix
and the external device is
multiplexed and presented to the
system as if it were coming from a
single source.

The features of the LapCoder

make it ideal for use in
PC / AT / PS/2 laptop/notebook
designs that utilize the Fujitsu
FKB7211, 7316, or 1406 low-profile,
full-travel membrane keyboard.

· Laptop/notebook computers
· Portable equipment
· Industrial keyboards

· Point of sale (POS) terminals
· Public information kiosks

· Implements all functions of a

101/102/104 keyboard with only
82-keys

· Available in DIP, PLCC, and Quad

Flat (QFP) packages

· Custom versions available in small

or large quantities

· Interfaces the Fujitsu FKB7211,

7316, 1406, or other similar
laptop/notebook keyboards to a
BIOS-compatible systems

· AT / PS/2-compatible
· Interfaces an external keyboard /

keypad or other 8042-compatible
devices

_RESET

_IRQ

NUMLK

EKC

EKD

CAPSLK

VSS

VCC

OSCIN

OSCOUT

EKC1

SCRLLK

C10

C11

C12

C13

C14

C15

DIP

EKC

EKD

CAPSLK

NUMLK

_IRQ

_RESET

VCC

OSCIN

OSCOUT

EKC1

SCRLLK

C10

C11

VSS

C15

C14

C13

C12

QFP

NUMLK

VXA

_IRQ

_RESET

VCC

OSCIN

OSCOUT

EKC1

R7A

KD
KC

EKC
EKD

CAPSLK

C0
C1
C2
C3
C4

R7
SCRLLK
R5
R4
R3
R2
R1
R0
C8
C9
C10

C4A

VSS

C15

C14

C13

C12

C11

PLCC

APPLICATIONS

PIN DESCRIPTIONS

FUNCTIONAL DIAGRAM

ORDERING CODE

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Data Buffer

Interrupt Control

Communication

Channel

EKC1

Keyboard Encoder

Mode Control

Status LEDs

Row Data Inputs

Column Select

Ouputs

NUMLK/CAPSLK/SCRLLK

C0-
C15

R0-
R7

Keyboard

FKB7211
FKB7211
FKB7211

FKB1406
FKB1406
FKB1406

FKB7316
FKB7316
FKB7316

Package options

40-pin Plastic DIP
44-pin, Plastic PLCC
44-pin, Plastic QFP

Pitch

2 54 mm
1.27 mm
0.8 mm

TA = -40°C to
+85°C
UR5HCFJ8-P
UR5HCFJ8-FN
UR5HCFJ8-FB

UR5HCFJ8-06-P
UR5HCFJ8-06-FN
UR5HCFJ8-06-FB

UR5HCFJ8-16-P
UR5HCFJ8-16-FN
UR5HCFJ8-16-FB

8042 Emulation

(External Keyboard)

Communication

Channel

EKC

EKD

FUNCTIONAL DESCRIPTION

PIN DEFINITIONS

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The LapCoder

consists

functionally of six major sections
(see Functional Diagram, previous
page). These are the Keyboard
Encoder, the Mode Control Unit, the
PC Communication Channel, the
Data Buffer, the Interrupt Control
and the 8042 Emulation Channel.
All sections communicate with each
other and operate concurrently.

Mnemonic DIP

PLCC

QFP

Type

Name and Function

VCC

Power supply: +5V

VSS

Ground

Tie to Vcc

VXA

Tie to Vcc

Reserved: Ties to Vcc

_RESET

Reset: Apply 0V for orderly start-up

OSCIN

Oscillator input

OSCOUT

Oscillator output

_IRQ

Interrupt line: Reserved for low-power
applications

I/O

Keyboard data: Connects to PC
keyboard port clock line

I/O

Keyboard clock: Connects to PC
keyboard port clock line

EKD

I/O

External keyboard data: Connects to
external keyboard data line

EKC

I/O

External keyboard clock: Connects
to external keyboard clock line

EKC1

External keyboard clock 1: Connects
to external keyboard clock line and is used
to generate an interrupt for every clock line
transition

R0-R5

29-34

32-37

27-32

Row data inputs

R7A

Tie to R7

C0-C4

12-16

13-17

8-12

Column select outputs: Selects 1 of

C5-C7

17-19

19-21

13-15

16 columns

C8-C11

28-25

31-28

26-23

C12-C15

24-21

37-24

21-18

C4A

Tie to C4

CAPSLK

Caps lock LED

NUMLK

Num lock LED

SCRLLK

Scroll lock LED

16,22

No connects: These pins are unused.

39,40

Note: An underscore before a pin mnemonic denotes an active low signal.

KEYBOARD ENCODER

The LapCoder

continuously scans

an 8 row by 16 column keyboard
matrix for a maximum of 128 keys.
Smaller-size keyboards are
supported, provided all unused row
lines are pulled to Vcc.

The IC selects 1 of the 16 column
lines (C0-C15) every 512 ms and
then reads the row data lines (R0-
R7). A key closure is detected as a
0 in the corresponding position of
the matrix. A complete scan cycle
for the entire keyboard takes
approximately 9.2 ms. Each key
found pressed is debounced for a
period of 20 ms. Once the key is
verified, the corresponding key
code(s) are loaded into the transmit
buffer of the PC communication
channel.

Switch Matrix Encoding

Each matrix location is programmed
to represent either a single key or a
key combination of the IBM
101/102/104 standard keyboard.

Scan Code Table Sets

The LapCoder

supports all three

scan code table sets. Scan Code
Sets 1 and 2 are the default sets for
AT / PS/2 systems. Scan Code
Table Set 3 allows the user to
program individual key attributes
such as Make/Break and Typematic
or Single-Touch Action. For more
information, refer to the IBM
technical reference manuals.

KEYBOARD ENCODER (CONT'D)

MODE CONTROL

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Embedded Numeric Keypad

The LapCoder

implements an

embedded numeric keypad. The
Numeric Keypad Function is
invoked by pressing the Num Lock
Key.

FN Key

A special FN Key has been
implemented which has the
following effects while it is held
pressed.

For the FKB7211 only:

· Function Key F1 becomes F11
· Function Key F2 becomes F12
· Ctrl Left Key becomes Ctrl Right

Alt Left Key becomes Alt Right

If Num Lock is set:

· Embedded numeric keypad keys
become regular keys.

If Num Lock is not set:

· Embedded numeric keypad keys
provide the same codes as a
numeric keypad when the Num
Lock is not set (Arrow Keys, PgUp,
PgDn, etc.)

Status LED indicators

The controller provides interfacing
for three LED shift status indicators.
All three pins are active low to
indicate the status of the host
system (Num Lock, Caps Lock and
Scroll Lock). They are set by the
system (AT / PS/2 protocol).

Operating modes are defined by the logic level of the mode pin in the mode
control unit.

N-Key Rollover

In this mode, the code(s) corresponding to each key press are transmitted
to the host system as soon as that key is debounced, independently of the
release of other keys. If a key is defined to be Typematic, the
corresponding code(s) are transmitted while that key is held pressed. When
the key is released, the corresponding break code(s) are then transmitted to
the host system. If the released key happens to be the most recently
pressed, then Typematic Action is terminated. There is no limitation to the
number of keys that can be held pressed at the same time. However, if two
or more key closures occur within a time interval of less than 5 ms, an error
flag is set and those closures are not processed. This protects against the
effects of accidental key presses.

"Ghost" Keys

In any scanned contact switch matrix, whenever three keys defining a
rectangle on the switch matrix are held pressed at the same time, a fourth
key positioned on the fourth corner of the rectangle is sensed as being
pressed. This is known as the "ghost" or "phantom" key problem. Although
the problem cannot be totally
eliminated without using external
hardware, there are methods to
neutralize its negative effects for most
practical applications. Keys that are
intended to be used in combinations or
are likely to be pressed at the same
time by a fast typist (i.e., keys located
in adjacent positions on the keyboard)
should be placed in the same row or
column of the matrix, whenever
possible. Shift keys (Shift, Alt, Ctrl)
should not reside in the same row (or
column) with any other keys.

The LapCoder

has built-in mechanisms to detect the presence of "ghost"

keys.

Actual key presses

"Ghost"

Key

Figure 1: "Ghost" or "Phantom" Key
Problem

SPECIAL HANDLING

PC COMMUNICATION

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The LapCoder

implements all the

standard functions of
communication with a BIOS-
compatible PC/XT or AT / PS/2 host
system. Two lines, KC and KD,
provide bi-directional clock and
data signals. In addition, the
LapCoder

supports all commands

from and to the system, as
described in the IBM technical
reference manuals.

The following table shows the
commands that the system may
send and their values in
hexadecimal.

Command

Hex Value

Set/Reset Status

Indicators

Echo

Invalid Command

Select Alternate

Scan Codes

Invalid Command

Read ID

Set Typematic

Rate/Delay

Enable

Default Disable

Set Default

Set All Keys

Typematic

Make/Break

Make

Typematic/Make/Break

Set Key Type

Typematic

Make/Break

Make

Resend

Reset

Table 2: Keyboard Commands from the

System (AT / PS/2 protocol)

These commands are supported in
the AT / PS/2 protocol and can be
sent to the keyboard at any time.

The following table shows the
commands that the keyboard may
send to the system.

Command

Hex Value

Key Detection

00*

Error/Overrun

Keyboard ID

83AB

BAT Completion Code

BAT Failure Code

Echo

Acknowledge (Ack)

Resend

Key Detection
Error/Overrun

FF**

*Code Sets 2 and 3

**Code Set 1

Table 3: Keyboard Commands to the

System (AT / PS/2 protocol)

8042 Emulation Channel

The LapCoder

fully emulates a

system's keyboard port, available to
a standard 82/101/102/104 external
keyboard or other 8042-compatible
device. Communication with a
keyboard-compatible device is
accomplished by clock and data
lines via EKC and EKD pins,
respectively. A third pin, EKC1,
connects to the clock line and
interrupts the controller whenever
the external device initiates a
communication session. When
power is first applied, the controller
proceeds with the standard reset
sequence with the external device.
Data and commands initiated from
the external device are buffered in
the controller's FIFO along with data
from the scanned matrix, and then
are presented to the system as if
they were coming from a single
source. After they are
acknowledged, commands and
data from the system are
transmitted to the external device.

Hot Plug-Ins of External
Device

The LapCoder

will detect the

presence of an external device.
If an external keyboard or other
device was not connected during
power-on and is connected at a
later time, the encoder will proceed
with the normal reset routine in
order to properly initialize the
external keyboard. After
communication has been
established, the encoder will
continue to check for the presence
of the external keyboard. While the
external device is connected, the
encoder does not enter the sleep
mode. If the device is
disconnected, the encoder
becomes aware of it. If a
subsequent connection takes
place, the controller reinitiates a
reset sequence. This unique
feature allows the user to connect
or disconnect an external device at
any time without resetting the
system.

Shift Status LEDs

Shift Status LEDs (Num Lock, Caps
Lock and Scroll Lock) indicate the
status of the system and are
controlled by commands sent from
the system. Set/Reset Status
Indicator commands from the
system will be executed both by the
external keyboard and the scanned
matrix. For example, if the user
presses the Caps Lock Key on
either keyboard, the Caps Lock
LED will be affected in both
keyboards. The LED status
indicators are properly set after
every new connection of an external
keyboard.

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KEYBOARD LAYOUTS (US ENGLISH)

110

Esc

112

113

114

115

116

118

119

120

121

F10

125

ScLk

124

PrSc

126

Brk

Home

Tab

[

]

PgUp

;

PgDn

End

Alt

Ins

Del

Enter

BkSp

Shift

CpsLck

Shift

Ctrl

SPACE

117

NmLk

Depending on the status of the Num Lock and the FN Key, the LapCoder

implements one of four keyboard

layouts. (Key numbering of a standard 101/102/104 keyboard is shown.)

Layout A (Default layout)

110

Esc

112

113

114

115

116

118

119

120

121

F10

125

ScLk

124

PrSc

126

Brk

Home

Tab

[

]

PgUp

;

PgDn

End

Alt

Ins

Del

Enter

BkSp

Shift

CpsLck

Shift

Ctrl

SPACE

117

NmLk

Layout B (Num Lock is set)

110

Esc

112

113

114

115

116

118

119

120

121

F10

125

ScLk

124

PrSc

126

Brk

101

100

Home

Tab

102

105

[

]

PgUp

103

106

PgDn

104

End

Alt

Ins

Del

Enter

BkSp

Shift

CpsLck

Shift

Ctrl

SPACE

117

NmLk

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KEYBOARD LAYOUTS (US ENGLISH)

Depending on the status of the Num Lock and the FN Key, the LapCoder

implements one of four keyboard

layouts. (Key numbering of a standard 101/102/104 keyboard is shown.)

Layout C (FN key pressed)

110

Esc

122

F11

123

F12

114

115

116

118

119

120

121

F10

125

ScLk

124

PrSc

126

Brk

Home

PgUp

101

100

Home

Tab

102

105

[

]

PgUp

End

PgDn

103

106

PgDn

Ins

Del

104

End

Alt

Ins

Del

Enter

BkSp

Shift

CpsLck

Shift

Ctrl

SPACE

117

NmLk

Layout D (Num Lock set and FN key pressed)

110

Esc

122

123

114

115

116

118

119

120

121

F10

125

ScLk

124

PrSc

126

Brk

Home

Tab

[

]

PgUp

;

PgDn

End

Alt

Ins

Del

Enter

BkSp

Shift

CpsLck

Shift

Ctrl

SPACE

117

NmLk

IMPLEMENTATION NOTES FOR THE LAPCODERTM

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The following notes pertain to the suggested schematics found on the next
pages.

The built-in oscillator on the LapCoder

requires the attachment of a 4.00

MHz ceramic resonators with built-in load capacitors. You can use either
an AVX part number PBRC-4.00 BR; or a Murata part number
CSTCC4.00MG ceramic resonator.

It may also be possible to operate with the 4.00 MHz crystal, albeit with
reduced performance. Due to their high Q, the crystal oscillator circuits
start-up slowly. Since the LapCoder

constantly switches the clock on and

off, it is important that the ceramic resonator is used (it starts up more
quickly than the crystal). Resonators are also less expensive than crystals.

Also, if crystal is attached, two load capacitors (33pF to 47pF) should be
added, a capacitor between each side of the crystal and ground.

In either case, using a ceramic resonator with built-in load capacitors, or
crystal with external load capacitors, a feedback resistor of 1 MegaOhm
should be connected between OSCin and OSCout.

Troubleshoot the circuit by looking at the output pin of the oscillator. If the
voltage it half-way between supply and ground (while the oscillator should
be running), the problem is with the load caps / crystal. If the voltage it all
the way at supply or ground (while the oscillator should be running), there
are shorts on the PCB.

Note: when the oscillator is intentionally turned OFF, the voltage on the
output pin of the oscillator is high (at the supply rail).

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SUGGESTED INTERFACING FOR THE LAPCODER

UR5HCFJ8-FN

TELCOM

22K

Bypass

EKBDATA

EKBCLK

KBCLK

KBDATA

UR5HCFJ8-06-FN

UR5HCFJ8-16-FN

MURATA

CSTCR4M00G53A-R0

To C

o
lu

n
s

Rows

Switch

Matrix

Vcc

4.7K

330

10µF

UR5H

F
J
8
-
F
N

4 3

RESET

EKC1

EKD

EKC

IRQ

OSCIN

OSCOUT

NUMLK

CAPSLK

C15

C14

C13

C12

C11

C10

VCC

VSS

VX VXA

C4A

SCRLLK

R7A

0.1µF

47pF

TC54VC4302ECB

4.00MHz

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MECHANICALS FOR THE UR5HCFJ8-P

40 21

1 20

Seating
Plane

Notes:

1. Positional tolerance of leads (D) shall be
within 0.25 mm (0.010) at maximum material
condition, in relation to the seating plane and
each other.
2. Diminsion L is to the center of the leads when
the leads are formed parallel.
3. Dimension B does not include mold flash.

B
C
D
F

G
H

L
M
N

13.72 14.22 0.540 0.560

3.94 5.08

0.155 0.200

0.36

0.56 0.014 0.022

1.02

1.52 0.040 0.060

2.54 BSC 0.100 BSC

2.16

0.085

0.20

0.008

2.92

0.015

0.51

1.02 0.020 0.040

MIN

MAX

MIN

MAX

MILLIMETERS

INCHES

DIM

51.69 52.45 2.035 2.065

0.38

0.015
0.135

3.43

15.24 BSC 0.600 BSC

1.65

0.065

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MECHANICALS FOR THE UR5HCFJ8-FN

Y BRK

(Note 1) 44

Leads

PLCC

(Note 1)

Detail S

Note 1

A
B
C
E
F

G
H

R
U
V

X
Y
Z

G1
K1
Z1

17.40 17.65 0.685 0.695
17.40 17.65 0.685 0.695

4.20

4.57 0.165 0.180

2.29

2.79 0.090 0.110

0.33

0.48 0.013 0.019

1.27 BSC 0.050 BSC

0.66 0.81

0.026 0.032

0.51

0.020

0.64

0.025

16.51 16.66 0.650 0.656
16.51 16.66 0.650 0.656

1.07

1.21 0.042 0.048

0.50

0.020

15.50 16.00 0.610 0.630

1.02

0.040

MIN

MAX

MIN

MAX

MILLIMETERS

INCHES

1.07

1.21 0.042 0.048

1.07

1.42 0.042 0.056

DIM

0.18 (0.007)

0.25 (0.010)

Seating Plane

0.010 (0.004)

0.18 (0.007)

Notes:

1. Due to space limitation, the chip
is represented by a general (smaller)
case outline drawing rather than
showing all 44 leads.
2. Datums L, M, N, and P determine where
the top of the lead shoulder exits plastic
body at mold parting line
3. DIM G1, true position to be measured
at Datum T, Seating Plane
4. DIM R and U do not include mold
protusion. Allowable mold protusion is
0.25 (0.010) per side.
5. Dimensioning and tolerancing per Ansi
Y14.5M, 1982
6. Controlling dimension: Inch

Detail S

0.25 (0.010)

View D-D

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MECHANICALS FOR THE UR5HCFJ8-FB

Detail A

Datum
Plane

Detail C

Seating
Plane

Datum
Plane

A,B,D

0.20 (0.008)

C A-B

0.05 (0.002) A-B

0.20 (0.008)

H A-B

0.20 (0.008)

A-B

0.20 (0.008)

A-B

0.05 (0.002)

A-B

0.01 (0.004)

B
C
D
E
F

G
H

L
M
N

R
S
T

U
V

9.90

10.10 0.390 0.398

2.10

2.45

0.083 0.096

0.30

0.45 0.012 0.018

2.00

2.10 0.079 0.083

0.30

0.40 0.012 0.016

0.80 BSC 0.031 BSC

0.25

0.010

0.13

0.005

0.65

0.026

0.13

0.17 0.005 0.007

13.45

0.530

0.13

0.005

0.510

0.40

0.016

MIN

MAX

MIN

MAX

MILLIMETERS

INCHES

0.13

.30

0.005 0.012

DIM

Base Metal

0.20 (0.008)

C A-B

Section B-B

9.90

10.10 0.390 0.398

0.23

0.009
0.037

0.95

8.00 REF 0.315 REF

12.95

0.510

12.95

1.6 REF

13.45

0.530

0.063 REF

Notes

1. Dimensioning and tolerancing per Ansi
Y14.5-M, 1982
2. Controlling dimension: Millimeter
3. Datum Plane "H" is located at the
bottom of the lead and is coincident
with the lead where the lead exits
the plastic body at the bottom of the
parting line.
4. Datums -A-, -B-, and -D- to be determined
at Datum Plane -H-.
5. Dimensions S and V to be determined
at seating plane -C-.
6. Dimensions A and B do not include
Mold protusion. Allowable protusion
is 0.25 (0.010) per side. Dimensions
A and B do include mold mismatch
and are determined at Datum Plane -H-.
7. Dimension D does not include Danbar
protrusion. Allowable Danbar
protrusion is 0.08 (0.003) total in
excess of the D dimension
at Maximum Material Condition.
Danbar cannot be located on the
lower radius or the foot.

Detail A

Detail C

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ELECTRICAL SPECIFICATIONS

Absolute Maximum Ratings
Ratings

Symbol

Value

Unit

Supply voltage

-0.3 to +7.0

Input voltage

Vss -0.3 to V

+0.3

Current drain per pin

(not including Vss or Vdd)
Operating temperature

T low to T high

°C

UR5HCFJ8-XX

-40 to +85

Storage temperature range

STG

-65 to +150

°C

Thermal Characteristics
Characteristic

Symbol

Value

Unit

Thermal resistance

Plastic DIP

°C per W

Plastic PLCC

°C per W

DC Electrical Characteristics (V

=5.0 V

+/-10%, V

=0 V

, Temperature range=T low to T high unless otherwise noted)

Characteristic

Symbol

Min

Typ

Max

Unit

Output voltage (I load<10µA)

0.1

Output high voltage (I load=0.8mA)

0.8

Output low voltage (I load=1.6mA)

0.4

Input high voltage

0.7xV

Input low voltage

Vss

0.2xV

User mode current

Data retention mode (0 to 70°C)

2.0

Supply current* (Run)

4.7

7.0

I/O Ports hi-Z leakage current

+/-10

µA

Input current

+/- 1

µA

I/O port capacitance

*In a typical application circuit, including external A/D.

Control Timing (V

=5.0 V

+/-10%, V

=0 V

, Temperature range=T low to T high unless otherwise noted)

Characteristic

Symbol

Min

Max

Unit

Frequency of operation

Crystal option

OSC

4.0

MHz

External clock option

OSC

4.0

MHz

Internal operating frequency

Crystal (

FOSC

/2)

2.0

MHz

External clock option (

FOSC

/2)

2.0

MHz

Cycle time

CYC

1000

Crystal oscillator startup time

toxov

100

Stop recovery startup time

LCH

100

Reset pulse width

tcyc

Interrupt pulse width low

LIH

125

Interrupt pulse period

LIL

tcyc

Oscillator input (OSCIN) pulse width

TOL

*The minimum period ti

LIL

should not be less than the number of cycle times it takes to execute the interrupt service routine plus 21 tcyc.

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