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Электронный компонент: LCDA12C-8TE

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1
www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 & LCDA15C-8
Low Capacitance TVS Diode Array
For Multi-mode Transceiver Protection
Description
Features
Circuit Diagram
Schematic & PIN Configuration
Revision 9/2000
The LCDAxxC-8 has been specifically designed to
protect sensitive components which are connected to
data and transmission lines from over voltages caused
by ESD (electrostatic discharge), EFT (electrical fast
transients), and lightning.
The low capacitance array configuration of the
LCDAxxC-8 allows the user to protect eight high-speed
data or I/O lines. They may be used on systems
operating from 5 to 15 Volts. The high surge capability
(500W, tp=8/20s) makes the LCDAxxC-8 suitable for
telecommunications systems operating in harsh tran-
sient environments. The low inductance construction
minimizes voltage overshoot during high current
surges.
The features of the LCDAxxC-8 are ideal for protecting
multi-protocol transceivers in WAN applications such as
Frame Relay systems, routers, and switches.
Applications
Mechanical Characteristics
u
Multi-Mode Transceiver Protection
u
WAN Equipment:
CSU/DSU
Multiplexers
Routers
ISP Equipment
Customer Premise Equipment
u
Protection for any of the following interfaces:
RS-232 (V.28)
RS-422 (V.11, X.21)
RS-449 (V.11/V.10)
u
Transient protection for high-speed data lines to
IEC 61000-4-2 (ESD) 15kV (air), 8kV (contact)
IEC 61000-4-4 (EFT) 40A (5/50ns)
IEC 61000-4-5 (Lightning) 0.5kV, 12A (8/20s)
u
Protects eight I/O lines
u
Low capacitance for high-speed interfaces
u
High surge capability
u
Low clamping voltage
u
Solid-state silicon avalanche technology
u
JEDEC SO-16 package
u
Molding compound flammability rating: UL 94V-0
u
Marking : Part number, date code, logo
u
Packaging : Tape and Reel per EIA 481
SO-16 (Top View)
2
2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 & LCDA15C-8
Absolute Maximum Rating
Electrical Characteristics
8
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3
2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PROTECTION PRODUCTS
LCDA12C-8 & LCDA15C-8
Typical Characteristics
Non-Repetitive Peak Pulse Power vs. Pulse Time
Power Derating Curve
Clamping Voltage vs. Peak Pulse Current
0
10
20
30
40
50
60
70
80
90
100
110
0
5
10
15
20
25
30
Time (
s)
Percent of I
PP
e
-t
td = I
PP
/2
Waveform
Parameters:
tr = 8
s
td = 20
s
Pulse Waveform
0
10
20
30
40
50
60
70
80
90
100
110
0
25
50
75
100
125
150
175
Ambient Temperature - T
A
(
o
C)
% of Rated Power or I
PP
0.01
0.1
1
10
0.1
1
10
100
1000
Pulse Duration - tp (
s)
Peak Pulse Power - P
PP
(kW)
10
12
14
16
18
20
22
24
26
28
0
5
10
15
20
25
Peak Pulse Current - I
PP
(A)
Clamping Voltage - V
C
(V)
Waveform
Parameters:
tr = 8
s
td = 20
s
LCDA15C-8
LCDA12C-8
4
2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
LCDA12C-8 & LCDA15C-8
Device Connection Options for Protection of Eight
High-Speed Data Lines
The LCDAxxC-8 may be configured to protect up to
eight I/O lines operating between 5 and 15V. It may be
used to protect the most popular serial data interface
standard lines making it ideal for use in equipment
utilizing multi-mode transceivers. The LCDAxxC-8 is
symmetrical so the data lines may be connected at
pins 1-8 or 9-16. Pins 9-16 or 1-8 are connected to
ground as shown. For best results, these pins should
be connected directly to a ground plane on the board.
The path length should be kept as short as possible to
minimize parasitic inductance.
Multi-Mode Transceiver Protection
The LCDAxxC-8 may be used to protect multi-mode
transceiver I/O lines with external connections. The
LCDAxxC-8 adds a maximum loading capacitance of
15pF with a working voltage of 12V or 15V. This allows
the transceiver to safely operate in all modes without
clipping or degradation of the signal.
With proper design and layout, the transceiver port can
be protected to >15kV (HBM per IEC 61000-4-2).
Circuit Board Layout Recommendations for Suppres-
sion of ESD.
Good circuit board layout is critical for the suppression
of fast rise-time transients such as ESD. The following
guidelines are recommended:
l
Place the LCDAxxC-8 near the input terminals or
connectors to restrict transient coupling.
l
Minimize the path length between the LCDAxxC-8
and the protected line.
l
Minimize all conductive loops including power and
ground loops.
l
The ESD transient return path to ground should be
kept as short as possible.
l
Never run critical signals near board edges.
l
Use ground planes whenever possible.
Device Connection
Applications Information
5
2000 Semtech Corp.
www.semtech.com
PROTECTION PRODUCTS
PROTECTION PRODUCTS
LCDA12C-8 & LCDA15C-8
Land Pattern - SO-16
Outline Drawing - SO-16