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1
DESCRIPTION
The LH1691 is a 240-output TFT-LCD gate driver
IC.
FEATURES
Number of LCD drive outputs : 240
LCD drive output sequence :
Output shift direction can be selected
OG
1
/OG
240
or OG
240
/OG
1
Cascade connection :
Max. 2 cascades (internal counting system)
Usable with both positive/negative power supplies
Output mode selection
Normal mode (1-pulse scanning)
Continuous 2-pulse mode (2-pulse scanning)
Jumping 2-pulse mode (2-pulse scanning)
LCD drive voltage : +16.0 to +33.0 V
Operating temperature : 30 to +85 C
Package : 258-pin TCP (Tape Carrier Package)
PIN CONNECTIONS
LH1691
LH1691
240-output TFT-LCD Gate Driver IC
OG
238
OG
239
OG
240
238
239
240
OG
1
OG
2
OG
3
1
2
3
CHIP SURFACE
V
DD
V
EE
V
SS
V
CC
V
LS
TEST
1
TEST
2
CKV
SPV
CE
R/L
MODE
1
MODE
2
V
LS
V
CC
V
SS
V
EE
V
DD
258
257
256
255
254
253
252
251
250
249
248
247
246
245
244
243
242
241
258-PIN TCP
TOP VIEW
NOTE :
Doesn't prescribe TCP outline.
2
LH1691
PIN DESCRIPTION
BLOCK DIAGRAM
PIN NO.
SYMBOL
I/O
DESCRIPTION
1 to 240
OG
1
-OG
240
O
LCD drive output pins
241, 258
V
DD
Power supply pins for LCD drive
242, 257
V
EE
Power supply pins for LCD drive
243, 256
V
SS
Power supply pins for logic system
244, 255
V
CC
Power supply pins for logic system
245, 254
V
LS
Power supply pins for input level shifter
249
CE
I
Cascade sequence setting pin
250
SPV
I
Vertical scanning start pulse input pin
251
CKV
I
Vertical shift clock input pin
252, 253
TEST
2
, TEST
1
I
IC test pins
241
V
DD
246
247
MODE
2
MODE
1
R/L
CE
SPV
CKV
TEST
2
TEST
1
248
249
250
251
252
253
V
DD
258
245
V
LS
V
LS
254
244
V
CC
V
CC
255
242
V
EE
V
EE
257
243
V
SS
V
SS
256
OG
1
1
OG
240
240
OUTPUT CIRCUIT
LEVEL SHIFTER
BI-DIRECTIONAL SHIFT
REGISTER
CONTROL
LOGIC
1
240
1
240
1
240
Pin for selecting bi-directional shift register and setting cascade
sequence
I
R/L
248
Output mode selection pins
I
MODE
2
, MODE
1
246, 247
LH1691
3
FUNCTIONAL OPERATIONS OF EACH BLOCK
BLOCK
FUNCTION
Control Logic
Used to create signals necessary for mode selecting signal, cascade sequence setting
signal and for operation of bi-directional shift register.
Bi-directional Shift
Register
Used as transfer circuit of LCD drive output start signal. It is possible to set LCD drive
output sequence of OG
1
/
OG
240
direction or OG
240
/
OG
1
direction.
Level Shifter
Used as circuit which shifts LCD drive output signals transferred by bi-directional shift
register to V
DD
-V
EE
level.
Output Circuit
Configured with output buffers to output V
DD
-V
EE
level.
INPUT/OUTPUT CIRCUITS
I
V
LS
Level Shifter
(V
LS
-0 V
/
V
CC
-V
SS
)
Internal Logic
(V
CC
-V
SS
)
V
SS
To Internal Circuit
,
Fig. 1 Input Circuit
Applicable pins
CKV, SPV, CE, R/L,
MODE
1
, MODE
2
,
TEST
1
, TEST
2
O
V
DD
(V
DD
-V
EE
)
V
EE
From Internal Circuit
Fig. 2 Output Circuit
Applicable pins
OG
1
-OG
240
4
LH1691
FUNCTIONAL DESCRIPTION
Pin Functions
SYMBOL
FUNCTION
V
DD
Used as power supply pin for high level LCD drive.
V
LS
Used as power supply pin for input level shifters.
V
CC
Used as power supply pin for logic system, normally connected to V
SS
+ 5.0 V.
V
EE
Used as power supply pin for low level LCD drive.
V
SS
Used as logic system power supply pin.
CKV
Used as vertical shift clock pulse input pin.
SPV
Used as vertical scanning start pulse input pin. (At least, input one cycle of CKV during "L"
period of SPV.)
MODE
1
MODE
2
Used as input pins for selecting output mode.
Output mode is set as shown in the table below by setting MODE
1
pin and MODE
2
pin.
R/L
Used as input pin for selecting the shift direction of bi-directional shift register and for
setting the sequence of cascade connection.
LCD drive outputs shift from OG
1
to OG
240
when set to "H". LCD drive outputs shift from
OG
240
to OG
1
when set to "L". At the same time, cascade sequence is set as shown in
the table below.
CE
Used as input pin for setting of chip cascade sequence. (Max. 2 cascades)
With above setting, sets the cascade sequence signal inside the IC.
TEST
1
TEST
2
Used as input pins for IC testing.
Must be set to "H".
OG
1
-OG
240
Used as output pins for LCD drive output, and which output data at 2 levels.
Selecting data is output at V
DD
level .
Non-selecting data is output at V
EE
level .
MODE
1
MODE
2
Output mode
H
H
Normal mode (1-pulse scanning)
L
H
Continuous 2-pulse mode
H
L
Jumping 2-pulse mode
L
L
Set all outputs to V
EE
level.
CE
Cascade sequence
R/L = "H"
1st
2nd
R/L = "L"
2nd
1st
H
L
LH1691
5
Functional Operations
(1) Example of Cascade Sequence
TFT-LCD Panel
Scanning Direction When R/L = "L".
Scanning Direction When R/L = "H".
OG
1
CE = "H"
CE = "L"
OG
240
OG
1
OG
240
At this time, normal mode (scanning with 1 pulse) is set when MODE
1
= "H" and MODE
2
= "H",
jumping 2-pulse mode (scanning with 2 pulses) is set when MODE
1
= "H" and MODE
2
= "L",
continuous 2-pulse mode (scanning with 2 pulses) is set when MODE
1
= "L" and MODE
2
= "H", and
output V
EE
level is set when MODE
1
= "L" and MODE
2
= "L".
*
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