Integrated Circuits Group
LH28F800BGHB-TTL90
Flash Memory
8M (512K 16)
(Model No.:
LHF80BZA)
Spec No.:
EL10Z134B
Issue Date:
Sept. 19, 2001
P
RODUCT
S
PECIFICATIONS
LHF80BZA
Rev. 1.1
Handle this document carefully for it contains material protected by international copyright law.
Any reproduction, full or in part, of this material is prohibited without the express written
permission of the company.
When using the products covered herein, please observe the conditions written herein and the
precautions outlined in the following paragraphs. In no event shall the company be liable for any
damages resulting from failure to strictly adhere to these conditions and precautions.
(1) The products covered herein are designed and manufactured for the following application
areas. When using the products covered herein for the equipment listed in Paragraph (2),
even for the following application areas, be sure to observe the precautions given in
Paragraph (2). Never use the products for the equipment listed in Paragraph (3).
Office electronics
Instrumentation and measuring equipment
Machine tools
Audiovisual equipment
Home appliance
Communication equipment other than for trunk lines
(2) Those contemplating using the products covered herein for the following equipment which
demands high reliability, should first contact a sales representative of the company and then
accept responsibility for incorporating into the design fail-safe operation, redundancy, and
other appropriate measures for ensuring reliability and safety of the equipment and the
overall system.
Control and safety devices for airplanes, trains, automobiles, and other
transportation equipment
Mainframe computers
Traffic control systems
Gas leak detectors and automatic cutoff devices
Rescue and security equipment
Other safety devices and safety equipment, etc.
(3) Do not use the products covered herein for the following equipment which demands
extremely high performance in terms of functionality, reliability, or accuracy.
Aerospace equipment
Communications equipment for trunk lines
Control equipment for the nuclear power industry
Medical equipment related to life support, etc.
(4) Please direct all queries and comments regarding the interpretation of the above three
Paragraphs to a sales representative of the company.
Please direct all queries regarding the products covered herein to a sales representative of the
company.
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LHF80BZA
1
Rev. 1.1
CONTENTS
PAGE
1 INTRODUCTION.............................................................. 3
1.1 Features ........................................................................ 3
1.2 Product Overview......................................................... 3
2 PRINCIPLES OF OPERATION........................................ 6
2.1 Data Protection ............................................................. 7
3 BUS OPERATION ............................................................ 7
3.1 Read.............................................................................. 7
3.2 Output Disable.............................................................. 7
3.3 Standby......................................................................... 7
3.4 Deep Power-Down ....................................................... 7
3.5 Read Identifier Codes Operation .................................. 8
3.6 Write............................................................................. 8
4 COMMAND DEFINITIONS............................................. 8
4.1 Read Array Command................................................ 11
4.2 Read Identifier Codes Command ............................... 11
4.3 Read Status Register Command ................................. 11
4.4 Clear Status Register Command................................. 11
4.5 Block Erase Command ............................................... 11
4.6 Word Write Command ............................................... 12
4.7 Block Erase Suspend Command ................................ 12
4.8 Word Write Suspend Command................................. 13
4.9 Considerations of Suspend ......................................... 13
4.10 Block Locking .......................................................... 13
4.10.1 V
PP
=V
IL
for Complete Protection ...................... 13
4.10.2 WP#=V
IL
for Block Locking.............................. 13
4.10.3 WP#=V
IH
for Block Unlocking.......................... 13
PAGE
5 DESIGN CONSIDERATIONS ...................................... 19
5.1 Three-Line Output Control ....................................... 19
5.2 Power Supply Decoupling ........................................ 19
5.3 V
PP
Trace on Printed Circuit Boards ........................ 19
5.4 V
CC
, V
PP
, RP# Transitions ....................................... 19
5.5 Power-Up/Down Protection...................................... 20
5.6 Power Dissipation ..................................................... 20
6 ELECTRICAL SPECIFICATIONS ............................... 21
6.1 Absolute Maximum Ratings ..................................... 21
6.2 Operating Conditions ................................................ 21
6.2.1 Capacitance ......................................................... 21
6.2.2 AC Input/Output Test Conditions ....................... 22
6.2.3 DC Characteristics .............................................. 23
6.2.4 AC Characteristics - Read-Only Operations ....... 25
6.2.5 AC Characteristics - Write Operations ............... 27
6.2.6 Alternative CE#-Controlled Writes..................... 29
6.2.7 Reset Operations ................................................. 31
6.2.8 Block Erase and Word Write Performance ......... 32
7 PACKAGE AND PACKING SPECIFICATIONS......... 33
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LHF80BZA
2
Rev. 1.1
LH28F800BGHB-TTL90
8M-BIT (512Kbit 16)
Smart3 Flash MEMORY
Smart3 Technology
2.7V-3.6V V
CC
2.7V-3.6V or 11.4V-12.6V V
PP
16bit I/O Interface
High-Performance Access Time
90ns(2.7V-3.6V)
Operating Temperature
-40C to +85C
Optimized Array Blocking Architecture
Two 4K-word Boot Blocks
Six 4K-word Parameter Blocks
Fifteen 32K-word Main Blocks
Top Boot Location
Extended Cycling Capability
100,000 Block Erase Cycles
Enhanced Automated Suspend Options
Word Write Suspend to Read
Block Erase Suspend to Word Write
Block Erase Suspend to Read
Enhanced Data Protection Features
Absolute Protection with V
PP
=GND
Block Erase and Word Write Lockout
during Power Transitions
Boot Blocks Protection with WP#=V
IL
Automated Word Write and Block Erase
Command User Interface
Status Register
Low Power Management
Deep Power-Down Mode
Automatic Power Savings Mode Decreases
I
CC
in Static Mode
SRAM-Compatible Write Interface
Chip Size Packaging
0.75mm pitch 48-Ball CSP
ETOX
TM*
Nonvolatile Flash Technology
CMOS Process (P-type silicon substrate)
Not designed or rated as radiation hardened
SHARP's LH28F800BGHB-TTL90 Flash memory with Smart3 technology is a high-density, low-cost, nonvolatile, read/write
storage solution for a wide range of applications. LH28F800BGHB-TTL90 can operate at V
CC
=2.7V-3.6V and
V
PP
=2.7V-3.6V. Its low voltage operation capability realize battery life and suits for cellular phone application.
Its Boot, Parameter and Main-blocked architecture, flexible voltage and extended cycling provide for highly flexible
component suitable for portable terminals and personal computers. Its enhanced suspend capabilities provide for an ideal
solution for code + data storage applications. For secure code storage applications, such as networking, where code is either
directly executed out of flash or downloaded to DRAM, the LH28F800BGHB-TTL90 offers two levels of protection: absolute
protection with V
PP
at GND, selective hardware boot block locking. These alternatives give designers ultimate control of their
code security needs.
The LH28F800BGHB-TTL90 is manufactured on SHARP's 0.35m ETOX
TM*
process technology. It come in chip size
package: the 0.75mm pitch 48-ball CSP ideal for board constrained applications.
*ETOX is a trademark of Intel Corporation.
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LHF80BZA
3
Rev. 1.1
1 INTRODUCTION
This datasheet contains LH28F800BGHB-TTL90
specifications. Section 1 provides a flash memory
overview. Sections 2, 3, 4 and 5 describe the memory
organization and functionality. Section 6 covers electrical
specifications.
1.1 Features
Key enhancements of LH28F800BGHB-TTL90 Smart3
Flash memory are:
Smart3 Technology
Enhanced Suspend Capabilities
Boot Block Architecture
Please note following important differences:
V
PPLK
has been lowered to 1.5V to support 2.7V-3.6V
block erase and word write operations. The V
PP
voltage transitions to GND is recommended for
designs that switch V
PP
off during read operation.
To take advantage of Smart3 technology, allow V
CC
and V
PP
connection to 2.7V-3.6V.
1.2 Product Overview
The LH28F800BGHB-TTL90 is a high-performance 8M-
bit Smart3 Flash memory organized as 512K-word of 16
bits. The 512K-word of data is arranged in two 4K-word
boot blocks, six 4K-word parameter blocks and fifteen
32K-word main blocks which are individually erasable in-
system. The memory map is shown in Figure 3.
Smart3 technology provides a choice of V
CC
and V
PP
combinations, as shown in Table 1, to meet system
performance and power expectations. V
PP
at 2.7V-3.6V
eliminates the need for a separate 12V converter, while
V
PP
=12V maximizes block erase and word write
performance. In addition to flexible erase and program
voltages, the dedicated V
PP
pin gives complete data
protection when V
PP
V
PPLK
.
Table 1. V
CC
and V
PP
Voltage Combinations Offered by
Smart3 Technology
V
CC
Voltage
V
PP
Voltage
2.7V-3.6V
2.7V-3.6V, 11.4V-12.6V
Internal V
CC
and V
PP
detection Circuitry automatically
configures the device for optimized read and write
operations.
A Command User Interface (CUI) serves as the interface
between the system processor and internal operation of the
device. A valid command sequence written to the CUI
initiates device automation. An internal Write State
Machine (WSM) automatically executes the algorithms
and timings necessary for block erase and word write
operations.
A block erase operation erases one of the device's 32K-
word blocks typically within 0.51s (2.7V-3.6V V
CC
,
11.4V-12.6V V
PP
), 4K-word blocks typically within 0.31s
(2.7V-3.6V V
CC
, 11.4V-12.6V V
PP
) independent of other
blocks. Each block can be independently erased 100,000
times. Block erase suspend mode allows system software
to suspend block erase to read or write data from any other
block.
Writing memory data is performed in word increments of
the device's 32K-word blocks typically within 12.6s
(2.7V-3.6V V
CC
, 11.4V-12.6V V
PP
), 4K-word blocks
typically within 24.5s (2.7V-3.6V V
CC
, 11.4V-12.6V
V
PP
). Word write suspend mode enables the system to
read data or execute code from any other flash memory
array location.
The boot blocks can be locked for the WP# pin. Block
erase or word write for boot block must not be carried out
by WP# to Low and RP# to V
IH
.
The status register indicates when the WSM's block erase
or word write operation is finished.
The access time is 90ns (t
AVQV
) over the extended
temperature range (-40C to +85C) and V
CC
supply
voltage range of 2.7V-3.6V.
The Automatic Power Savings (APS) feature substantially
reduces active current when the device is in static mode
(addresses not switching). In APS mode, the typical I
CCR
current is 3mA at 2.7V V
CC
.
When CE# and RP# pins are at V
CC
, the I
CC
CMOS
standby mode is enabled. When the RP# pin is at GND,
deep power-down mode is enabled which minimizes
power consumption and provides write protection during
reset. A reset time (t
PHQV
) is required from RP# switching
high until outputs are valid. Likewise, the device has a
wake time (t
PHEL
) from RP#-high until writes to the CUI
are recognized. With RP# at GND, the WSM is reset and
the status register is cleared.
The device is available in 0.75mm pitch 48-ball CSP
(Chip Size Package). Pinout is shown in Figure 2.
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