P-DSO-16-1
Semiconductor Group
35
04.96
FM-IF with Counter Output, Field Strength Indicator,
Noise Detector and MUTE Setting
TDA 4320X
1
Overview
1.1
Features
7-stage limiter amplifier
Coincidence demodulator
Counter output with request input
Field strength output
Multipath identification circuit
Adjustable muting depth (with full muting
80 dB)
This device is ESD protected
Type
Ordering Code
Package
TDA 4320X
Q67000-A-5000
P-DSO-16-1
TDA 4320X
Semiconductor Group
36
04.96
1.2
Pin Configuration
(top view)
Figure 1
1.3
Pin Definitions and Functions
Pin No. Symbol
Function
1
GND
Ground
Decoupling capacitors for bias,
V
S
and
V
REF
Pins are to be
connected directly to Pin 1
2
Multipath
identification input
Multipath identification input
High impedance input (
R
i
~ 10 k
). This input receives
the filtered field strength output (high pass or band pass).
3
Rectifier time
constant
Rectifier time constant
Determines the attack and release time of the
identification circuit.
4
Multipath
identification
output
Multipath identification output
Open npn-collector output, which is low during
(V4/V1
0.7 V) multipath interference.
5
MUTE input
MUTE input
For DC voltage (usually derived from field strength output
voltage) which attenuates the AF output voltage by the
setting muting depth (Pin 7). Max. attenuation when
V
5
= 0 V, no attenuation when
V
5
0.5 V.
6
AF output
AF output
Demodulated FM-IF.
P-DSO-16-1
TDA 4320X
Semiconductor Group
37
04.96
7
MUTE depth
MUTE depth
Adjustment by connecting a dc voltage to ground the
requested muting depth can be set. Maximal attenuation
of AF output voltage with
V
7
= 2.4 V (typ. 38 dB), minimal
attenuation with
V
7
= 4.8 V (typ. 0 dB). Full muting with
V
7
1 V (
80 dB).
8
Demodulator
tank circuit
Demodulator tank circuit
Driven via two on-chip capacitors (approx.15 pF
25 %).
The tank circuit voltage should be typ. 400 mVpp.
9
Demodulator
circuit
Demodulator circuit
10
Reference
voltage
Reference voltage
Should be RF decoupled to Pin 1.
11
IF counter output
IF counter output
Provides the IF carrier frequency (low impedance output
R
out
1.5 k
).
12
V
S
Supply voltage
RF decoupled to Pin 1
13
Field strength
output
Field strength output
Supplies a DC voltage proportional to the IF input level
with very low delay time.
14
Field strength
adjust
Field strength adjust
Adjustment of slope and starting point of field strength
output voltage
15
IF input bias
IF input bias
To be RF decoupled to Pin 1
16
IF input
IF input
FM-lF input
1.3
Pin Definitions and Functions (cont'd)
Pin No. Symbol
Function
TDA 4320X
Semiconductor Group
38
04.96
1.4
Functional Block Diagram
Figure 2
TDA 4320X
Semiconductor Group
39
04.96
2
Functional Description
The FM-IF demodulator TDA 4320X has been developed especially for car radio
applications. The on-chip multipath identification circuit activates an interference
suppression circuit in case of multipath interferences.
3
Circuit Description
The IC includes a 7-stage capacitive coupled limiter amplifier with coincidence
demodulator and AF output. The AF output signal can be continuously attenuated to
decrease the noise. In case of multipath interferences, the TDA 4320X includes an
identification circuitry. There is a field strength output (with min. 76 dB dynamic range,
typ.
1 dB nonlinearity and typ.
3 dB temperature drift), an IF counter output and an
adjustable muting (with full muting
80 dB).
TDA 4320X
Semiconductor Group
40
04.96
4
Electrical Characteristics
4.1
Absolute Maximum Ratings
Note: Maximum ratings are absolute ratings; exceeding only one of these values may
cause irreversible damage to the integrated circuit.
4.2
Operating Range
Note: In the operating range the functions given in the circuit description are fulfilled.
T
A
= 40
C to + 85
C
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
Supply voltage
V
S
0
13.2
V
Junction temperature
T
j
150
C
Storage temperature
T
S
125
C
Thermal resistance (system-air)
R
thSA
105
K/W
ESD voltage, HBM (1.5 k
,
100 pF)
V
ESD
4
4
kV
T
A
= 40
C to + 85
C
Parameter
Symbol
Limit Values
Unit
Remarks
min.
max.
Supply voltage
V
S
7.5
13.2
V
Ambient temperature
T
A
40
85
C
TDA 4320X
Semiconductor Group
41
04.96
4.3
AC/DC Characteristics
V
S
= 10 V;
f
ilF
= 10.7 MHz;
f
= 75 kHz;
f
mod
= 1 kHz;
V
iIFrms
= 10 mV;
T
A
= 40
C to + 85
C
Parameter
Symbol
Limit Values
Unit
Test Condition
Test
Circuit
min.
typ.
max.
Current consumption
I
12
30
mA
V
5
= 4.8 V;
V
7
= 4 V
1
Stabilized voltage
V
10
4.5
4.8
5.1
V
V
5
= 4.8 V;
V
7
= 4 V
1
Field strength output
V
13
V
5
= 4.8 V;
V
7
= 4 V
Dynamic range
80
dB
D1
Nonlinearity
1
dB
D2
Temperature drift
3
dB
D3
Load capacitance
50
pF
Load resistance
1
k
V
13
5.0
5.5
6.0
V
V
ilFrms
= 200 mV
1
V
13
2.2
2.7
3.2
V
V
ilFrms
= 1 mV
1
V
13
0
1.2
V
V
ilFrms
= 0 mV
1
Input voltage for limiter
threshold
V
16
30
Vrms
V
qAF
= 3 dB
1
AF output voltage
V
qAF
480
840
mVrms
V
5
= 4.8 V;
V
7
= 4 V
1
Total harmonic distortion
THD
qAF
1.2
%
V
5
= 4.8 V;
V
7
= 4 V
1
AM suppression
a
AM
60
dB
m
= 80 %
1
76
dB
m
= 30 %
1
Signal-to-noise ratio
a
S/N
76
dB
V
5
= 4.8 V;
V
7
= 4 V
1
Counter output voltage
V
11
50
mVrms
C
L
= 5 pF;
R
i11
= 1.5 k
1
Noise detector sensitivity
V
2
3.2
mVrms
f
2
= 20 kHz
1
V
2
4.3
mVrms
f
2
= 300 kHz
1
Charge current Pin 3
I
3
2.5
mA
f
2
= 20 kHz;
V
2
6 mVrms
1
2.5
mA
f
2
= 300 kHz;
V
2
7 mVrms
1
Discharge current Pin 3
I
3
20
A
V
2AC
= 0 V
1
TDA 4320X
Semiconductor Group
42
04.96
AF MUTE
a
AF
0
dB
V
5
= 4.8 V;
V
7
= 4.8 V D4
2
2
dB
V
5
= 0 V;
V
7
= 4.8 V
D4
30
38
46
dB
V
5
= 0 V;
V
7
= 2.4 V
D4
80
dB
V
5
= 4.8 V;
V
7
1.0 V D4
80
dB
V
5
= 0 V;
V
7
1.0 V
D4
Voltage for MUTE OFF
V
5
0.7
V
1
Voltage for MUTE ON
V
5
0
V
1
V
S
= 10 V;
f
ilF
= 10.7 MHz;
f
= 75 kHz;
f
mod
= 1 kHz;
V
iIFrms
= 10 mV;
T
A
= 25
C
Parameter
Symbol
Limit Values
Unit
Test Condition
Test
Circuit
min.
typ.
max.
Current consumption
I
12
30
mA
V
5
= 4.8 V;
V
7
= 4 V 1
Stabilized voltage
V
10
4.6
4.8
5.0
V
V
5
= 4.8 V;
V
7
= 4 V 1
Field strength output
V
13
V
5
= 4.8 V;
V
7
= 4 V
Dynamic range
74
80
dB
D1
Nonlinearity
1
dB
D2
Temperature drift
3
dB
D3
Load capacitance
50
pF
Load resistance
1
k
V
13
5.1
5.5
5.9
V
V
ilFrms
= 200 mV
1
V
13
2.3
2.7
3.1
V
V
ilFrms
= 1 mV
1
V
13
0
1.1
V
V
ilFrms
= 0 mV
1
Input voltage for limiter
threshold
V
16
30
39
Vrms
V
qAF
= 3 dB
1
AF output voltage
V
qAF
550
650
750
mVrms
V
5
= 4.8 V;
V
7
= 4 V 1
Total harmonic distortion
THD
qAF
1.2
%
V
5
= 4.8 V;
V
7
= 4 V 1
AM suppression
a
AM
60
dB
m = 80 %
1
76
82
dB
m = 30 %
1
4.3
AC/DC Characteristics (cont'd)
V
S
= 10 V;
f
ilF
= 10.7 MHz;
f
= 75 kHz;
f
mod
= 1 kHz;
V
iIFrms
= 10 mV;
T
A
= 40
C to + 85
C
Parameter
Symbol
Limit Values
Unit
Test Condition
Test
Circuit
min.
typ.
max.
TDA 4320X
Semiconductor Group
43
04.96
4.3
AC/DC Characteristics (cont'd)
V
S
= 10 V;
f
ilF
= 10.7 MHz;
f
= 75 kHz;
f
mod
= 1 kHz;
V
iIFrms
= 10 mV;
T
A
= 25
C
Parameter
Symbol
Limit Values
Unit
Test Condition
Test
Circuit
min.
typ.
max.
Signal-to-noise ratio
a
S/N
76
84
dB
V
5
= 4.8 V;
V
7
= 4 V
1
Counter output voltage
V
11
50
80
mVrms
C
L
= 5 pF;
R
i11
= 1.5 k
1
Noise detector sensitivity
V
2
2
3.2
6
mVrms
f
2
= 20 kHz
1
V
2
2.7
4.3
7
mVrms
f
2
= 300 kHz
1
Charge current Pin 3
I
3
1.6
2.5
4
mA
f
2
= 20 kHz;
V
2
6 mVrms
1
1.6
2.5
4
mA
f
2
= 300 kHz;
V
2
7 mVrms
1
Discharge current Pin 3
I
3
10
20
40
A
V
2AC
= 0 V
1
AF MUTE
a
AF
0
dB
V
5
= 4.8 V;
V
7
= 4.8 V
D4
2
2
dB
V
5
= 0 V;
V
7
= 4.8 V
D4
32
38
44
dB
V
5
= 0 V;
V
7
= 2.4 V
D4
80
dB
V
5
= 4.8 V;
V
7
1.0 V
D4
80
dB
V
5
= 0 V;
V
7
1.0 V
D4
Voltage for MUTE OFF
V
5
0.5
V
1
Voltage for MUTE ON
V
5
0
0.1
V
1
TDA 4320X
Semiconductor Group
44
04.96
Test Circuit 1
Figure 3
TDA 4320X
Semiconductor Group
45
04.96
Application Circuit
Figure 4
TDA 4320X
Semiconductor Group
46
04.96
Diagrams
Diagram D1
V
F
Dynamics
The dynamic range of
V
F
voltage is determined by the test points M1 through M4 as
follows:
M1:
test point (at
V
iIF
= 60 dBm) supplies
V
F
(M1)
M2:
test point (at
V
iIF
= 20 dBm) supplies
V
F
(M2)
M3:
test point (at
V
iIF
= 90 dBm) supplies
V
F
(M3)
M4:
test point (at
V
iIF
=
+
5 dBm) supplies
V
F
(M4)
Hence follows:
M
VF max
:= 20 dBm + (
V
F
(M4)
V
F
(M2)
)/(
V
F
(M2)
V
F
(M1)
)
40 dB
M
VF min
:= 60 dB
V (
V
F
(M1)
V
F
(M3)
)/(
V
F
(M2)
V
F
(M1)
)
40 dB
V
F Dynamics
=
M
VF max
M
VF min
TDA 4320X
Semiconductor Group
47
04.96
Diagram D2
Test points to determine
V
F
linearity:
V
F
is determined at 25
C
Slope:
m
= (
V
F
(M2)
V
F
(M1)
)/40 dB.
The tolerance range of the
V
F
-linearity is determined by two parallel lines:
V
F max
=
V
F
(M1)
+
m
(M + 60 dB + 1 dB)
V
F min
=
V
F
(M1)
+
m
(M + 60 dB 1 dB)
The
V
F
values within the
V
F
dynamic range (
M
VF min
M
M
VF max
)
must be inside the
predetermined tolerance range:
V
F min
V
F
(M)
V
F max
TDA 4320X
Semiconductor Group
48
04.96
Diagram D3
Test points to determine
V
F
temperature drift:
V
F
-temperature drift: it is determined within 40 to + 85
C.
Slope:
m
= (
V
F
(M2)
V
F
(M1)
)/40 dB (at 25
C).
The tolerance range of the
V
F
-temperature is determined by two parallel lines:
V
F max
=
V
F
(M1)
+
m
(M + 60 dB + 3 dB)
V
F min
=
V
F
(M1)
+
m
(M + 60 dB 3 dB)
The
V
F
values for temperatures between 40 to + 85
C within the
V
F
dynamic range
(
M
VF min
V
F
M
VF max
)
must be inside the predetermined tolerance field:
V
F min
V
F
(M)
V
F max
TDA 4320X
Semiconductor Group
49
04.96
Diagram D4
Mute Characteristics
TDA 4320X
Semiconductor Group
50
04.96
5
Package Outlines
P-DSO-16-1
(Plastic Dual Small Outline Package)
GPS05119
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book "Package Information".
Dimensions in mm
SMD = Surface Mounted Device
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