Rev. 0.14 2/06

Copyright � 2006 by Silicon Laboratories

Si5xx-EVB

V A L U A T I O N

O A R D

F O R

Si53

A N D

Si55

VCXO

Description

This document describes the operation of the Silicon
Laboratories Si5xx-EVB evaluation board to evaluate
both Silicon Laboratories' Si55x VCXOs and Si53x XOs.
The Si55x and Si53x devices use Silicon Laboratories'
advanced DSPLL

�

circuitry to provide a low-jitter clock

at high frequencies. The Si55x/Si53x IC-based device is
factory configurable for a wide variety of user
specifications including frequency, supply voltage,
output, and tuning slope. Specific configurations are
factory programmed into the Si55x/Si53x at time of
shipment, thereby eliminating the long lead times
associated with custom oscillators. Si55x/Si53x
samples should be ordered at the same time as the
Si5xx-EVB since the EVB does not come with the
device. This allows end users maximum flexibility.
Silicon Laboratories can solder down samples when
ordering an EVB; please specify when ordering.

Features

Evaluation of Silicon Laboratories' Si55x/53x family
AC-coupled differential output clocks
Voltage control (V

) input port (for Si55x devices)

Jumper selection for multi-frequency outputs
Jumper selection for output enable

Functional Block Diagram

Si5xx

Device

Input

CLK+

Output

Bias

Block

RC Filter

(no-pop)

Configuration

Jumpers

CLK�

Power Input

Si5xx-EVB

Rev. 0.14

1. Functional Description

The Si5xx-EVB provides access to all signals for
configuring and operating the device. This board allows
evaluation of the Si55x VCXO device either by itself
(open-loop) or within a prototype PLL (closed-loop). The
performance of the Si53x XO device can also be
evaluated on this board (the Vc port is not used for XO
devices).

1.1. Power Supply

The Si55x/Si53x devices support operation from
nominal voltages of 1.8, 2.5, and 3.3 V. Review the
device data sheet and part number for allowed
configurations of output buffer type and device power
supply.

1.2. Voltage Control for VCXOs

The voltage control (V

) input of the Si55x device is

conveniently accessible through an SMA jack (J3) but
can also be driven (and observed) through 100 mil-
centered posts (JP4). For prototyping purposes, two
0603 solder pads are located near the device V

input

(R3 and C3). A traditional PLL might use these as a
single-time-constant low-pass filter (RC filter). The EVB
is shipped with a 0

resistor soldered at R3; C3 is left

open. The voltage control input is not used for XO
devices.

1.3. Output Clock

Because the Si55x/Si53x devices can support an
LVPECL buffer type (in addition to LVDS and CMOS),
pulldown resistors (R1 and R2) are available for proper
output biasing. For LVPECL buffers, biasing can be
achieved through a variety of equivalent circuits; the
Si5xx-EVB allows for 130

pulldown resistors. After

the output biasing, the high-speed outputs are dc-
blocked for connection to differently biased inputs, such
as standard test equipment or a phase detector EVB.
Please review "1.4. Preparing the EVB" for non-LVPECL
devices.

1.4. Preparing the EVB

By default, the evaluation board is set up to accept
LVPECL configured devices. This configuration uses
130

pull-down resistors to bias the LVPECL output

stage. If an LVDS, CMOS, or CML based device is to
be installed, the output biasing resistors, R1 and R2,
should be removed.

Table 1. Jumper Control

Part Type

JP1

JP2

JP3

JP4

Si530

N/A

Si532

N/A

Freq Sel

Si534

Freq Sel1 Freq Sel2

N/A

Si550

N/A

Si552

N/A

Freq Sel

Si554

Freq Sel1 Freq Sel2

Notes:

1. With jumper(s) installed, signal(s) are driven low.
2. With jumper(s) not installed, signal(s) are pulled high.

Si5xx-EVB

Rev. 0.14

2. Schematics

VDD

EVB Power Input

Vc input

High-order pole

Alternate Vc input

Place in-line with J3

Main output; route as differential pair

Silicon Labs VCXO

Frequency Select

Output Enable

JP4
JP4

SMA

JP1
JP1

0.1uF

DNS

SMA

0.1uF

DNS

JP2
JP2

POS1

POS2

MKDSN 2,5/3-5,08

CLKOUT-

CLKOUT+

VDD

GND

DNC

Si550

DNS

JP3
JP3

i
gure

1
.
S

i5x

x
-EVB Sc

hematic

Si5xx-EVB

Rev. 0.14

3. Bill of Materials

Item Quantity Reference

Description

Manufacturer's #

Manufacturer

C1,C2

CAP,SM,0.1UF,16V,20%,X7R,0402

C0402X7R160-104KNE

VENKEL

CAP,SM,0.1UF,16V,20%,X7R,0603

C0603X7R160-104KNE

VENKEL

CAP,SM,10UF,10V,10%,TANTALUM,3216 TA010TCM106KAR

VENKEL

CAP,SM,100PF,50V,10%,C0G,0603

C0603C0G500-101KNE

VENKEL

JP1,JP2,JP3,JP4 CONN,HEADER,2X1

TSW-150-07-T-D or TSW-150-07-T-S SAMTEC

J1,J2,J3

CONN,SMA SIDE MOUNT

901-10003

AMPHENOL

CONN,POWER,2 POSITION

1729018

PHOENIX CONTACT

RES,SM,0 OHM,0603

CR0603-16W-000T

VENKEL

R1,R2

RES,SM,150,1%,0603

CR0603-16W-1500FT

VENKEL

No Load

1 C3

CAP,SM,0.1UF,16V,20%,X7R,0603

C0603X7R160-104KNE

VENKEL

1 U1

Si5XX

SILICON LABORATORIES

Si5xx-EVB

Rev. 0.14

ONTACT

NFORMATION

Silicon Laboratories Inc.
4635 Boston Lane
Austin, TX 78735
Tel: 1+(512) 416-8500
Fax: 1+(512) 416-9669
Toll Free: 1+(877) 444-3032
Email: VCXOinfo@silabs.com
Internet: www.silabs.com

Silicon Laboratories, Silicon Labs, and DSPLL are trademarks of Silicon Laboratories Inc.
Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders.

The information in this document is believed to be accurate in all respects at the time of publication but is subject to change without notice.
Silicon Laboratories assumes no responsibility for errors and omissions, and disclaims responsibility for any consequences resulting from
the use of information included herein. Additionally, Silicon Laboratories assumes no responsibility for the functioning of undescribed features
or parameters. Silicon Laboratories reserves the right to make changes without further notice. Silicon Laboratories makes no warranty, rep-
resentation or guarantee regarding the suitability of its products for any particular purpose, nor does Silicon Laboratories assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation conse-
quential or incidental damages. Silicon Laboratories products are not designed, intended, or authorized for use in applications intended to
support or sustain life, or for any other application in which the failure of the Silicon Laboratories product could create a situation where per-
sonal injury or death may occur. Should Buyer purchase or use Silicon Laboratories products for any such unintended or unauthorized ap-
plication, Buyer shall indemnify and hold Silicon Laboratories harmless against all claims and damages.

Электронный компонент: SI5XX-EVB

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