1
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
Copyright 2004 Sipex Corporation
Very Low Dropout Voltage: 0.6
PMOS Pass
Device
Accurate Output Voltage: 2% over Temperature
Guaranteed 500mA Output Current: SP6205
Ultra Low Noise Output: 12
V
RMS
with 10nF
Bypass
Unconditionally Stable with 2.2
F Ceramic
Low Quiescent Current: 45
A
Very Low Ground Current: 350
A at 500 mA
Power-Saving Shutdown Mode: < 1
A
Fast Turn-On and Turn-Off: 60us
Fast Transient Response
Current Limit and Thermal Shutdown Protection
Very Good Load/Line Regulation: 0.07/0.04%
Excellent PSRR: 67dB<1kHz
Industry Standard 5 pin SOT-23 and Small 8
pin DFN Package
Fixed Output Voltages: 2.5V, 2.7V, 2.8V,
2.85V, 3.0V and 3.3V
Adjustable Output Available
Low Noise, 300mA and 500mA CMOS LDO Regulators
SP6203/6205
DESCRIPTION
Cellular / GSM Phones
Laptop / Palmtop Computers
Battery-Powered Systems
Pagers
Medical Devices
MP3/CD Players
Digital Still Cameras
FEATURES
APPLICATIONS
The SP6203/6205 are ultra low noise CMOS LDOs with very low dropout and ground current. The noise
performance is achieved by means of an external bypass capacitor without sacrificing turn-on and turn-off
speed critical to portable applications. Extremely stable and easy to use, these devices offer excellent PSRR
and Line/Load regulation. Target applications include battery-powered equipment such as portable and
wireless products. Regulators' ground current increases only slightly in dropout. Fast turn-on/turn-off enable
control and an internal 30
pull down on output allows quick discharge of output even under no load
conditions. Both LDOs are protected with current limit and thermal shutdown.
Both LDO's are availiable in fixed & adjustable output voltage versions and come in an industry standard
5 pin SOT-23 and small 8 pin DFN package. For SC-70 100mA CMOS LDO, SP6213 is available.
TYPICAL APPLICATION CIRCUIT
3
2
1
C
OUT
2.2F Ceramic
V
OUT
V
IN
EN
BYP
4
5
SP6203
SP6205
5-Pin
FIXED
C
IN
2.2F
3
2
1
C
OUT
2.2F Ceramic
V
OUT
V
IN
EN
ADJ
4
5
SP6203
SP6205
5-Pin
ADJUSTABLE
C
IN
2.2F
Fixed
Adjustable
Now Available in Lead Free Packaging
V
OUTSENSE
SP6203
SP6205
8 Pin DFN
V
IN
NC
V
OUT
BYP
GND
EN
NC
1
2
3
4
8
7
6
5
SP6203
SP6205
8 Pin DFN
V
IN
NC
V
OUT
ADJ
NC
GND
EN
NC
1
2
3
4
8
7
6
5
2
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
Copyright 2004 Sipex Corporation
ELECTRICALCHARACTERISTICS
ABSOLUTE MAXIMUM RATINGS
Supply Input Voltage (V
IN
) ...................................................... -2V to 6V
Output Voltage (V
OUT
) ................................................. -0.6V to V
IN
+1V
Enable Input Voltage (V
EN
) ..................................................... -2V to 6V
Power Dissipation (P
D
) ................................... Internally Limited, Note 1
Lead Temperature (soldering 5s) .............................................. +260
C
Storage Temperature .................................................. -65
C to +150
C
Junction Temperature ............................................................... +150
C
These are stress ratings only and functional operation of the device at these
ratings or any other above those indicated in the operation sections of the
specifications below is not implied. Exposure to absolute maximum rating
conditions for extended periods of time may affect reliability.
Unless otherwise specified: V
IN
=V
OUT
+ 0.5V to 6V, C
OUT
= 2.2
F ceramic, C
IN
= 2.2
F, I
OUT
=100
A,
-40
C < T < 125
C. The
denotes the specifications which apply over full operating temperature range -40
C to
+125
C, unless otherwise specified.
PARAMETER
MIN
TYP
MAX
UNITS
CONDITIONS
Input Voltage
6
V
Output Voltage Accuracy
-2
+2
%
Variation from specified V
OUT
Output Voltage
50
ppm/
C
V
OUT
/
T
Temperature Coefficient, Note2
Reference Voltage
1.225
1.25
1.275
V
Adjustable version only
Line Regulation
0.04
0.3
%/V
V
OUT
(V
IN
below 6V)
Load Regulation, Note 3
0.07
0.3
%
I
OUT
= 0.1mA to 300mA (SP6203)
0.13
0.5
I
OUT
= 0.1mA to 500mA (SP6205)
Dropout Voltage, Note 4
0.06
I
OUT
= 0.1mA
(For V
OUT
3.0V)
60
I
OUT
= 100mA
120
mV
I
OUT
= 200mA
180
300
I
OUT
= 300mA (SP6203)
300
500
I
OUT
= 500mA (SP6205)
Ground Pin Current, Note 5
45
100
I
OUT
= 0.1mA (I
QUIESCENT
)
110
I
OUT
= 100mA
175
A
I
OUT
= 200mA
235
330
I
OUT
= 300mA (SP6203)
350
490
I
OUT
= 500mA (SP6205)
Shutdown Supply Current
0.01
1
A
V
EN
< 0.4V (shutdown)
Current Limit
0.33
0.50
0.8
A
V
OUT
= 0V (SP6203)
0.55
0.85
1.4
V
OUT
= 0V (SP6205)
Thermal Shutdown Junction
170
C
Regulator Turns off
Temperature
Thermal Shutdown Hysteresis
12
C
Regulator turns on again at 158
C
Power Supply Rejection Ratio
67
dB
f
1kHz
Output Noise Voltage, Note 6
150
C
BYP
= 0nF, I
OUT
= 0.1mA
630
C
BYP
= 0nF, I
OUT
=300mA
12
V
RMS
C
BYP
= 10nF, I
OUT
= 0.1mA
50
75
C
BYP
= 10nF, I
OUT
= 300mA
Thermal Regulation, Note 7
0.05
%/W
V
OUT
/
P
D
Wake-Up Time (T
WU
), Note 8
25
50
s
V
IN
4V, Note 10
(from shutdown mode)
I
OUT
= 30mA
Turn-On Time (T
ON
), Note 9
60
120
s
V
IN
4V, Note 10
(from shutdown mode)
I
OUT
= 30mA
Turn-Off Time (T
OFF
),
100
250
s
I
OUT
= 0.1mA, V
IN
4V, Note 10
15
25
I
OUT
= 300mA, V
IN
4V, Note 10
Output Discharge Resistance
30
No Load
Enable Input Logic Low Voltage
0.4
V
Regulator Shutdown
Enable Input Logic High Voltage
1.6
V
Regulator Enabled
Input Voltage (V
IN
) ......................................................... +2.7V to +5.5V
Enable Input Voltage (V
EN
) ...................................................... 0 to 5.5V
Junction Temperature (T
J
) ........................................... -40
C to +125
C
Thermal Resistance, SOT-23-5 (
JA
) ........................................... Note 1
Thermal Resistance, 8 Pin DFN (
JA
) .......................................... Note 1
Remark: The device is not guaranteed to function outside its operating rating.
OPERATING RATINGS
3
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
Copyright 2004 Sipex Corporation
ELECTRICAL CHARACTERISTIC NOTES
Note 1: Maximum power dissipation can be calculated using the formula: P
D
= (T
J(max)
- T
A
) /
JA
, where T
J(max)
is
the junction temperature, T
A
is the ambient temperature and
JA
is the junction-to-ambient thermal resistance.
JC
is 6C/W for this package. Exceeding the maximum allowable power dissipation will result in excessive die
temperature and thermal shutdown protection. For 5 Pin SOT-23
JA
is 191
C/W and 59
C/W for the 8 Pin DFN. A
part mounted on a PC board will deliver improved thermal perfformance based on copper surface area.
Note 2: Output voltage temperature coefficient is defined as the worst case voltage change divided by the total
temperature range.
Note 3: Regulation is measured at constant junction temperature using low duty cycle pulse testing. Changes in
output voltage due to heating effects are covered by the thermal regulation specification.
Note 4: Dropout-voltage is defined as the input to output differential at which the output voltage drops 2% below its
nominal value measured at 1V differential.
Note 5: Ground pin current is the regulator quiescent current. The total current drawn from the supply is the sum of
the load current plus the ground pin current.
Note 6: Output noise voltage is defined within a certain bandwidth, namely 10Hz < BW < 100kHz. An external
bypass cap (10nF) from reference output (BYP pin) to ground significantly reduces noise at output.
Note 7: Thermal regulation is defined as the change in output voltage at a time "t" after a change in power
dissipation is applied, excluding load and line regulation effects.
Specifications are for a 300mA load pulse at V
IN
= 6V for t = 1ms.
Note 8: The wake-up time (T
WU
) is defined as the time it takes for the output to start rising after enable is brought
high.
Note 9: The total turn-on time is called the settling time (T
S
), which is defined as the condition when both the
output and the bypass node are within 2% of their fully enabled values when released from shutdown.
Note 10: For output voltage versions requiring VIN to be lower than 4V, timing (T
ON
& T
OFF
) increases slightly.
(optional)
Cbyp
V
OUT
BYP
EN
VIN
GND
bandgap
reference
thermal shutdown
&
current limit
1.25V
R2
R1
ADJ
V
OUT
EN
V
IN
GND
bandgap
reference
thermal shutdown
&
current limit
1.25V
Low Noise Fixed Regulator - 5 Pin
Low Noise Adjustable Regulator - 5 Pin
FUNCTIONAL DIAGRAM
4
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
Copyright 2004 Sipex Corporation
PIN DESCRIPTION
PIN NUMBER
NAME
FUNCTION
1
V
IN
Power Supply Input
2
GND
Ground Terminal
3
EN
Enable/Shutdown (Logic high = enable, logic
low = shutdown)
4 (Fixed)
BYP
Reference bypass input for ultra-quiet operation.
Connecting a 10nF cap on this pin reduces
output noise.
4 (adj.)
ADJ
Adjustable (Input): Adjustable regulator feed-
back input. Connect to a resistive voltage-
divider network.
5
V
OUT
Regulator Output Voltage
5 PIN OPTION
V
IN
GND
EN
V
OUT
BYP
SIPEX
4
3
5
1
2
V
IN
GND
EN
V
OUT
ADJ
SIPEX
4
3
5
1
2
Fixed Voltage Regulator
Adjustable Voltage Regulator
PINOUTS
5
Date: 05/25/04
SP6203/6205 Low Noise, 300 and 500mA CMOS LDO Regulators
Copyright 2004 Sipex Corporation
TYPICAL PERFORMANCE CHARACTERISTICS
V
OUT
I
O
(200mA/DIV)
V
OUT
V
EN
V
OUT
V
EN
V
OUT
V
EN
V
OUT
(AC)
I
OUT
V
OUT
(AC)
V
IN
Current Limit
Turn on Time, R
LOAD
= 50
(60mA)
Turn off Time, R
LOAD
= 6
(500mA)
Turn off Time, R
LOAD
= 30K (0.1mA)
Line Regulation, Line Step from 4V to 6V, I
O
= 1mA
Load Regulation, I
O
= 100
A ~ 500mA
PDF 
ZIP