1
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
SP6644/6645
Single/Dual Alkaline Cell, High Efficiency
Boost DC-DC Regulator
90mA Output Current at 1.3V Input
190mA Output Current at 2.6V Input
+2V to +5.5V Output Range
0.88V Guaranteed Start-Up
92% High Efficiency
1.6
A Quiescent Supply Current at V
BATT
Reverse Battery Protection
Internal Synchronous Rectifier
5nA Logic Controlled Shutdown Current
From V
BATT
Low-Battery Detection Active LOW Output
Small 8 Pin MSOP Package
Flexibility to Optimize Inductor Type with
Programmable Peak Current Control
No External FETs
GND
FB
LX
V
BATT
47
F
47
F
R
LIM
+3.3V
OUT
SHDN
22
H
0.7A
0.88V to
3.3V Input
SP6644
SP6645
BATTLO
V
OUT
DESCRIPTION
The SP6644/6645 devices are high-efficiency, low-power step-up DC-DC converters ideal
for single or dual alkaline cell applications such as pagers, remote controls, pointing devices,
medical monitors, and other low-power portable end products. Designers can control the
SP6644 device with an active LOW shutdown input. The SP6644 device features an active
low output for batteries below +1.0V. The SP6645 device features an active low output for
batteries below +2.0V. Both devices contain a 0.8
synchronous rectifier, a 0.5
N-channel MOSFET power switch, an internal voltage reference, circuitry for pulse-
frequency-modulation, and an under voltage comparator. The output voltage for the
SP6644/6645 devices is preset to +3.3V + 4% or can be adjusted from +2V to +5.5V by
manipulating two external resistors
TYPICAL APPLICATION CIRCUIT
SP6644
SP6645
8 Pin MSOP
8
7
6
4
V
OUT
LX
GND
FB
V B AT
B AT T L 0
R L I M
S H D N
1
2
3
4
2
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
These are stress ratings only and functional operation of the
device at these ratings or any other above those indicated in
the operation sections of the specifications below is not
implied. Exposure to absolute maximum rating conditions for
extended periods of time may affect reliability.
V
BATT
to GND.............................................-0.3 to 6.0V
V
OUT
to GND..............................................-0.3 to 6.0V
LX, SHDN, FB, BATTLO, to GND.............-0.3 to 6.0V
Reverse battery Current, T
AMB
=+25C.............220mA
(NOTE 1)
V
BATT
forward current............................................0.5A
V
OUT
, LX current......................................................1A
Storage Temperature Range............-65C to +165C
Lead Temperature (soldering 10s)..................+300C
Operating Temperature.......................-40C to +85C
Power Dissipation Per Package
8-pin
SOIC
(derate 4.85mW/
O
C above +70
O
C)
..........390mW
V
BATT
= V
SHDN
= 1.3V, I
LOAD
= 0mA, FB = GND, T
AMB
= -40
o
C to +85
o
C, and typical values are at T
AMB
= +25
o
C unless otherwise noted.
ELECTRICAL CHARACTERISTICS
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ABSOLUTE MAXIMUM RATINGS
3
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
V
BATT
= V
SHDN
= 1.3V, I
LOAD
= 0mA, FB = GND, T
AMB
= -40
o
C to +85
o
C, and typical values are at T
AMB
= +25
o
C unless otherwise noted.
NOTE 1: The reverse battery current is measured from the Typical Operating Circuit's input terminal to GND
when the battery is connected backward. A reverse current of 220mA will not exceed package dissipation limits
but, if left for an extended time (more than 10 minutes), may degrade performance.
NOTE 2: Specifications to -40
o
C are guaranteed by design, not production tested.
NOTE 3: Inductor Peak Current where .
I
PEAK
=
1400
R
LIM
R
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ELECTRICAL CHARACTERISTICS
4
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Refer to the circuit in Figure 28, T
AMB
= +25
o
C unless otherwise noted.
Figure 1. Efficiency vs. Output Current (Vout=3.3V),
Rlim=2.5k, Li=22uH Sumida CD43
Figure 2. Efficiency vs. Output Current (V
OUT
=3.3V),
Rlim=5k, Li=22
H Sumida CD43
Figure 3. Efficiency vs. Output Current (Vout=3.3V),
Rlim=2.5k, Li=22uH Sumida CDRH5D18 Low Profile
Figure 4. Efficiency vs. Output Current (Vout=3.3V),
Rlim=5k, Li=100
H Sumida CD54
Figure 5. Efficiency vs. Output Current (Vout=5V),
Rlim=2.5k, Li=22uH Sumida CD43, Refer to Figure 29,
R1=499k, R2=169k
Figure 6. Efficiency vs. Output Current (Vout=5V),
Rlim=5k, Li=22uH Sumida CD43, Refer to Figure 29,
R1=499k, R2=169k
Figure 8. Line/Load Rejection vs. Output Current
(Vout=3.3V), Rlim=5k, Li=22uH Sumida CD43
Figure 7. Line/Load Rejection vs. Output Current
(Vout=3.3V), Rlim=2.5k, Li=22uH Sumida CD43
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
3.27
3.28
3.29
3.30
3.31
3.32
3.33
0
20 40
60 80 100 120 140 160 180 200
Iload (mA)
Vb=1.3V
Vb=2.6V
V
OUT
(V)
3.27
3.28
3.29
3.30
3.31
3.32
3.33
0
10
20 30 40 50 60 70 80
90 100
Iload (mA)
Vb=1.3V
Vb=2.6V
V
OUT
(V)
PERFORMANCE CHARACTERISTICS
5
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Refer to the circuit in Figure 28, T
AMB
= +25
o
C unless otherwise noted.
Figure 11. Maximum Load Current vs. Vbatt
(Vout=3.3V), Li=22uH Sumida CD43
Figure 13. No Load Battery Current vs. Vbatt
(Vout=3.3V), Li=22uH Sumida CD43
Figure 14. Output Voltage vs. Temperature,
Rlim=2.5k, Rload=3k, (Vout=3.3V),Li=22uH Sumida CD43
Figure 16. Ibatt Pin Quiescent Current vs. Temperature,
(Vout=3.3V), Vbatt=1.0V
Figure 15. Io Pin Quiescent Current vs. Temperature,
(Vout=3.3V)
Figure 9. Line/Load vs. Output Current (Vout=5V),
Rlim=2.5k, Li=22uH Sumida CD43, Refer to figure 29,
R1=499k, R2=169k
Figure 10. Line/Load vs. Output Current (Vout=5V),
Rlim=5k, Li=22uH Sumida CD43, Refer to figure 29,
R1=499k, R2=169k
Figure 12. Maximum Load Current vs. Vbatt (Vout=5V),
Li=22uH Sumida CD43, Refer to Figure 29,
R1=499k, R2=169k
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
0
10 20
30
40
50
60
70
80 90 100
Iload (mA)
Vb=1.3V
Vb=2.6V
V
OUT
(V)
5.00
5.01
5.02
5.03
5.04
5.05
5.06
5.07
5.08
0
10
20
30
40
50
Iload (mA)
Vb=1.3V
Vb=2.6V
V
OUT
(V)
0
20
40
60
80
100
120
140
160
180
200
220
240
0.0
1.0
2.0
3.0
4.0
Vbatt (V)
Rlim=2.5K
Rlim=5K
Max I
O
(mA)
0
20
40
60
80
100
120
140
160
180
200
220
240
0.0
1.0
2.0
3.0
4.0
Vbatt (V)
Rlim=2.5K
Rlim=5K
Max I
O
(mA)
10
100
1000
10000
0.0
1.0
2.0
3.0
4.0
Vbatt (V)
Rlim=2.5k
Rlim=5k
Battery Current (
A)
3.27
3.28
3.29
3.30
3.31
3.32
3.33
-40
-20
0
20
40
60
80
100
Temperature (degC)
V
OUT
(V)
30
35
40
45
50
55
60
-40
-20
0
20
40
60
80
100
Temperature (degC)
I
OQ
(
A)
0.0
0.5
1.0
1.5
2.0
2.5
3.0
-40
-20
0
20
40
60
80
100
Temperature (degC)
I
BQ
(
A)
PERFORMANCE CHARACTERISTICS
6
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Figure 17. SP6644/6201 DC/DC LDO Combination
Efficiency vs. Output Current (Vout=3.3V), Rlim=2.5k,
Li=22
H Sumida CD-43, Refer to Figure 30
Figure 18. SP6644/6201 LDO Line/Load Rejection vs.
Output Current (Vout=3.3V), Rlim=2.5k, Li=22
H
Sumida CD-43, Refer to Figure 30
Figure 19. SP6644/6201 DC/DC LDO Maximum Load
Current vs. Vbatt (Vout=3.3V), Rlim=2.5k, Li=22
H
Sumida CD-43, Refer to Figure 30
Figure 20. SP6644/6201 DC/DC LDO No-Load Ibatt vs.
Vbatt (Vout=3.3V), Rlim=2.5k, Li=22
H Sumida CD-
43, Refer to Figure 30
Figure 21. SP6644/6201 DC/DC LDO Output Ripple
Voltage (Vout=3.3V), Rlim=2.5k, Li=22
H Sumida CD-
43, Refer to Figure 30
Figure 22. Load Transient Response, Vbatt=1.3V,
(Vout=3.3V), Rlim=2.5k, Li=22
H Sumida CD-43
Figure 23. Line Transient Response, (Vout=3.3V),
Rlim=2.5k, Iload=22
H Sumida CD-43
Figure 24. Switching Waveforms, (Vout=3.3V),
Vbatt=1.3V, Rlim=2.5k, Iload=10mA, Li=22
H Sumida
CD-43
Refer to the circuit in Figure 28, T
AMB
= +25
o
C unless otherwise noted.
30
40
50
60
70
80
90
100
0.1
1.0
10.0
100.0
1000.0
Iload (mA)
Vb=1.0V
Vb=1.3V
Vb=2.0V
Vb=2.6V
Vb=3.2V
Efficiency (%)
3.032
3.033
3.034
3.035
3.036
3.037
0
20 40
60 80 100 120 140 160 180 200
Iload (mA)
Vb=1.3V
Vb=2.6V
V
OUT
(V)
0
20
40
60
80
100
120
140
160
180
200
220
240
0.0
1.0
2.0
3.0
4.0
Vbatt (V)
Max I
O
(mA)
10
100
1000
10000
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
Vbatt (V)
Battery Current (
A)
SP6201 Out
10mV/div
SP6644 Out
20mV/div
Li
0.5A/div
V
OUT
50mV/div
V
BATT
50mV/div
V
OUT
50mV/div
V
BATT
1V/div
Li
0.2A/div
V
OUT
, V
LX
,V
BATT
1V/div
PERFORMANCE CHARACTERISTICS
7
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Figure 25. Shutdown Response and Inductor Current,
Vout=3.3V, Vbatt=1.3V, Rlim=2.5k, Rload=550 Ohms,
Li=22uH Sumida CD43
Table 1. SP6644/6645 Pin Descriptions
Figure 26. Pinout for the SP6644/6645
Refer to the circuit in Figure 28, T
AMB
= +25
o
C, unless otherwise noted.
V
OUT
GND
RLIM
V
BATT
LX
1
2
3
4
5
6
7
8
SP6644
SP6645
SHDN
FB
BATTLO
E
M
A
N
N
O
I
T
C
N
U
F
.
O
N
N
I
P
V
T
T
A
B
.
r
o
t
a
r
a
p
m
o
c
O
L
T
T
A
B
e
h
t
f
o
t
u
p
n
i
r
o
s
n
e
s
e
h
t
o
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8
I
PEAK
=
1400
R
LIM
SDN
2V/div
Li
0.5A/div
V
OUT
, V
BATT
1V/div
PERFORMANCE CHARACTERISTICS
PIN DESCRIPTION
8
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
DESCRIPTION
The SP6644/6645
devices are high-efficiency,
low-power step-up DC-DC converters ideal for
single or dual alkaline cell applications such as
pagers, remote controls, and other low-power
portable end products.
The SP6644/6645 devices feature a 5nA logic-
controlled shutdown mode and a dedicated
low-battery detector circuitry. Both devices
contain a 0.8
synchronous rectifier, a 0.5
N-channel MOSFET power switch, an internal
voltage reference, circuitry for pulse-frequency-
modulation, and an under voltage comparator.
The output voltage for the SP6644/6645 devices
can be adjusted from +2V to +5.5V by
manipulating two external resistors. The output
voltage is preset to +3.3V.
THEORY OF OPERATION
The SP6644/6645 devices are ideal for end
products that function with a single or dual alkaline
cell, such as remote controls, pagers, and other
portable consumer products. Designers can
implement the SP6644/6645 devices into
applications with the following power
management operating states: 1. where the
primary battery is good and the load is active, and
2. where the primary battery is good and
the load is sleeping.
In the first operating state where the primary
supply is good and the load is active, the
SP6644/6645 devices typically offer 88%
efficiency, drawing tens of milliamps.
Applications will predominantly operate in the
second state where the primary supply is good
and the load is sleeping. The SP6644/6645 devices
draw a very low quiescent current while the load
in its disabled state will draw typically hundreds
of microamps.
The pulse-frequency-modulation (PFM) circuitry
provides higher efficiencies at low to moderate
output loads than traditional PWM converters are
capable of delivering.
In a state where the error comparator detects that
the output voltage at V
OUT
is too low, the internal
N-channel MOSFET switch is turned on until the
peak inductor current is satisfied. This is indicated
by the falling edge of the I-Charge comparator
output. The approximate inductor charging time
is defined by:
t
CHARGE
L x I
PEAK
/ V
BATT
where t
CHARGE
[s] is the approximate inductor
charging time, L [H] is the inductance, I
PEAK
[A]
is the peak inductor current, and V
BATT
[V] is the
input voltage to the device.
The peak inductor current, I
PEAK
, is programmed
externally by putting a resistor between the R
LIM
pin and ground. This is defined by:
I
PEAK
= 1400
R
LIM
where I
PEAK
[A] is the peak inductor current and
R
LIM
[
] is the value of the resistor connected
from pin R
LIM
to ground.
When the charging N MOSFET turns off, the
discharging P MOSFET turns on and the inductor
current flows into the output capacitor and the
load recharging the output. When the current
through the discharging P MOSFET approaches
zero, the I-Discharge comparator indicates to the
logic to turn off the P MOSFET. The approximate
time for discharging the inductor current can be
determined by:
t
DCHG
L x I
PEAK
V
OUT
- V
BATT
where t
DCHG
[s] is the time to discharge the
inductor, L [H] is the inductance, I
PEAK
[A] is the
peak inductor current, V
OUT
[V] is the output
voltage, and V
BATT
[V] is the input voltage to the
device.
The output filter capacitor stores charge while
current from the inductor is high and holds the
output voltage high until the discharge phase of
the next switching cycle, smoothing power flow
to the load. Between switching cycles, the
inductor damping switch is closed suppressing
the ringing caused by the inductor and the parasitic
capacitance on the LX node.
9
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Figure 27. Internal Block Diagram of the SP6644/6645
SHDN
LOGIC DRV-P
DRV-N
FB
V
BATT
P
DISCHARGE
V
OUT
LX
+1.0V (SP6644)
+2.0V (SP6645)
V
REF
BATTLO
START
UP
OSC
N
CHARGE
N
SP6644
SP6645
N
Inductor
Damping
Switch
I-Discharge
I-Charge
REFREADY
+1.0V (SP6644)
+2.0V (SP6645)
V
LPK
GND
+1.25V
R
LIM
R
LIM
BLOCK DIAGRAM
10
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Internal Bootstrap Circuitry
The internal bootstrap circuitry contains a
low-voltage start-up oscillator that pumps up the
output voltage to approximately 1.9V so the
main DC-DC converter can function. At lower
battery supply voltages, the circuitry can start up
with low-load conditions. Designers can reduce
the load as needed to allow start-up with input
voltages below 1V. Refer to Figures 10 to
13. Once started, the output voltage can maintain
the load as the battery voltage decreases below
the initial start-up voltage. The start-up oscillator
is powered by V
BATT
driving a charge pump and
NMOS switch. During start-up, the P-channel
synchronous rectifier remains off and either its
body diode or an external diode is used as an
output rectifier.
BATTLO Circuitry
The SP6644 device has an internal comparator
for low-battery detection. If V
BATT
drops below
1V, BATTLO will sink current. BATTLO is an
open-drain output. The SP6645 operates in the
same manner with a threshold voltage of 2V.
Shutdown for the SP6644
A logic LOW at SHDN will drive the SP6644
into a shutdown mode where BATTLO goes
into a high-impedance state, the internal
switching MOSFET turns off, and the
synchronous rectifier turns off to prevent
reverse current from flowing from the output
back to the input. Designers should note that
in shutdown, the output can drift to one diode
drop below V
BATT
because there is still a forward
current path through the synchronous-rectifier
body diode from the input to the output.
To disable the shutdown feature, designers can
connect SHDN to V
BATT
.
Adjustable Output Voltage
Driving FB to ground (logic LOW) will drive the
output voltage to the fixed-voltage operation of
+3.3V + 4%. Connecting FB to a voltage divider
between V
OUT
and ground will select an adjustable
output voltage between +2V and +5.5V. Refer to
Figure 28. FB regulates to +1.25V.
Since the FB leakage current is 10nA maximum,
designers should select the feedback resistor
R2 in the 100k
to 1M range. R1 can be
determined with the following equation:
R1 = R2 x -1
V
OUT
V
REF
where R1 [
] and R2 [] are the feedback
resistors in Figure 29, V
OUT
[V] is the output
voltage, and V
REF
[V] is 1.25V.
Battery Reversal Protection
The SP6644/6645 devices will tolerate single-
cell battery reversal up to the package power-
dissipation limits noted in the
ABSOLUTE
MAXIMUM RATINGS
section. An internal
diode in series with an internal 5
resistor limits
any reverse current to less than 220mA
preventing damage to the devices. Prolonged
operation above 220mA reverse-battery
current can degrade performance of the devices.
The Inductor
The programmable peak inductor current feature
of the SP6644/6645 devices affords a great deal
of flexibility in choosing an inductor. The most
important point to consider when choosing an
inductor is to insure that the peak inductor current
is programmed below the saturation rating of the
inductor. If the inductor goes into saturation, the
internal switches and the inductor will be stressed
due to current peaking, potentially leading to
reliability problems with the application circuit.
The peak inductor current is programmed by
putting a resistor between the R
LIM
pin and ground.
The usable current range is between 150mA and
560mA. This is defined by:
where I
PEAK
[A] is the peak inductor current, and
R
LIM
[
] is the value of the resistor connected
from pin R
LIM
to ground.
I
PEAK
=
1400
R
LIM
11
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
With an external resistor tolerance of +1%, the
peak current tolerance will be +6%. To make
sure that the SP6644/6645 internal circuitry
adequately controls the inductor current, it is
recommended that values equal to or greater
than 22
H (+10%) be used.
The SP6644/6645 devices control algorithm
delivers an average maximum load current in
regulation as defined by:
where I
LOAD-MAX
[A] is the maximum load current,
E is the efficiency factor (generally between 0.8
and 0.9), I
PEAK
[A] is the programmed peak
inductor current, V
BATT
[V] is the input voltage to
the device, and V
OUT
[V] is the output voltage.
Given the minimum input voltage, output voltage,
and maximum average load current, the value of
I
PEAK
can be solved for and an appropriate inductor
can be chosen. It is good design practice to use
the lowest peak current possible to
reduce possible EMI and output ripple voltage.
A closed-core inductor, such as a toroid or
shielded bobbin, will minimize any fringe
magnetic fields or EMI.
Figure 28. Adjustable Output Voltage Circuitry
APPLICATION NOTES
Printed circuit board layout is a critical part of
design. Poor designs can result in excessive EMI
on the voltage gradients and feedback paths on
the ground planes with applications involving
high switching frequencies and large peak
currents. Excessive EMI can result in instability
or regulation errors.
All power components should be placed on the
PC board as closely as possible with the traces
kept short, direct, and wide (>50mils or 1.25mm).
Extra copper on the PC board should be integrated
into ground as a pseudo-ground plane. On a
multilayer PC board, route the star ground using
component-side copper fill, then connect it to the
internal ground plane using vias.
For the SP6644/6645 devices, the inductor and
input and output filter capacitors should
be soldered with their ground pins as close
together as possible in a star-ground
configuration. The V
OUT
pin must be bypassed
directly to ground as close to the SP6644/6645
devices as possible (within 0.2in or 5mm). The
DC-DC converter and any digital circuitry should
be placed on the opposite corner of the PC board
as far away from sensitive RF and analog input
stages. The external voltage-feedback network
should be placed very close to the FB pin as well
as the R
LIM
resistor (within 0.2in or 5mm). Any
GND
V
OUT
FB
LX
V
BATT
47
F
0.1
F
22
F
R
LIM
V
OUT
=
2V to 5.2V
SHDN
0.88V to
3.3V Input
SP6644
SP6645
100pF*
R1
R2
*optional compensation
22
H
0.7A
BATTLO
I
LOAD-MAX
=
E x I
PEAK
x V
BATT
2 x V
OUT
12
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
noisy traces, such as from the LX pin, should be
kept away from the voltage-feedback network
and separated from it using grounded copper to
minimize EMI.
Capacitor equivalent series resistance is a major
contributor to output ripple, usually greater than
60%. Low ESR capacitors are recommended.
Ceramic capacitors have the lowest ESR.
Low-ESR tantalum capacitors may be a more
acceptable solution having both a low ESR and
lower cost than ceramic capacitors. Designers
should select input and output capacitors with a
rating exceeding the peak inductor current. Do
not allow tantalum capacitors to exceed their
ripple-current ratings. A 22
F, 6V, low-ESR,
surface-mount tantalum output filter capacitor
typically provides 60mV output ripple when
stepping up from 1.3V to 3.3V at 20mA.
An input filter capacitor can reduce peak
currents drawn from the battery and improve
efficiency. Low-ESR aluminum electrolytic
capacitors are acceptable in some applications
but standard aluminum electrolytic capacitors
are not recommended.
Designers should add LC pi filters, linear
post-regulators, or shielding in applications
necessary to address excessive noise, voltage
ripple, or EMI concerns. The LC pi filter's cutoff
frequency should be at least a decade or two
below the DC-DC converters's switching
frequency for the specified load and input voltage.
A small SOT23-5pin 200mA Low Drop Out
linear regulator can be used at the SP6644/6645
output to reduce output noise and ripple. The
schematic in figure 29 illustrates this circuit with
the SP6644 3.3V output followed by the Sipex
SP6201 3.0V output Low Drop Out linear regu-
lator. Compare in Figure 21 the SP6644 ripple of
40-50mVpp with the SP6201 ripple of about
3mVpp and you can see the amount of noise
reduction obtained. Additional performance
characteristics for the SP6644/6201 combina-
tion can be seen in figures 17 to 20.
Table 1. Surface-Mount Inductor Information
Inductor Specification
Inductance
Manufacturer/Part No.
Resistance
Isat
(uH)
(ohms)
(mA)
Sumida CD43-220
0.38 (max)
680
22
Sumida CDRH5D18-220
0.28 (max)
760
Coilcraft DO1608C-223
0.32 (typ)
700
47
Sumida CD43-470
0.84 (max)
440
Coilcraft DO1608C-473
0.56 (typ)
500
100
Sumida CD54-101
0.7 (max)
520
Coilcraft DO1608C-104
1.1(typ)
310
13
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Figure 29. Schematic SP6644/6201 DC/DC LDO Combination
0.88V to 3.3V Input
V
BATT
GND
BATTLO
SHDN
C1
47
F
J1
1
2
3
R3
2.5k
Probe access points for external connection by the user
R2
100k
R1
Open
L1 22
H
+3.3V
V
OUT
C2
47
F
+3.0V
V
OUT
C3
1
F
SP6201
GND
SP6644
U1
V
BATT
R
LIM
BATTLO
SHDN
V
OUT
GND
LX
FB
R4 1M
LX
+
+
V
IN
GND
ENABLE
RESET_N
V
OUT
1
2
3
4
5
7
6
8
1
2
3
4
5
SCHEMATIC WITH LDO COMBINATION
14
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
0.07 - -
L1
L
R1
1
R
1
1
Seating Plane
1
E1
2
E/2
e1
E
D
Gauge Plane
L2
- - 1.10
0 - 0.15
Dimensions in (mm)
8-PIN MSOP
JEDEC MO-187
(AA) Variation
0.75 0.85 0.95
0.22 - 0.38
0.08 - 0.23
3.00 BSC
4.90 BSC
3.00 BSC
0.40 0.60 0.80
- 8 -
0.07 - -
0 8
A
A1
A2
b
c
D
E
E1
L
L1
L2
N
R
R1
0 - 15
1
MIN NOM MAX
e1
e
1.95 BSC
0.65 BSC
Pin #1 indentifier must be indicated within this shaded area (D/2 * E1/2)
e
0.25 BSC
0.95 REF
PACKAGE: 8-PIN MSOP
D
A2
A
A1
b
c
WITH PLATING
BASE METAL
(b)
PACKAGE: 8 PIN MSOP
15
Rev:B Date 4/13/04 SP6644/6645 High Efficiency Boost Regulator
Copyright 2004 Sipex Corporation
Model
Temperature Range
Package Type
SP6644EU ............................................. -40
O
C to +85
O
C ......................................... 8-Pin MSOP
SP6645EU ............................................. -40
O
C to +85
O
C ......................................... 8-Pin MSOP
Please consult the factory for pricing and availability on a Tape-On-Reel option.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described herein; neither does it convey any license under its patent rights nor the rights of others.
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: sales@sipex.com
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
ORDERING INFORMATION
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