ChipFind - документация

Электронный компонент: ST7920

Скачать:  PDF   ZIP
ST
Sitronix
ST7921
96CH Segment Driver For Dot Matrix LCD
Ver 1.5
1/10
2003-09-26
Features :
Display driving bias : static to 1/5
Power supply for logic : 2.7V ~ 5.5V
Power supply for LCD voltage (V
0
~V
SS
) : 3V ~ 7V
Dot matrix LCD driver with two 48 channel outputs
Bias voltage (V0 ~ V4)
Input/Output signals
Input : Serial display data and control pulse from controller IC
Output : 48 X 2 channels waveform for LCD driving



General Description :

ST7921 is a segment driver for dot matrix type LCD display. It features 96
channels with 48 X 2 bits bi-directional shift registers, data latches, LCD
drivers and logic control circuits. It is fabricated by high voltage CMOS
process with low current consumption.

The ST7921 can convert serial data received from an LCD controller, such as
ST7920, into parallel data and send out LCD driving waveforms to the LCD
panel. The ST7921 is designed for general purpose LCD drivers. It can drive
both static and dynamic drive LCD. The LSI can be used as segment driver.



ST7921
Ver 1.5
2/10
2003-09-26
ST7921 Functional Block


SEGMENT DRIVER
SEGMENT DRIVER
BIDIRECTIONAL
SHIFTER(48bits)
BIDIRECTIONAL
SHIFTER(48bits)
DATA LATCH(48bits)
DATA LATCH(48bits)
CONTOL
V1
V2
V3
V4
CL2
CL1
M
DL1 SHL1 DR1
DL2 SHL2 DR2
V
DD
V
SS
V
0
S1...............................S48
S49...............................S96
ST7921
Ver 1.5
3/10
2003-09-26
Pin Description :

Pin Name
Purpose
Description
I/O
VDD POWER
for
logic
N/A
VSS GROUND
for
logic
N/A
V0
V2
V3
LCD Power
for LCD driving voltage
I
S1-S48
segment
LCD driver output for part 1
O
SHL1
direction
direction control for part 1 segments
I
DL1, DR1
data in /out
If SHL1 = 1 then DL1=out, DR1=in
If SHL1 = 0 then DL1=in, DR1=out
I/O
S49-S96
segment
LCD driver output for part 2
O
SHL2
direction
direction control for part 2 segments
I
DL2, DR2
data in/out
If SHL2 = 1 then DL2=out, DR2=in
If SHL2 = 0 then DL2=in, DR2=out
I/O
M
alternation
Alternate the LCD driving waveform
I
CL1
latch clock
latch the data after shift is completed
I
CL2
shift clock
shift the data into the segments
I












ST7921
Ver 1.5
4/10
2003-09-26
Pad Arrangement

































* chip substrate must connect to VSS
5
6
7
8
2
3
4
9
1
0
1
1
1
2
1
3
1
4
1
5
2
9
3
0
3
1
3
2
3
3
3
4
3
5
3
6
3
7
3
8
1
11
0
10
9
10
8
10
7
10
6
10
5
10
4
10
3
10
2
10
1
10
0
9
9
9
8
9
7
9
6
95
9
0
8
9
8
8
8
7
9
3
9
2
9
1
8
6
8
5
8
4
8
3
8
2
8
1
8
0
6
6
6
5
6
4
6
3
6
2
6
1
6
0
5
9
5
8
5
7
9
4
3
9
4
0
4
1
4
2
4
3
4
4
4
5
4
6
4
7
4
8
4
9
5
0
5
1
5
2
5
3
5
4
5
5
5
6
(0
,0
)
Si
ze: 4
7
20x2
5
6
0
um
2
Co
ordi
n
a
te: c
e
nter
Mi
n. PAD
Pi
tch:
1
20um
G792E
"G792E" Marking: Easy to find the PAD
C
i
rc
l
e
here to
f
i
n
d
t
h
e first
PA
D
. . . . . . .
. . . . . . .
ST7921
Ver 1.5
5/10
2003-09-26
Bonding Description
Pad No. Pad Name
X
Y
Pad No. Pad Name
X
Y
1 S[50]
-2240
-1160 29 S[78] 1140
-1160
2 S[51]
-2110
-1160 30 S[79] 1260
-1160
3 S[52]
-1980
-1160 31 S[80] 1380
-1160
4 S[53]
-1860
-1160 32 S[81] 1500
-1160
5 S[54]
-1740
-1160 33 S[82] 1620
-1160
6 S[55]
-1620
-1160 34 S[83] 1740
-1160
7 S[56]
-1500
-1160 35 S[84] 1860
-1160
8 S[57]
-1380
-1160 36 S[85] 1980
-1160
9 S[58]
-1260
-1160 37 S[86] 2110
-1160
10 S[59] -1140
-1160 38 S[87] 2240
-1160
11 S[60] -1020
-1160 39 S[88] 2240
-1030
12 S[61] -900 -1160 40 S[89] 2240 -900
13 S[62] -780 -1160 41 S[90] 2240 -780
14 S[63] -660 -1160 42 S[91] 2240 -660
15 S[64] -540 -1160 43 S[92] 2240 -540
16 S[65] -420 -1160 44 S[93] 2240 -420
17 S[66] -300 -1160 45 S[94] 2240 -300
18 S[67] -180 -1160 46 S[95] 2240 -180
19 S[68] -60 -1160 47 S[96] 2240 -60
20 S[69] 60 -1160 48 S[48] 2240 60
21 S[70] 180 -1160 49 S[47] 2240 180
22 S[71] 300 -1160 50 S[46] 2240 300
23 S[72] 420 -1160 51 S[45] 2240 420
24 S[73] 540 -1160 52 S[44] 2240 540
25 S[74] 660 -1160 53 S[43] 2240 660
26 S[75] 780 -1160 54 S[42] 2240 780
27 S[76] 900 -1160 55 S[41] 2240 900
28 S[77] 1020
-1160 56 S[40] 2240 1030