SL4052B
System Logic
Semiconductor
SLS
Analog Multiplexer Demultiplexer
High-Performance Silicon-Gate CMOS
The SL4052B analog multiplexer/demultiplexer is digitally controlled
analog switches having low ON impedance and very low OFF leakage
current. Control of analog signals up to 20V peak-to-peak can be
achieved by digital signal amplitudes of 4.5 to 20V (if V
CC
- GND = 3V, a
V
CC
- V
EE
of up to 13 V can be controlled; for V
CC
- V
EE
level differences
above 13V a V
CC
- GND of at least 4.5V is required).
These multiplexer circuits dissipate extremely low quiescent power
over the full V
CC
-GND and V
CC
- V
EE
supply-voltage ranges,
independent of the logic state of the control signals. When a logic
"1"is present at the ENABLE input terminal all channels are off.
The SL4052 is a differential 4-channel multiplexer having two binary
control inputs. A and B, and an enable input. The two binary input
signals select 1 of 4 pairs of channels to turned on and connect the
analog inputs to the outputs.
Operating Voltage Range: 3.0 to 18 V
Maximum input current of 1
A at 18 V over full package-temperature range; 100 nA at 18 V and
25
C
Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
ORDERING INFORMATION
SL4052BN Plastic
SL4052BD SOIC
T
A
= -55
to 125
C for all packages
PIN ASSIGNMENT
FUNCTION TABLE
Control Inputs
ON
Enable
Select
Channels
B
A
L
L
L
Y0
X0
L
L
H
Y1
X1
L
H
L
Y2
X2
L
H
H
Y3
X3
H
X
X
None
X = don't care
LOGIC DIAGRAM
Double-Pole, 4-Position
Plus Common Off
PIN 16 =V
CC
PIN 7 = V
EE
PIN 8 = GND
SL4052B
System Logic
Semiconductor
SLS
MAXIMUM RATINGS
*
Symbol
Parameter
Value
Unit
V
CC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
V
IN
DC Input Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
V
OUT
DC Output Voltage (Referenced to GND)
-0.5 to V
CC
+0.5
V
I
IN
DC Input Current, per Pin
10
mA
P
D
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
mW
P
D
Power Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
260
C
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/
C from 65
to 125
C
SOIC Package: : - 7 mW/
C from 65
to 125
C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min
Max
Unit
V
CC
DC Supply Voltage (Referenced to GND)
3.0
18
V
V
IN
, V
OUT
DC Input Voltage, Output Voltage (Referenced to GND)
0
V
CC
V
T
A
Operating Temperature, All Package Types
-55
+125
C
I
Multiplexer Switch Input Current Capability
*
-
25
mA
R
OH
Output Load Resistance
100
-
*
In certain applications, the external load-resistor current may include both V
CC
and signal-line components.
This device contains protection circuitry to guard against damage due to high static voltages or electric
fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated
voltages to this high-impedance circuit. For proper operation, V
IN
and V
OUT
should be constrained to the range
GND
(V
IN
or V
OUT
)
V
CC
.
Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or V
CC
). Unused
Analog I/O pins may be left open or terminated.
SL4052B
System Logic
Semiconductor
SLS
DC ELECTRICAL CHARACTERISTICS
Digital Section
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
-55
C
25
C
125
C
Unit
V
IH
Minimum High-Level
Input Voltage, Channel-
Select or Enable Inputs
V
IS
=V
CC
thru 1k
V
EE
=GND
I
IS
<2
A on all OFF Chanels
R
L
=1k
to GND
5
10
15
3.5
7
11
3.5
7
11
3.5
7
12
V
V
IL
Maximum Low -Level
Input Voltage, Channel-
Select or Enable Inputs
V
IS
=V
CC
thru 1k
V
EE
=GND
I
IS
<2
A on all OFF Chanels
R
L
=1k
to GND
5
10
15
1.5
3
4
1.5
3
4
1.4
3
4
V
I
IN
Maximum Input
Leakage Current,
Channel-Select or
Enable Inputs
V
IN
=V
CC
or GND
18
0.1
0.1
1.0
A
I
CC
Maximum Quiescent
Supply Current (per
Package)
Channel Select = V
CC
or GND
5
10
15
20
5
10
20
100
5
10
20
100
150
300
600
3000
A
DC ELECTRICAL CHARACTERISTICS
Analog Section
V
CC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
-55
C
25
C
125
C
Unit
R
ON
Maximum "ON" Resistance
V
EE
=GND=0
V
IS
= GND to V
CC
5
10
15
800
310
200
1050
400
240
1300
550
320
R
ON
Maximum Difference in
"ON" Resistance Between
Any Two Channels in the
Same Package
V
EE
=GND=0
5
10
15
-
-
-
10
15
5
-
-
-
I
OFF
Maximum Off- Channel
Leakage Current, Any One
Channel
V
EE
=GND=0
18
100
100
1000
nA
Maximum Off- Channel
Leakage Current, Common
Channel
V
EE
=GND=0
18
100
100
1000
SL4052B
System Logic
Semiconductor
SLS
AC ELECTRICAL CHARACTERISTICS
(C
L
=50pF,Input t
r
=t
f
=20.0 ns)
V
CC
Guaranteed Limit
Symbol
Parameter
V
-55
C
25
C
125
C
Unit
t
PLH
, t
PHL
Maximum Propagation Delay , Analog Input to
Analog Output (Figure 1)
R
L
=200k
5
10
15
60
30
20
60
30
20
120
60
40
ns
t
PLZ
, t
PHZ
Maximum Propagation Delay , Address to Analog
Output (Figure 2) R
L
=10k
V
EE
=GND=0
5
10
15
720
320
240
720
320
240
1440
640
480
ns
V
EE
=-5V
5
450
450
900
t
PLZ
,
t
PZL
Maximum Propagation Delay, Enable to Analog
Output (Figure 2) R
L
=10k
V
EE
=GND=0
5
10
15
720
320
240
720
320
240
1440
640
480
ns
V
EE
=-10V
5
400
400
800
t
PHZ
,
t
PZH
Maximum Propagation Delay, Enable to Analog
Output (Figure 2) R
L
=10k
V
EE
=GND=0
5
10
15
450
210
160
450
210
160
900
420
320
ns
V
EE
=-10V
5
300
300
600
C
IN
Maximum Input Capacitance, Channel-Select or
Enable Inputs
-
7.5
7.5
7.5
pF
C
I/O
Maximum Capacitance
V
EE
=GND=-5V
C
IS
5
-
5
-
pF
C
OS
5
-
18
-
Feedthrough C
IOS
5
-
0.2
-
SL4052B
System Logic
Semiconductor
SLS
ADDITIONAL APPLICATION CHARACTERISTICS
V
CC
V
IS
Limit
*
Symbol
Parameter
Test Conditions
V
V
25
C Unit
BW
Maximum On-
Channel
Bandwidth or
Minimum
Frequency
Response (-3db)
V
EE
=GND
R
L
=1k
20 log(V
OS
/V
IS
)=-3db
V
OS
at Common OUT/IN
10
5
*
25
MHz
V
OS
at Any Channel
10
5
*
60
(-40db)
Feedthrough
Frequency (All
Channels OFF)
V
EE
=GND
R
L
=1k
20 log(V
OS
/V
IS
)=-40db
V
OS
at Common OUT/IN
10
5
*
10
V
OS
at Any Channel
10
5
*
8
(-40db)
Signal Crosstalk
Frequency
V
EE
=GND
R
L
=1k
20 log(V
OS
/V
IS
)=-40db
Between Sections :
Measured on Common
Measured on Any Chanel
6
10
THD
Total Harmonic
Distortion
V
EE
=GND
f
IS
=1kHz sine wave
5
10
15
2*
3*
5*
0.3
0.2
012
%
-
Address-or
Enable to Signal
Crosstalk
V
EE
=GND
R
L
=10k
**
t
r
,t
f
=20ns
Square Wave
10
-
65
mv
(peak)
* Peak-to-peak voltage symmetrical about (V
DD
-V
EE
)/2
** Both ends of channel
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