LPC47B34x
128 Pin Enhanced Super I/O with LPC Interface
for Consumer Applications
FEATURES
3.3 Volt Operation (5V Tolerant)
LPC Interface
Floppy Disk Controller (Supports 2 FDCs)
Multi-Mode Parallel Port
Two Full UARTs
8042 Keyboard Controller (Internal Latch on
IRQ1 and IRQ12)
Programmable Wakeup Event Interface
(nIO_PME Pin)
SMI Pin
GPIOs (62)
ISA IRQ to Serial IRQ Conversion (11 Pins)
WDT
Security Register
ACPI Support Register for Monitoring
System Sleep State and SMI Generation
Intrusion Detection
LED Control
Low Battery Warning
Battery Backup of Certain Wakeup Events
XNOR Chain
PC99 and ACPI 1.0 Compliant
ISA Plug-and-Play Compatible Register Set
Intelligent Auto Power Management
2.88MB Super I/O Floppy Disk Controller
-
Licensed CMOS 765B Floppy Disk
Controller
-
Software and Register Compatible with
SMSC's Proprietary 82077AA
Compatible Core
-
Configurable Open Drain/Push-Pull
Output Drivers
-
Supports Vertical Recording Format
-
16-Byte Data FIFO
-
100% IBM
Compatibility
-
Detects All Overrun and Underrun
Conditions
-
Sophisticated Power Control Circuitry
(PCC) Including Multiple Powerdown
Modes for Reduced Power
Consumption
-
DMA Enable Logic
-
Data Rate and Drive Control Registers
-
480 Address, up to 15 IRQ and 3 DMA
Options
Enhanced Digital Data Separator
-
2 Mbps, 1 Mbps, 500 Kbps, 300 Kbps,
250 Kbps Data Rates
-
Programmable Precompensation
Modes
Keyboard Controller
-
8042 Software Compatible
-
8-Bit Microcomputer
-
2k Bytes of Program ROM
-
256 Bytes of Data RAM
-
Four Open Drain Outputs Dedicated for
Keyboard/Mouse Interface
-
Asynchronous Access to Two Data
Registers and One Status Register
-
Supports Interrupt and Polling Access
-
8-Bit Counter Timer
-
Port 92 Support
2
-
Fast Gate A20 and KRESET Outputs
Serial Ports
-
Two Full Function Serial Ports
-
High Speed NS16C550 Compatible
UARTs with Send/Receive 16-Byte
FIFOs
-
Supports 230k and 460k Baud
-
Programmable Baud Rate Generator
-
Modem Control Circuitry
-
480 Address and 15 IRQ Options
-
IrDA 1.0, HP-SIR, ASK IR Support
Multi-Mode Parallel Port with ChiProtectTM
-
Standard Mode IBM PC/XT, PC/AT,
and PS/2TM Compatible Bidirectional
Parallel Port
-
Enhanced Parallel Port (EPP)
Compatible - EPP 1.7 and EPP 1.9
(IEEE 1284 Compliant)
-
IEEE 1284 Compliant Enhanced
Capabilities Port (ECP)
-
ChiProtect Circuitry for Protection
Against Damage Due to Printer Power-
On
-
480 Address, up to 15 IRQ and 3 DMA
Options
LPC Bus (Pin Reduced ISA) Host Interface
-
Multiplexed Command, Address and
Data Bus
-
8-Bit I/O Transfers
-
8-Bit DMA Transfers
-
16-Bit Address Qualification
-
Serial IRQ Interface Compatible with
Serialized IRQ Support for PCI
Systems
-
Power Management Event (nIO_PME)
Interface Pin
128 Pin QFP Package
GENERAL DESCRIPTION
The LPC47B34x* is a 3.3V PC99 compliant
Super I/O controller. The LPC47B34x
implements the LPC interface, a pin reduced
ISA interface which provides the same or better
performance as the ISA/X-bus with a substantial
savings in pins used. The part provides 62
GPIO pins and ISA IRQ to serial IRQ
conversion.
The LPC47B34x incorporates a keyboard
interface, SMSC's true CMOS 765B floppy disk
controller, advanced digital data separator, two
16C550 compatible UARTs, one Multi-Mode
parallel port which includes ChiProtect circuitry
plus EPP and ECP, and Intelligent Power
Management. The true CMOS 765B core
provides 100% compatibility with IBM PC/XT
and PC/AT architectures in addition to providing
data overflow and underflow protection. The
SMSC advanced digital data separator
incorporates SMSC's patented data separator
technology, allowing for ease of testing and use.
The on-chip UARTs are compatible with the
NS16C550. The parallel port is compatible with
IBM PC/AT architecture, as well as IEEE 1284
EPP and ECP. The LPC47B34x incorporates
sophisticated power control circuitry (PCC). The
PCC supports multiple low power down modes.
The LPC47B34x supports the ISA Plug-and-Play
Standard (Version 1.0a) and provides the
recommended functionality to support Windows
'95/`98 and PC99. The I/O Address, DMA
Channel and Hardware IRQ of each logical
device in the LPC47B34x may be
reprogrammed through the internal
configuration registers. There are 480 I/O
address location options, a Serialized IRQ
interface, and three DMA channels.
Standard Microsystems is a registered trademark and
SMSC is a trademark of Standard Microsystems
Corporation. Other product and company names are
trademarks or registered trademarks of their respective
holders.
*The "x" in the part number is a designator that changes depending upon the particular BIOS used
inside the specific chip.
3
TABLE OF CONTENTS
FEATURES ....................................................................................................................................... 1
GENERAL DESCRIPTION ................................................................................................................ 2
PIN CONFIGURATION...................................................................................................................... 6
DESCRIPTION OF PIN FUNCTIONS ................................................................................................ 7
Buffer Type Descriptions .............................................................................................................. 11
3.3 Volt Operation /5 Volt Tolerance ............................................................................................. 12
Pins That Require External Pullup Resistors ................................................................................. 13
POWER FUNCTIONALITY .............................................................................................................. 14
VCC Power .................................................................................................................................. 14
VTR Support ................................................................................................................................ 14
VBAT Power ................................................................................................................................ 14
Internal PWRGOOD..................................................................................................................... 14
32.768 kHz Trickle Clock Input ..................................................................................................... 14
Indication of 32kHz Clock ............................................................................................................. 15
Internal Ring Oscillator................................................................................................................. 15
Trickle Power Functionality........................................................................................................... 17
Battery Power Functionality .......................................................................................................... 19
Maximum Current Values ............................................................................................................. 19
Power Management Events (PME/SCI) ........................................................................................ 19
FUNCTIONAL DESCRIPTION......................................................................................................... 20
Super I/O Registers...................................................................................................................... 20
Host Processor Interface (LPC) .................................................................................................... 20
LPC Interface ............................................................................................................................... 20
FLOPPY DISK CONTROLLER........................................................................................................ 25
FDC Internal Registers ................................................................................................................. 25
Status Register Encoding ............................................................................................................. 39
DMA Transfers ............................................................................................................................. 43
Controller Phases......................................................................................................................... 43
Command Set/Descriptions.......................................................................................................... 45
Instruction Set.............................................................................................................................. 48
Data Transfer Commands ............................................................................................................ 60
Control Commands ...................................................................................................................... 67
Direct Support for Two Floppy Drives ........................................................................................... 74
SERIAL PORT (UART).................................................................................................................... 76
Register Description ..................................................................................................................... 76
Programmable Baud Rate Generator (AND Divisor Latches DLH, DLL) ........................................ 85
Effect Of The Reset on Register File............................................................................................. 85
FIFO Interrupt Mode Operation..................................................................................................... 85
FIFO Polled Mode Operation ........................................................................................................ 86
Notes On Serial Port Operation .................................................................................................... 90
Ring Wake Filter .......................................................................................................................... 91
INFRARED INTERFACE ................................................................................................................. 92
IR Transmit Pins .......................................................................................................................... 93
PARALLEL PORT........................................................................................................................... 93
IBM XT/AT Compatible, Bi-Directional And EPP Modes ............................................................... 95
EPP 1.9 Operation ....................................................................................................................... 97
EPP 1.7 Operation ....................................................................................................................... 99
Extended Capabilities Parallel Port ..............................................................................................101
4
Vocabulary..................................................................................................................................101
ECP Implementation Standard ....................................................................................................102
Parallel Port Floppy Disk Controller .............................................................................................114
POWER MANAGEMENT ...............................................................................................................116
FDC Power Management ............................................................................................................116
DSR From Powerdown................................................................................................................116
Wake Up From Auto Powerdown.................................................................................................116
Register Behavior........................................................................................................................117
Pin Behavior ...............................................................................................................................117
UART Power Management ..........................................................................................................119
Exit Auto Powerdown ..................................................................................................................119
Parallel Port ................................................................................................................................119
SERIAL IRQ...................................................................................................................................120
ISA IRQ To Serial IRQ Conversion Capability..............................................................................123
8042 KEYBOARD CONTROLLER DESCRIPTION .........................................................................124
Keyboard Interface ......................................................................................................................125
External Keyboard and Mouse Interface.......................................................................................126
Keyboard Power Management.....................................................................................................126
Interrupts ....................................................................................................................................127
Memory Configurations ...............................................................................................................127
Register Definitions .....................................................................................................................127
External Clock Signal ..................................................................................................................128
Default Reset Conditions .............................................................................................................128
Latches On Keyboard and Mouse IRQs .......................................................................................131
Keyboard and Mouse PME Generation ........................................................................................132
GENERAL PURPOSE I/O ..............................................................................................................134
GPIO Pins...................................................................................................................................134
Description..................................................................................................................................136
GPIO Control ..............................................................................................................................138
GPIO Operation ..........................................................................................................................139
GPIO PME and SMI Functionality................................................................................................140
Either Edge Triggered Interrupts..................................................................................................142
Watch Dog Timer........................................................................................................................143
SYSTEM MANAGEMENT INTERRUPT (SMI) ................................................................................144
SMI Registers .............................................................................................................................144
Low Battery Warning SMI Event ..................................................................................................145
ACPI Support Register for SMI Generation ..................................................................................145
PME SUPPORT .............................................................................................................................146
Low Battery Warning PME Event.................................................................................................147
`Wake On Specific Key' Option....................................................................................................148
SECURITY FEATURE ....................................................................................................................149
GPIO Device Disable Register Control.........................................................................................149
Device Disable Register ..............................................................................................................149
INTRUDER DETECTION ................................................................................................................150
Intrusion Bit.................................................................................................................................150
PME and SMI Generation............................................................................................................150
LED BLINK AND COLOR CONTROL ............................................................................................151
RUNTIME REGISTERS ..................................................................................................................152
Runtime Registers Block Summary .............................................................................................152
5
GPIO Registers Block Summary .................................................................................................156
Registers Powered by VBAT........................................................................................................157
Runtime Registers Block Description ...........................................................................................157
GPIO Registers Block Description ...............................................................................................194
CONFIGURATION .........................................................................................................................200
OPERATIONAL DESCRIPTION .....................................................................................................222
Maximum Guaranteed Ratings ....................................................................................................222
DC Electrical Characteristics .......................................................................................................222
TIMING DIAGRAMS ......................................................................................................................226
ECP Parallel Port Timing.............................................................................................................237
PACKAGE OUTLINE .....................................................................................................................245
APPENDIX - TEST MODES ...........................................................................................................246
Board Test Mode.........................................................................................................................246
80 Arkay Drive
Hauppauge, NY 11788
(516) 435-6000
FAX (516) 273-3123
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