Single Chip Processing for CCD Monochrome Camera
Description
The CXA1310AQ is designed to perform the basic
signal processing in CCD monochrome cameras with
a single chip. This bipolar lC is most suitable for
compact usage and low power consumption.
Features
Processing from CCD output to 75
video output
with a single chip
Wide variable AGC (4 to 32dB Typ.)
Built-in operational amplifier for AGC loop
75
line capacitance minimized using sag compen-
sation function
Variable white clip level realize wide dynamic range
(140 IRE)
Application
CCD monochrome camera
Block Diagram and Pin Configuration
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings (Ta = 25C)
Supply voltage
V
CC
7
V
Storage temperature
Tstg 65 to +150 C
Operating temperature
Topr
20 to +75 C
Allowable power dissipation
P
D
500
mW
Operating Conditions
Supply voltage
V
CC
4.75 to 5.25 V
1
E89Z21A78-PS
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
CXA1310AQ
32 pin QFP (Plastic)
CLP2
S/H
S/H
S/H
S/H
S/H
CLP2
CLP1
BLK
CLP1
BLK
CLP1
WC
AGC
SETUP
BLK
SYNC
DRIVE
2
1
OP IN
OP IN+
DET OUT
V
CC
2
VIDEO
SAG
GND2
PG
DATA
GND3
IRIS
V
CC
1
GND1
IRIS CLP
LINEAR
OUT
DRIVER IN
WC CONT
SET CONT
SYNC
CLP1
BLK
CLP2
SHP
HSD2
AGC MAX
AGC OUT
CLP
OP OUT
HSD1
AGC CONT
IN
10
11
12
14 16
17
20
21
24
25
3
15
22
23
26
27
4
5
6
7
8
9
28
29
30
13
18
19
31
32
2
1
SAG
GND2
GND1
SYNC
SET CONT
WC CONT
DRIVER IN
OUT
SHP
PG
DATA
SHD1
SHD2
OP IN+
OP IN
OP OUT
AGC CONT
V
CC
1
AGC MAX
DET OUT
AGC OUT
IN
CLP
LINEAR
CLP2
GND3
IRIS
IRIS CLP
BLK
CLP1
V
CC
2
VIDEO
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
31
32
25
26
27
28
29
30
1
2
CXA1310AQ
Pin Description
No.
Symbol
I/O signal
1
SAG
Inputs VIDEO OUT
through capacitor
Equivalent circuit
Description
Input pin of sag compensation
signal
400A
10k
6k
150
1
150
6
WC CONT
GND
2 to 3.5V
White clip level adjusting pin
Preset mode
Control mode
150
40A
6
4
SYNC
High: 4.5V and above
Low: 0.5V and below
T:
5s
Sync pulse input pin
(active at Low)
20A
150
4
2
3
GND2
GND1
GND
GND
GND for driver and IRIS
GND for other than driver,
sample hold and IRIS
5
SET CONT
GND
2 to 3.5V
V
CC
Set-up level adjusting pin
Turns to preset mode 1
Control mode
Turns to preset mode 2
40A
150
5
T
External applied voltage
3
CXA1310AQ
No.
Symbol
I/O signal
7
DRIVER IN
Input
OUT through
capacitor or LINEAR
Equivalent circuit
Description
Input pin to driver
40A
7
10
CLP
Capacitor connecting pin for
gamma input clamp
150
150
10
11
IN
Input pin of the gamma
correction circuit
80A
160A
150
11
8
OUT
DC 2V
Gamma correction signal
output pin.
Outputs
1 when Pin 9 is at
OPEN
Outputs
2 when Pin 9 is
turnedto 5V
480A
8
External applied voltage
Input DC permissible
range
DC2 to 3V
9
LINEAR
DC 1.8V
Linear signal (
-OFF signal)
output pin
Pin 8 output signal turns to
2
output
15A
150
480A
9
V
CC
4
CXA1310AQ
No.
Symbol
I/O signal
12
AGC OUT
Equivalent circuit
Description
Output pin of signal passed
through AGC
700A
12
15
V
CC
1
5V
Power supply for other than
driver and IRIS
16
AGC
CONT
Gain control pin of AGC
amplifier
16
120A
150
13
DET OUT
Output pin of AGC detection
signal
320A
13
External applied voltage
14
AGC MAX
Maximum gain setting pin of
AGC amplifier
20A
150
14
Vp-p MAX 1300mV
Vp-p TYP
500mV
DC
2.55V
MAX
1500mV
TYP
500mV
DC
2V
DC
DC
17
OP OUT
Output pin of the operational
amplifier
320A
17
5
CXA1310AQ
No.
Symbol
I/O signal
18
OP IN
Equivalent circuit
Description
Inverted input pin of the
operational amplifier
18
20A
150
21
SHD1
Input pin of the sample / hold
pulse
(active at High)
21
100A
150
19
OP IN+
Non inverted input pin of the
operational amplifier
(AGC detection signal input
pin)
19
20A
150
External applied voltage
20
SHD2
Input pin of the sample / hold
pulse
(active at High)
20
100A
150
High: 4.5V and above
Low: 0.5V and below
T:
15ns and above
T
T
[
1
]
[
2
]
22
DATA
CCD signal input pin
150A
22
[
1
] MAX 800mV
[
2
] MAX 800mV
High: 4.5V and above
Low: 0.5V and below
T:
15ns and above
6
CXA1310AQ
No.
Symbol
I/O signal
23
PG
Equivalent circuit
Description
CCD single input pin
150A
23
27
IRIS
Output pin of the IRIS control
signal
320A
27
24
SHP
Input pin of the sample / hold
pulse
(active at High)
24
100A
150
External applied voltage
25
CLP2
CLP2 pulse input pin
(active at High)
50A
150
25
High: 4.5V and above
Low: 0.5V and below
T:
15ns
T
T
[
1
]
[
2
]
28
IRIS CLP
Capacitor connecting pin for
IRIS output clamp
150
150
28
[
1
] MAX 800mV
[
2
] MAX 800mV
High: 4.5V and above
Low: 0.5V and below
T:
2s
26
GND3
GND
Sample / hold GND
DC 1.3V
DC 1 3V
7
CXA1310AQ
No.
Symbol
I/O signal
Equivalent circuit
Description
32
VIDEO
VIDEO signal output pin
32
29
BLK
BLK pulse input pin
(active at Low)
29
40A
150
External applied voltage
30
CLP1
CLP1 pulse input pin
(active at High)
30
50A
150
High: 4.5V and above
Low: 0.5V and below
T:
11s
T
T
High: 4.5V and above
Low: 0.5V and below
T:
2s
31
V
CC
2
5V
Driver and IRIS power supply
BLK level 1.5V
8
CXA1310AQ
Electrical Characteristics
(Ta = 25C, V
CC
= 5V, See Electrical Characteristics Test Circuit)
No.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
Item
Current consumption
Min. value of AGC
MAX
Min. value of AGC
CONT
Max. value of AGC
CONT
AGC CONT 10dB
AGC OUT DC
1 output level
2 output level
LlNEAR AMP GAlN
DET OUT DC
IRlS AMP GAlN
IRIS OUT DC
DRlVER GAlN
SYNC level
SETUP 1
SETUP 2
Min. value of SET
CONT
Max. value of SET
CONT
W-CLIP level
Min. value of WC
CONT
Max. value of WC
CONT
OP AMP output
D range Low level
OP AMP output
D range High level
Symbol
lcc
MAX
AG1
AG2
AG3
ADC
1
2
LG
DDC
lG
lDC
DG
SY
SE1
SE2
SE3
SE4
WC1
WC2
WC3
OPL
OPH
Conditions
Min.
Current value of V
CC
1 and V
CC
2
AGC CONT = 1.5V
GAIN between DATA input and AGC OUT
DATA input = 100mV
AGC MAX = 4V, AGC CONT = 1.5V
GAIN between DATA input and AGC OUT
DATA input = 500mV, AGC CONT = 5V
GAIN between DATA input and AGC OUT
DATA input = 30mV, AGC CONT = 1.5V
GAIN between DATA input and AGC OUT
DATA input = 320mV, AGC CONT = 3.55V
DC output level of AGC OUT
Test value of
1 output level
IN input = 500mV
Test value of
2 output level
IN input = 500mV, S9 ON
GAIN between
IN input and LINEAR
IN input = 500mV
DC output level of DET OUT
GAIN between DATA input and lRlS
DATA input = 300mV
DC output level of IRIS
GAIN between DRlVER lN and VlDEO
DRlVER IN = 700mV
SYNC level/DG
of VIDEO output
SETUP level of preset mode 1
SETUP level/DG
of VIDEO output
SETUP level of preset mode 2
SETUP level/DG
of VIDEO output
SETUP level/DG
of VIDEO output
SET CONT = 2V
SETUP level/DG
of VIDEO output
SET CONT = 3.3V
W-CLlP level /DG
of VlDEO output
DRlVER IN = 1500mV, WC CONT = GND
W-CLlP level /DG
of VlDEO output
DRlVER IN = 1500mV, WC CONT = 2.2V
W-CLlP level /DG
of VlDEO output
DRlVER IN = 1500mV, WC CONT = 3.3V
DC output level of OP OUT
OP IN+ = 2.5V, OP lN = 4V
DC output level of OP OUT
OP IN+ = 4V, OP lN = 2.5V
30
--
--
30
8
2.25
530
580
1.6
1.8
8
1.1
5.7
270
15
0
--
80
780
--
1000
--
4.5
Typ.
45
18
4
32
10
2.55
630
680
2.6
2.0
10
1.3
6.0
293
0
20
3
130
820
300
1300
0.8
4.8
Max.
60
20
6
--
12
2.85
730
780
3.6
2.2
12
1.5
6.3
316
15
40
15
--
860
600
--
1.2
--
Unit
mA
dB
dB
dB
dB
V
mV
mV
dB
V
dB
V
dB
mV
mV
mV
mV
mV
mV
mV
mV
V
V
Characteristics value at DRlVER GAlN item
9
CXA1310AQ
Electrical Characteristics Test Circuit
5V
0.1
0.1
5V
5V
0.01
5V
S9
SAG
GND2
GND1
SYNC
SET CONT
WC CONT
DRIVER IN
OUT
SHP
PG
DATA
SHD1
SHD2
OP IN+
OP IN
OP
OUT
AGC CONT
V
CC
1
AGC MAX
DET OUT
AGC OUT
IN
CLP
LINEAR
CLP2
GND3
IRIS
IRIS CLP
BLK
CLP1
V
CC
2
VIDEO
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
22
23
24
1
31
32
25
26
27
28
29
30
20
21
(0V) (0V)
5V
0.01
0.01
(0V)
(5V)
V
V
V
V
A
V
V
V
A
Notes)
1. F is the capacitance unit of the capacitor.
2. For Pins 5, 6, 14 and 16, apply voltage in brackets unless otherwise specified in the conditions column of
the Electrical Characteristics.
3. V indicates a test pin. (Test AC, DC voltage)
4. For Pins 7, 11 and 22, the input signal level is at 0mV, unless otherwise specified in the conditions column
of the Electrical Characteristics.
10
CXA1310AQ
Test Circuit I/O Waveform Diagram
Input level
Input waveform
Input level
Input level
2.4V
2.5V
2.7V
5V
0V
5s
15s
50s
5V
0V
5V
0V
2s
2s
Input pin
Output waveform
Output pin
Test
Test
Test
Test
Test
Test
SYNC level
22. DATA
11.
IN
4. SYNC
29. BLK
30. CLP1
25. CLP2
7. DRIVER IN
12. AGC OUT
8.
1, 2 OUT
9. LINEAR
13. DET OUT
27. IRIS
32. VIDEO
5V
0V
11
CXA1310AQ
Application Circuit
5V
5V
0.01
47p
47p
0.01
10F
10F
100F
75
75
OUT
0.1
47P
2200
SG
2200
47p
TG
IRIS
DET
IRIS
CONT
2200
2200
2.2F
2.2F
5V
0.01
10F
0.01
36k
14k
5V
LPF
1F
0.01
1M
10k
2700
2k
5V
1
1k
1k
100k
10k
22F
100
2
1
CCD
SAG
GND2
GND1
SYNC
SET CONT
WC CONT
DRIVER IN
OUT
SHP
PG
DATA
SHD1
SHD2
OP IN+
OP IN
OP
OUT
AGC CONT
V
CC
1
AGC MAX
DET OUT
AGC OUT
IN
CLP
LINEAR
CLP2
GND3
IRIS
IRIS CLP
BLK
CLP1
V
CC
2
VIDEO
31
32
25
26
27
28
29
30
17
18
19
22
23
24
20
21
2
3
4
5
6
1
7
8
9
10
13
14
15
16
11
12
1
Use a high F
T
transistor. (2SC3355)
2
Use a FET similar to 2SK152 or 2SK300.
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
12
CXA1310AQ
Example of Representative Characteristics (Vcc = 5V, Ta = 25C)
40
30
20
10
0
0
1
2
3
4
5
AGC CONT [V]
GAIN [dB]
AGC control characteristics
40
30
20
10
0
0
1
2
3
4
5
AGC MAX [V]
GAIN [dB]
AGC MAX control characteristics
50
0
0
1
2
3
4
5
SET CONT [V]
Setup level [mV]
Setup control characteristics
100
Preset
Preset
1000
800
600
400
0
1
2
3
4
5
WC CONT [V]
White clip level [mV]
White clip control characteristics
Preset
1000
500
0
500
1000
IN input level [mV]
1 output level [mV]
1 I/O characteristics
1000
500
0
500
1000
IN input level [mV]
2 output level [mV]
2 I/O characteristics
13
CXA1310AQ
Package Outline
Unit: mm
SONY CODE
EIAJ CODE
JEDEC CODE
PACKAGE MATERIAL
LEAD TREATMENT
LEAD MATERIAL
PACKAGE MASS
EPOXY RESIN
SOLDER PLATING
42 ALLOY
32PIN QFP (PLASTIC)
9.0 0.2
7.0 0.1
1.5 0.15
(8.0)
0.1 0.1
+ 0.2
+ 0.35
+ 0.3
0.50
0.127 0.05
+ 0.1
0 to 10
0.8
0.3 0.1
+ 0.15
1
8
9
32
16
17
24
25
M
0.24
0.2g
QFP-32P-L01
QFP032-P-0707
0.1
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