CXP83408/83412/83416
CXP83409/83413/83417

E93Z15C72-PS

CMOS 8-bit Single Chip Microcomputer

Description

The CXP83408/83412/83416 and CXP83409/83413/

83417 are a CMOS 8-bit microcomputer which consists of

A/D converter, serial interface, timer/counter, time

base timer, 32kHz timer/counter, LCD controller/

driver, remote control receiving circuit and PWM

output, as well as basic configurations like 8-bit CPU,

ROM, RAM and I/O port. They are integrated into a

single chip.

Also CXP83408/83412/83416 and CXP83409/83413/

83417 sleep/ stop function which enables to lower power

consumption.

Features

· A wide instruction set (213 instructions) which

covers various types of data

16-bit arithmetic/multiplication and division/

Boolean bit operation instructions

· Minimum instruction cycle

400ns at 10MHz operation (4.5 to 5.5V)

122µs at 32kHz operation (2.7 to 5.5V)

· Incorporated ROM capacity

8K bytes (CXP83408, 83409)

12K bytes (CXP83412, 83413)

16K bytes (CXP83416, 83417)

· Incorporated RAM capacity

448 bytes (LCD display data area included)

· Peripheral functions

A/D converter

8 bits, 8 channels, successive approximation system

(Conversion time: 32µs/10MHz)

Serial interface

Incorporated 8-bit and 8-stage FIFO

(1 to 8 bytes auto transfer), 1 circuit 2 channels

Timer

8-bit timer, 8-bit timer/counter, 19-bit time base timer, 32kHz timer/counter

LCD controller/driver

Maximum 128 segments display possible (During 1/4 duty)

4 common outputs, 32 segment outputs

Display method: Static, 1/2, 1/3 and 1/4 duty

Bias method: 1/2 and 1/3 bias

Remote control receiving circuit

8-bit pulse measurement counter, 6-stage FIFO

PWM output

14 bits 1 channel, 8 bits 1 channel

· Interruption

12 factors, 12 vectors, multi-interruption possible

· Standby mode

SLEEP/STOP

· Package

80-pin plastic QFP/LQFP

· Piggyback/evaluator

CXP83400 (CXP83408, 83412, 83416)

CXP83401 (CXP83409, 83413, 83417)

Structure

Silicon gate CMOS IC

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

CXP83408/83412/83416

80 pin QFP (Plastic) 80 pin LQFP (Plastic)

CXP83409/83413/83417

80 pin QFP (Plastic)

CXP83408/83412/83416, CXP83409/83413/83417

XTAL

A/D CONVERTER

14BIT PWM GENERATOR

REMOCON

SERIAL

INTERFACE

UNIT 0

8BIT TIMER/COUNTER 0

8BIT TIMER 1

FIFO

INTERRUPT CONTROLLER

SPC700

CPU CORE

ROM

8K/12K/16K BYTES

PRESCALER/

TIME BASE TIMER

32kHz

TIMER/COUNTER

RAM

448 BYTES

AN0 to AN7

PWM0

RMC

SI0

SO0

SI1

SO1

CS0

SCK0

SCK1

INT0

INT1

INT2

NMI/INT3

TEX

EXTAL

Vss

PORT C

PC0 to PC7

PORT H

PH0

PORT B

PB0 to PB7

PORT E

PE0 to PE4

PE5 to PE6

LCD

CONTROLLER/

DRIVER

SEG0 to SEG31

COM0 to COM3

LC1

LC2

PORT A

PA0 to PA7

PORT D

PD0 to PD7

PORT F

PF0 to PF7

LC3

ADJ

PWM1

8BIT PWM GENERATOR

CS1

CLOCK GENERATOR/

SYSTEM CONTROL

RST

Block Diagram

CXP83408/83412/83416, CXP83409/83413/83417

PE3/INT3/NMI

PE4/RMC

PE5/PWM0

PE6/TO/ADJ

PB0/CS1

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PH0/PWM1

PA0/AN0

PA1/AN1

PA2/AN2

PD6/SEG22

PD5/SEG21

PD4/SEG20

PD3/SEG19

PD2/SEG18

PD1/SEG17

PD0/SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

SEG0

COM3

PA3/AN3

PA4/AN4

PA5/AN5

PA6/AN6

PA7/AN7

RST

EXTAL

XTAL

LC3

LC2

LC1

COM0

COM1

COM2

PE2/INT2

PE1/INT1

PE0/INT0/EC

PF7/SEG31

PF6/SEG30

TEX

PF5/SEG29

PF4/SEG28

PF3/SEG27

PF2/SEG26

PF1/SEG25

PF0/SEG24

PD7/SEG23

25 26 27 28 29 30

31 32 33

70 69 68 67

Pin Assignment (Top View) CXP83408/83412/83416 (QFP package)

Note) NC (Pin 75) is always connected to V

CXP83408/83412/83416, CXP83409/83413/83417

PE5/PWM0

PE6/TO/ADJ

PB0/CS1

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PH0/PWM1

PA0/AN0

PD4/SEG20

PD3/SEG19

PD2/SEG18

PD1/SEG17

PD0/SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

PA1/AN1

PA2/AN2

PA3/AN3

PA4/AN4

PA5/AN5

PA6/AN6

PA7/AN7

RST

EXTAL

XTAL

LC3

LC2

LC1

COM0

COM1

COM2

COM3

SEG0

PE4/RMC

PE3/INT3/NMI

PE2/INT2

PE1/INT1

PE0/INT0/EC

PF7/SEG31

PF6/SEG30

TEX

PF5/SEG29

PF4/SEG28

PF3/SEG27

PF2/SEG26

PF1/SEG25

PF0/SEG24

PD7/SEG23

PD6/SEG22

PD5/SEG21

21 22 23 24 25 26 27 28 29 30

31 32 33

70 69 68 67

Pin Assignment (Top View) CXP83408/83412/83416 (LQFP package)

Note) NC (Pin 73) is always connected to V

CXP83408/83412/83416, CXP83409/83413/83417

PE5/PWM0

PE6/TO/ADJ

PB0/CS1

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

PC0

PC1

PC2

PC3

PC4

PC5

PC6

PC7

PH0/PWM1

PA0/AN0

PD4/SEG20

PD3/SEG19

PD2/SEG18

PD1/SEG17

PD0/SEG16

SEG15

SEG14

SEG13

SEG12

SEG11

SEG10

SEG9

SEG8

SEG7

SEG6

SEG5

SEG4

SEG3

SEG2

SEG1

PA1/AN1

PA2/AN2

PA3/AN3

PA4/AN4

PA5/AN5

PA6/AN6

PA7/AN7

RST

EXTAL

XTAL

LC3

LC2

LC1

COM0

COM1

COM2

COM3

SEG0

PE4/RMC

PE3/INT3/NMI

PE2/INT2

PE1/INT1

PE0/INT0/EC

PF7/SEG31

PF6/SEG30

TEX

PF5/SEG29

PF4/SEG28

PF3/SEG27

PF2/SEG26

PF1/SEG25

PF0/SEG24

PD7/SEG23

PD6/SEG22

PD5/SEG21

21 22 23 24 25 26 27 28 29 30

31 32 33

70 69 68 67

Pin Assignment (Top View) CXP83409/83413/83417 (QFP package)

Note) NC (Pin 73) is always connected to V

CXP83408/83412/83416, CXP83409/83413/83417

Pin Description

Symbol

I/O

Functions

I/O/Analog input

PA0/AN0

PA7/AN7

(Port A)
8-bit I/O port. I/O can be
set in a unit of single bits.
Incorporation of pull-up
resistor can be set
through the software in a
unit of 4 bits.
(8 pins)

Analog inputs to A/D converter.
(8 pins)

I/O

PC0 to PC7

(Port C)
8-bit I/O port. I/O can be set in a unit of single bits. Capable of driving
12mA sync current. Incorporation of pull-up resistor can be set through
the software in a unit of 4 bits.
(8 pins)

I/O/Output

PH0/PWM1

(Port H)
1-bit I/O port. Incorporation
of pull-up resistor can be
set through the software.
(1 pin)

8-bit PWM output.

Input/Input/Input

Input/Input

Input/Input/Input

Input/Input

Output/Output

Output/Output/
Output

PE0/INT0/EC

PE1/INT1

PE2/INT2

PE3/INT3/NMI

PE4/RMC

PE5/PWM0

PE6/TO/ADJ

(Port E)
7-bit port. Lower 5 bits
are for inputs; upper
2 bits are for outputs.
(7 pins)

External interruption
request input. (4 pins)

Remote control receiving circuit input.

14-bit PWM output.

Rectangular wave output for 8-bit timer/
counter and 32kHz oscillation frequency
divider output.

I/O/Input

I/O/I/O

I/O/Input

I/O/Output

I/O/I/O

I/O/Input

I/O/Output

PB0/CS1

PB1/CS0

PB2/SCK0

PB3/SI0

PB4/SO0

PB5/SCK1

PB6/SI1

PB7/SO1

(Port B)
8-bit I/O port. I/O can be
set in a unit of single bits.
Incorporation of pull-up
resistor can be set
through the software in a
unit of 4 bits.
(8 pins)

Chip select input for serial interface (CH1).

Chip select input for serial interface (CH0).

Serial clock I/O (CH0).

Serial data input (CH0).

Serial data output (CH0).

Serial clock I/O (CH1).

Serial data input (CH1).

Serial data output (CH1).

External event inputs
for timer/counter.

Non-maskable intrruption
request input.

CXP83408/83412/83416, CXP83409/83413/83417

Symbol

I/O

Functions

Output/Output

PD0/SEG16

PD7/SEG23

(Port D)
8-bit output port.
(8 pins)

LCD segment signal output.
(16 pins)

Output/Output

PF0/SEG24

PF7/SEG31

(Port F)
8-bit output port.
(8 pins)

Output

SEG0 to SEG15

COM0 to COM3

LC1

to V

LC3

Input

Crystal connectors for system clock oscillation. When the clock is
supplied externally, input to EXTAL; opposite phase clock should be
input to XTAL.

EXTAL

Output

XTAL

Input

Crystal connectors for 32kHz timer/counter clock generation circuit.
For usage as event counter, connect clock oscillation source to TEX,
and leave TX open.

TEX

Output

Input

Low-level active, system reset.

RST

NC. Under normal operating conditions, connect to V

Positive power supply.

GND.

Vss

LCD segment signal output.

LCD common signal output.

LCD bias power supply.

Control pin to cutt off the current flowing to external LCD bias resistor
during standby.

CXP83408/83412/83416, CXP83409/83413/83417

Pull-up resistor

Port B data

Port B direction

"0" when reset

RD (Port B)

Data bus

Pull-up transistors

approx. 100k

"0" when reset

Schmitt input

CS1
CS0

SI0
SI1

Port B

8 pins

Hi-Z

When reset

PA0/AN0

PA7/AN7

PB0/CS1
PB1/CS0
PB3/SI0
PB6/SI1

Port B

4 pins

2 pins

Hi-Z

PB2/SCK0
PB5/SCK1

Pull-up resistor

Port A data

Port A direction

"0" when reset

Port A input selection

"0" when reset

RD (Port A)

Data bus

A/D converter

Pull-up resistors

approx. 100k

Input multiplexer

"0" when reset

Input protection
circuit

I/O Circuit Format for Pins

Port A

Circuit format

Pull-up transistors

approx. 100k

Pull-up resistor

Port B data

Port B direction

"0" when reset

RD (Port B)

Data bus

"0" when reset

Schmitt input

SCK in

Output enable

Port B output

selection

"0" when reset

SCK OUT

CXP83408/83412/83416, CXP83409/83413/83417

2 pins

Hi-Z

When reset

Circuit format

PB4/SO0
PB7/SO1

PC0 to PC7

8 pins

5 pins

Hi-Z

PE0/INT0/EC
PE1/INT1
PE2/INT2
PE3/INT3/NMI
PE4/RMC

Schmitt input

INT0/EC
INT1
INT2
INT3/NMI
RMC

Data bus

RD (Port E)

Pull-up resistor

Port C data

Port C direction

"0" when reset

RD (Port C)

Data bus

Large current 12mA

Pull-up transistors

approx. 100k

"0" when reset

Pull-up transistors

approx. 100k

Pull-up resistor

Port B data

Port B direction

"0" when reset

RD (Port B)

Data bus

"0" when reset

Output enable

Port B output

selection

"0" when reset

Port E

Port C

Port B

CXP83408/83412/83416, CXP83409/83413/83417

1 pin

High level

with pull-up
transistor ON
resistor when
reset

High level

When reset

Circuit format

PE6/TO/ADJ

PE5/PWM0

Port E data

"1" when reset

Port E output selection (upper)

MPX

Port E output selection (lower)

ADJ2K

ADJ16K

Internal reset signal

Pull-up transistors approx. 150k

ADJ signals are frequency divider outputs
for 32kHz oscillation frequency adjustment.
ADJ2K provides usage as buzzer output.

TO Output enable

Port E

1 pin

Hi-Z

PH0/PWM1

Data bus

RD (Port H)

Port H data

Port H direction

"0" when reset

Pull-up transistors

approx. 100k

Pull-up resistor

Port H output selection

PWM1

"0" when reset

Port H

1 pin

Port E

Port E output selection

RD (Port E)

Data bus

"0" when reset

Port E data

"1" when reset

PWM0

(

)

CXP83408/83412/83416, CXP83409/83413/83417

16 pins

level

When reset

Circuit format

SEG0 to SEG15

Segment
output
(V

level)

PD0 to PD7
PF0 to PF7

Segment data

Segment
driver

Port/segment output
selection

"0" when reset

Port data

PD7 to PD4
PD3 to PD0
PF7 to PF0

by a bit unit

by 4-bit unit

Port D

Port F

4 pins

level

COM0 to COM3

LC1

LC2

LC3

Common

24 pins

Segment

1 pin

Hi-Z

LCD control

(DSP bit)

"0" when reset

CXP83408/83412/83416, CXP83409/83413/83417

2 pins

Oscillation

When reset

Circuit format

EXTAL
XTAL

EXTAL

XTAL

2 pins

Oscillation

TEX
TX

TEX

1 pin

Low level

RST

Schmitt input

Mask option

Pull-up resistor

· Diagram shows circuit

composition during oscillation.

· Feedback resistor is removed

during stop, and XTAL
becomes "High" level.

· Diagram shows circuit

composition during oscillation.

· When the operation of the oscillation circuit is

stopped by the software, the feedback
resistor is removed and TEX and TX become
"Low" level and "High" level respectively.

CXP83408/83412/83416, CXP83409/83413/83417

and V

OUT

must not exceed V

+ 0.3V.

The large current drive transistor is the N-ch transistor of Port C (PC).

Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should

be conducted under the recommended operating conditions. Exceeding these conditions may adversely

affect the reliability of the LSI.

Supply voltage

LCD bias voltage

Input voltage

Output voltage

High level output current

High level total output current

Low level total output current

Operating temperature

Storage temperature

Allowable power dissipation

LC1

, V

LC2

LC3

OUT

OLC

Topr

Tstg

Low level output current

0.3 to +7.0

100

20 to +75

55 to +150

600

380

°C

Output (value per pin)

Total for all output pins

All pins excluding large current output
(value per pin)

Large current outputs (value per pin

)

Total for all output pins

QFP-80P-L01

LQFP-80P-L01

QFP-80P-L03

Item

Symbol

Rating

Unit

Remarks

Absolute Maximum Ratings

(Vss = 0V reference)

CXP83408/83412/83416, CXP83409/83413/83417

Value for each pin of normal input ports (PA, PB4, PB7, PC and PH0).

Value of the following pins: RST, CS0, CS1, SI0, SI1, SCK0, SCK1, EC/INT0, INT1, INT2, NMI/INT3, and RMC.

Specifies only during external clock input.

Optimal values are determined by LCD used.

High level input voltage

Low level input voltage

Operating temperature

Supply voltage

LCD bias voltage

5.5

+ 0.3

0.3V

0.2V

0.4

+75

°C

Item

Symbol

Min.

Max.

Unit

Remarks

4.5

3.5

2.7

2.5

Vss

0.7V

0.8V

0.4

0.3

LC1

LC2

LC3

IHS

IHEX

ILS

ILEX

Topr

During 1/2 and 1/4 frequency division
operating modes guaranteed operation range

During 1/16 frequency division operating mode
or sleep mode quaranteed operation range

Guaranteed operation range with TEX clock

Guaranteed data hold range during STOP

LCD power supply range

Hysteresis input

EXTAL

Hysteresis input

EXTAL

Recommended Operating Conditions

(Vss = 0V reference)

CXP83408/83412/83416, CXP83409/83413/83417

= 4.5V, I

= 0.5mA

= 4.5V, I

= 1.2mA

= 4.5V, I

= 1.8mA

= 4.5V, I

= 3.6mA

= 4.5V, I

= 12.0mA

= 5.5V, V

= 5.5V

= 5.5V, V

= 0.4V

= 5.5V, V

= 5.5V

High level
output current

4.0

3.5

0.5

0.1

1.5

2.78

µA

PA, PB,
PC, PD

PE5, PE6,
PF, PH0,
V

(Vo

only)

EXTAL

TEX

RST

Item

Symbol

Pins

Conditions

Min.

DD1

DD2

DDS1

DDS2

DDS3

IHE

ILE

IHT

ILT

ILR

Low level
output current

Input current

Typ.

0.4

0.6

1.5

400

±10

Max.

Unit

DC Characteristics

Electrical Characteristics

(Ta = 20 to +75°C, Vss = 0V reference)

= 5.5V, 10MHz crystal oscillation

= C

= 15pF)

= 3V, 32kHz crystal oscillation

= C

= 47pF)

= 5.5V, 10MHz crystal oscillation

= C

= 15pF)

= 3V, 32kHz crystal oscillation

= C

= 47pF)

= 5.5V termination of 10MHz

and 32kHz crystal oscillation

Supply
current

= 5.5V,

= 0.4V

= 4.5V, V

= 4.0V

= 5.5V,

= 0, 5.5V

= 5V,

LC1

= 3.75V

LC2

= 2.5V

LC3

= 1.25V

High-speed mode operation
(1/2 frequency divider clock)

SLEEP mode

STOP mode

I/O leakage
current

COM

Common
output
impedance

SEG

Segment
output
impedance

PA to PC

PE0 to PE4,
RST

COM0

COM3

SEG0 to SEG15

SEG16 to
SEG31

100

1.1

µA

CXP83408/83412/83416, CXP83409/83413/83417

Item

Symbol

Pins

Conditions

Min.

PA to PC,
PE1 to PE4,
EXTAL, TEX,
RST

Clock 1MHz
0V for all pins excluding
measured pins

Typ.

Max.

Unit

Common pins of PD0/SEG16 to PD7/SEG23, PF0/SEG24, PF7/SEG31, PD and PF are the case when the

common pin is selected as port; SEG16 to SEG31 is when the common pin is selected as segment output.

RST specifies the input current when pull-up resistor has been selected; leakage current when no resistor

has been selected.

PA to PC, and PH0 specify the input current when pull-up resistor has been selected; leakage current when

no resistor has been selected. (PE0 to PE4 specify the leakage current.)

When all output pins are left open.

Input capacity

CXP83408/83412/83416, CXP83409/83413/83417

sys indicates the three values below according to the upper two bits (CPU clock selection) of the clock

control registor (CLC: 00FE

sys (ns) = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11")

EXTAL

0.4V

1/fc

Crystal oscillation
Ceramic oscillation

EXTAL

XTAL

External clock

EXTAL

XTAL

74HC04

32kHz clock applied condition
Crystal oscillation

TEX

AC Characteristics

(1) Clock timing

System clock frequency

System clock input
pulse width

System clock input
rise and fall time

Event count input clock
pulse width

Event count input clock
rise and fall time

System clock frequency

Event count input clock
input pulse width

Event count input clock
rise and fall time

XTAL
EXTAL

EXTAL

TEX
TX

TEX

MHz

kHz

µs

Item

Symbol

Conditions

Min.

Unit

Fig. 1, Fig. 2

Fig. 1, Fig. 2
External clock drive

Fig. 3

= 2.7 to 5.5V

Fig. 2 (32kHz clock
applied condition)

Fig. 3

37.5

sys + 50

Typ.

32.768

Max.

200

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Fig. 2. Clock applied conditions

Fig. 1. Clock timing

TEX
EC

0.2V

0.8V

Fig. 3. Event count clock timing

CXP83408/83412/83416, CXP83409/83413/83417

(2) Serial transfer

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

CS0

SCK0 (CS1

SCK1)

delay time

CS0

SCK0 (CS1

SCK1)

floating delay time

CS0

SO0 (CS1

SO1)

delay time

CS0

SO0 (CS1

SO1)

floating delay time

CS0 (CS1) high level width

SCK0 (SCK1) cycle time

SCK0 (SCK1)
high and low level widths

SI0 (SI1) input setup time
(for SCK0

(SCK1

) )

SI0 (SI1) input hold time

(for SCK0

(SCK1

) )

SCK0

SO0 (SCK1

SO1)

delay time

DCSK

DCSKF

DCSO

DCSOF

WHCS

KCY

SIK

KSI

KSO

SCK0
(SCK1)

SO0
(SO1)

CS0
(CS1)

SCK0
(SCK1)

SI0
(SI1)

SO0
(SO1)

Input mode

Output mode

Input mode

Output mode

SCK0 (SCK1) input mode

SCK0 (SCK1) output mode

SCK0 (SCK1) input mode

SCK0 (SCK1) output mode

SCK0 (SCK1) input mode

SCK0 (SCK1) output mode

Symbol

Min.

sys + 200

16000/fc

sys + 100

8000/fc 50

100

200

sys + 200

100

sys + 200

100

Max.

Unit

Chip select transfer mode
(SCK0 (SCK1) = output mode)

Chip select transfer mode

Conditions

Note 1)

sys indicates the three values below according to the upper two bits (CPU clock selection) of the

clock control register (CLC: 00FE

sys (ns) = 2000/fc (upper two bits = "00"), 4000/fc (upper two bits = "01"), 16000/fc (upper two bits = "11")

Note 2) The load condition for the SCK0 (SCK1) output mode, SO0 (SO1) output delay time is 50pF + 1TTL.

CXP83408/83412/83416, CXP83409/83413/83417

Conversion time

Sampling time

Analog input voltage

CONV

SAMP

IAN

AN0 to AN7

Ta = 25°C
V

= 5.0V

= 0V

Linearity error

Zero transition voltage

Full-scale transition
voltage

Resolution

µs

+ 0.3

160/f

ADC

12/f

ADC

Item

Symbol

Conditions

Min.

Typ.

Max.

Unit

Bits

(3) A/D converter characteristics

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, AV

REF

= 4.0 to AV

, Vss = 0V reference)

±3

LSB

5030

4970

4910

Fig. 5. Definition of A/D converter terms

Analog input

Linearity error

Digital conversion value

00 (

= f

/2)

01 (

= f

/4)

11 (

= f

/16)

ADC

= fc/2

ADC

= fc/4

ADC

= fc/16

ADC

= fc

ADC

= fc/2

ADC

= fc/8

CKS

PCK1, PCK0

0 (

/2 selection)

0 (

selection)

: Value atwhich the digital conversion value changes

from 00

to 01

and vice versa.

: Value at which the digital conversion value changes

from FE

to FF

and vice versa.

ADC

indicates the below values due to the contents of bit 6

(CK3) of the A/D control registor (ADC: 00F9

) and bit 7

(PCK1) and bit 6 (PCK0) of the clock control resistor (CLC:

00FE

CXP83408/83412/83416, CXP83409/83413/83417

External interruption
high and low level widths

Reset input low level width

INT0
INT1
INT2
NMI/INT3

RST

32/fc

µs

Item

Symbol

Conditions

Min.

Max.

Unit

RSL

(4) Interruption, reset input

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

0.2V

0.8V

INT0
INT1
INT2
NMI/INT3
(NMI is specified only for
the falling edge)

Fig 6. Interruption input timing

RSL

0.2V

RST

Fig. 7. RST input timing

CXP83408/83412/83416, CXP83409/83413/83417

Appendix

Fig. 8. SPC700 Series recommended oscillation circuit

EXTAL

XTAL

EXTAL

XTAL

(i) Main clock

EXTAL

XTAL

(ii) Main clock

EXTAL

XTAL

TEX

(iii) Sub clock

Manufacturer

MURATA
MFG
CO., LTD.

RIVER
ELETEC
CO., LTD.

KINSEKI
LTD.

Model

CSA4.19MG

CSA8.00MG

CST4.19MGW

CST8.00MTW

HC-49/U03

HC-49/U (-S)

fc (MHz)

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

4.19

8.00

10.00

2.2k

470

560

(pF)

Rd (

)

Circuit

example

(i)

CSA10.0MT

(ii)

CST10.00MTW

(i)

Models with an asterisk (

) have the built-in ground capacitance (C

, C

Item

Content

Reset pin pull-up resistor

Non-existent

Existent

Mask Option Table

Product name

Package

CXP83408/83412/83416

CXP83409/83413/83417

80-pin plastic QFP/LQFP

80-pin plastic QFP (0.65mm pitch)

Package Table

CXP83408/83412/83416, CXP83409/83413/83417

(100µA)

0.1

5.0

1.0

Supply voltage [V]

Supply current [mA]

vs. V

(fc = 10MHz, Ta = 25°C, Typical)

0.05

(50µA)

0.01

(10µA)

0.5

10.0

20.0

SLEEP mode

32kHz mode
(instruction)

32kHz
SLEEP mode

SLEEP mode

fc System clock [MHz]

Supply current [mA]

vs. fc

1/2 dividing mode

= 5V, Ta = 25°C, typical)

Characteristic Curves

Package Outline

Unit : mm

CXP83408/83412/83416

PACKAGE STRUCTURE

SONY CODE

EIAJ CODE

JEDEC CODE

QFP-80P-L01

QFP080-P-1420-A

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE WEIGHT

EPOXY RESIN

SOLDER PLATING

COPPER / 42 ALLOY

1.6g

23.9 ± 0.4

20.0 0.1

+ 0.4

0.8

0.35 0.1

+ 0.15

14.0 0.1

+ 0.4

17.9 ±

0.4

16.3

0.1 0.05

+ 0.2

2.75 0.15

+ 0.35

0.8 ±

0.2

0.15 0.05

+ 0.1

80PIN QFP (PLASTIC)

0.12

0.15

0° to 10°

DETAIL A

CXP83408/83412/83416, CXP83409/83413/83417

CXP83409/83413/83417

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE WEIGHT

EPOXY / PHENOL RESIN

SOLDER PLATING

42 ALLOY

PACKAGE STRUCTURE

14.0 ± 0.2

12.0 ± 0.1

(0.22)

0.5 ± 0.08

0.18 0.03

+ 0.08

1.5 0.1

+ 0.2

0.127 0.02

+ 0.05

0.5 ±

0.2

(13.0)

0.1 ± 0.1

0.5 ±

0.2

0° to 10°

DETAIL A

80PIN LQFP (PLASTIC)

0.5g

LQFP-80P-L01

QFP080-P-1212-A

0.1

NOTE: Dimension "

" does not include mold protrusion.

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE STRUCTURE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE WEIGHT

EPOXY RESIN

SOLDER PLATING

COPPER / 42 ALLOY

QFP-80P-L03

LQFP080-P-1414

0.6g

80PIN QFP (PLASTIC)

16.0 ± 0.4

14.0 0.1

+ 0.4

0.65

0.3 0.1

+ 0.15

0° to 10°

0.5 ±

0.2

0.1 0.1

+ 0.15

(15.0)

0.127 0.05

+ 0.1

1.5 0.15

+ 0.35

± 0.12

0.1

CXP83408/83412/83416

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: CXP83409

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: CXP83409