CXP86212/86216, CXP86324/86332

CXP86440/86448/86460

E96644C18-PS

CMOS 8-bit Single Chip Microcomputer

Description

The CXP86212/86216, CXP86324/86332, CXP86440/

86448/86460 are the CMOS 8-bit single chip
microcomputer integrating on a single chip an A/D
converter, serial interface, timer/counter, time-base
timer, on-screen display function, I

C bus interface,

PWM output, remote control reception circuit, HSYNC
counter, watchdog timer, 32kHz timer/counter besides
the basic configurations of 8-bit CPU, ROM, RAM, I/O
ports.

The CXP86212/86216, CXP86324/86332, CXP86440/

86448/86460 also provide a SLEEP function that
enables to lower the power consumption.

Features
· A wide instruction set (213 instructions) which covers

various types of data
16-bit operation/multiplication and division/

Boolean bit operation instructions

· Minimum instruction cycle

250ns at 16MHz operation
122µs at 32kHz operation

· Incorporated ROM

12K bytes (CXP86212)
24K bytes (CXP86324)
40K bytes (CXP86440)
16K bytes (CXP86216)
32K bytes (CXP86332)
48K bytes (CXP86448)
60K bytes (CXP86460)

· Incorporated RAM

352 bytes (CXP86212/86216) 704 bytes (CXP86324/86332)
1536 bytes (CXP86440/86448/86460)
(Excludes VRAM for on-screen display and sprite RAM)

· Peripheral functions

A/D converter

8-bit 6-channel successive approximation method
(Conversion time of 3.25µs at 16MHz)

Serial interface

8-bit clock sync type, 1 channel

Timer

8-bit timer
8-bit timer/counter
19-bit time-base timer
32 kHz timer/counter

On-screen display (OSD) function

16 dots, 128 character types (CXP86212/86216),

256 character types (CXP86324/86332),
384 character types (CXP86440/86448/86460)
15 character colors, 2 lines

24 characters,

frame background 8 colors/ half blanking,
background on full screen 15 colors/ half blanking
edging/ shadowing/ rounding for every line,
background with shadow for every character (CXP86440/86448/86460),
double scanning,
sprite OSD (CXP86440/86448/86460),
12

16 dots, 1 screen, 8 colors for every dot

C bus interface

PWM output

8 bits, 8 channels
14 bits, 1 channel

Remote control reception circuit

8-bit pulse measurement counter, 6-stage FIFO

HSYNC counter

2 channels

Watchdog timer

· Interruption

13 factors, 13 vectors, multi-interruption possible

· Standby mode

Sleep

· Package

64-pin plastic SDIP/QFP/LQFP

· Piggyback/evaluator

CXP86400 64-pin ceramic PQFP
CXP86490 64-pin ceramic PSDIP (Supports custom font)

Perchase of Sony's I

C components conveys a licence under the Philips I

C Patent Rights to use these components

in an I

C system, provided that the system conforms to the I

C Standard Specifications as defined by Philips.

Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.

Structure

Silicon gate CMOS IC

64 pin SDIP (Plastic)

64 pin QFP (Plastic)

64 pin LQFP (Plastic)

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

A/D CONVERTER

6CH

FIFO

REMOCON

SERIAL INTERFACE

UNIT

8BIT TIMER 1

8BIT TIMER/

COUNTER 0

ON SCREEN

DISPLAY

HSYNC COUNTER 0

HSYNC COUNTER 1

C BUS

INTERFACE UNIT

8BIT PWM

14BIT PWM

PRESCALER/

TIME BASE TIMER

WATCHDOG TIMER

32kHz

TIMER/COUNTER

ROM

12K/16K/24K/32K/

40K/48K/60K BYTES

RAM

352/704/1536 BYTES

SPC700 CPU CORE

CLOCK GENERATOR

/SYSTEM CONTROL

INTERRUPT CONTROLLER

PORT A

PORT B

PORT C

PORT D

PORT E

PORT F

PORT G

PG3 to PG7

PWM

PF0 to PF7

PE4 to PE6

PE2 to PE3

PE0 to PE1

PD0 to PD7

PC6 to PC7

PC0 to PC5

PB0 to PB7

PA0 to PA7

PWM0 to PWM7

ADJ

SCL1

SCL0

SDA1

SDA0

HS1

HS0

VSYNC

HSYNC

EXLC

XLC

SCK

RMC

AN0 to AN5

INT0

INT1

INT2

TEX

EXTAL

XTAL

RST

Block Diagram

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

EXLC

XLC

PE4/YM

PE5/YS

PE6/I

PB0

PB1

PB2

PG3

PG4

PC4

PC5

PC6/PWM6

PC7/PWM7

PF0/PWM0

PF1/PWM1

PF2/PWM2

PF3/PWM3

PF4/SCL0

PF5/SCL1/PWM4

PF6/SDA0

PF7/SDA1/PWM5

PE0/TO/ADJ

PE1/PWM

PE2/TEX/INT0

PE3/TX

HS0/PD4

PC3

PC2

PC1

PC0

EC/PD7

RMC/PD6

HS1/PD5

SI/PD3

SO/PD2

SCK/PD1

INT2/PD0

HSYNC/PA7

VSYNC/PA6

RST

PA0/AN0

XTAL

EXTAL

PA5/AN5

PA4/AN4

PA3/AN3

PA2/AN2

PA1/AN1

PB7

PB6

PB5

PB4

PB3

INT1/PG7

PG6

PG5

Pin Assignment (Top View) 64-pin SDIP

Note)

1. NC (Pin 46) is left open.

2. Vss (Pins 16 and 48) are both connected to GND.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

EXLC

XLC

PE4/YM

PE5/YS

PE6/I

PE1/PWM

PE2/TEX/INT0

PE3/TX

PF3/PWM3

PF4/SCL0

PF5/SCL1/PWM4

PF6/SDA0

PF7/SDA1/PWM5

PE0/TO/ADJ

PF2/PWM2

PF1/PWM1

PF0/PWM0

PC7/PWM7

PC6/PWM6

PC5

PC4

PC3

PC2

PC1

PC0

PD7/EC

PD6/RMC

PB0

PB1

PB2

PG3

PG4

PG5

PG6

INT1/PG7

PB3

PB4

PB5

PB6

31 32

20 21 22 23 24 25 26 27 28 29 30

HS0/PD4

HS1/PD5

SI/PD3

SO/PD2

SCK/PD1

INT2/PD0

HSYNC/PA7

VSYNC/PA6

RST

PA0/AN0

XTAL

EXTAL

PA5/AN5

PA4/AN4

PA3/AN3

PA2/AN2

PA1/AN1

PB7

Pin Assignment (Top View) 64-pin QFP

Note)

1. NC (Pin 40) is left open.

2. Vss (Pins 10 and 42) are both connected to GND.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

PE2/TEX/INT0

PE3/TX

EXLC

XLC

PE4/YM

PE5/YS

PE6/I

PF7/SDA1/PWM5

PE0/TO/ADJ

PE1/PWM

PF4/SCL0

PF5/SCL1/PWM4

PF6/SDA0

PF0/PWM0

PC7/PWM7

PC6/PWM6

PC5

PC4

PC3

PC2

PC1

PC0

PD7/EC

PD6/RMC

PD5/HS1

PD4/HS0

PB0

PB1

PB2

PG3

PG4

PG5

PG6

INT1/PG7

PB3

PB4

31 32

20 21 22 23 24 25 26 27 28 29 30

SO/PD2

SI/PD3

SCK/PD1

INT2/PD0

HSYNC/PA7

VSYNC/PA6

RST

XTAL

EXTAL

PA5/AN5

PA4/AN4

PA3/AN3

PA2/AN2

PA1/AN1

PA0/AN0

17 18 19

PF1/PWM1

PF2/PWM2

PF3/PWM3

PB5

PB6

PB7

Pin Assignment (Top View) 64-pin LQFP

Note)

1. NC (Pin 38) is left open.

2. Vss (Pins 8 and 40) are both connected to GND.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

(Port A)
8-bit I/O port.
I/O can be set in a
unit of single bits.
(8 pins)

(Port B)
8-bit I/O port. I/O can be set in a unit of single bits.
(8 pins)

(Port C)
Lower 6 bits are I/O ports; I/O can be set in a unit of single bits. Upper
2 bits are output port and large current (12mA) N-channel open drain
output. Upper 2 bits are medium drive voltage (12V); lower 6 bits are
5V drive.
(8 pins)

(Port D)
8-bit I/O port. I/O
can be set in a
unit of single bits.
Can drive 12mA
synk current.
(8 pins)

(Port E)
Bits 0 and 1 are I/O
port; I/O can be set
in a unit of single.
Bits 2 and 3 are
input port. Bits 4, 5
and 6 are output
port.
(7 pins)

Pin Description

Symbol

PA0/AN0

PA5/AN5

PA6/VSYNC

PA7/HSYNC

PB0 to PB7

PC0 to PC5

PC6/PWM6 to
PC7/PWM7

PD0/INT2

PD1/SCK

PD2/SO

PD3/SI

PD4/HS0

PD5/HS1

PD6/RMC

PD7/EC

PE0/TO/ADJ

PE1/PWM

PE2/TEX/INT0

PE3/TX

PE4/YM

PE5/YS

PE6/I

I/O/
Analog input

I/O/Input

I/O

Output/Output

I/O/Input

I/O/I/O

I/O/Output

I/O/Input

I/O/Output/
Output

I/O/Output

Input/Input/
Input

Input/Output

Output/Output

Output

I/O

Description

Analog inputs to A/D converter.
(6 pins)

OSD display vertical sync signal input.

OSD display horizontal sync signal input.

8-bit PWM output.
(2 pins)

External interruption request input. Active at the
falling edge.

Serial clock I/O.

Serial data output.

Serial data input.

HSYNC counter (CH0) input.

HSYNC counter (CH1) input.

Remote control reception circuit input.

External event input for timer/counter.

Rectangular wave output
for 8-bit timer/counter.

14-bit PWM output.

Connects a crystal for
32kHz timer/counter
clock oscillation. When
used as an event
counter, input to TEX pin and leave TX pin open.

32kHz oscillation
frequency dividing output.

External interruption
request input. Active at
the falling edge.

OSD display 6-bit output.
(6 pins)

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

(Port F)
8-bit output port
and large current
(12mA) N-channel
open drain output.
Lower 4 bits are
medium drive
voltage (12V); upper
4 bits are 5V drive.
(8 pins)

(Port G)
5-bit I/O port. I/O can be set in a unit of single bits.
(5 pins)

Connects a crystal for system clock oscillation. When a clock is
supplied externally, input to EXTAL pin and input a reversed phase
clock to XTAL pin.

System reset; active at Low level.

OSD display clock oscillation I/O. Oscillation frequency is determined
by the external L and C.

No connected.

Positive power supply.

GND. Connect two Vss pins to GND.

8-bit PWM output.
(4 pins)

C bus interface transfer clock I/O.

(2 pins)

C bus interface transfer data I/O.

(2 pins)

Symbol

PF0/PWM0 to
PF3/PWM3

PF4/SCL0

PF5/SCL1/
PWM4

PF6/SDA0

PF7/SDA1/
PWM5

PG3 to PG6

PG7/INT1

EXTAL

XTAL

RST

EXLC

XLC

Vss

Output/Output

Output/I/O

Output/I/O/
Output

Output/I/O

Output/I/O/
Output

I/O

I/O/Input

Input

Output

Input

Output

I/O

Description

8-bit PWM output.

External interruption request input.
Active at the falling edge.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Port A data

Port A direction

RD (Port A)

Data bus

"0" when reset

Port A function selection

"0" when reset

A/D converter

Input multiplexer

Input
protection
circuit

Port A data

Port A direction

Input polarity

RD (Port A)

Data bus

HSYNC, VSYNC

"0" when reset

Schmitt input

Ports B, C, G data

Ports B, C, G direction

RD (Ports B, C, G)

Data bus

INT1

"0" when reset

Schmitt input
only for PG7

Input/Output Circuit Formats for Pins

Port A

Port B

Port C

6 pins

2 pins

19 pins

Hi-Z

When reset

Circuit format

PA6/VSYNC
PA7/HSYNC

PB0 to PB7
PC0 to PC5
PG3 to PG6
PG7/INT1

PA0/AN0

PA5/AN5

Port G

Ports C and F data

Ports C and F
function selection

"0" when reset

"1" when reset

PWM0 to PWM3
PWM6, PWM7

12V drive voltage

Large current 12mA

Port C

6 pins

PC6/PWM6
PC7/PWM7
PF0/PWM0

PF3/PWM3

Hi-Z

Port F

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Port D data

Port D direction

RD (Port D)

Data bus

INT2, SI, HS0,
HS1, RMC, EC

"0" when reset

Schmitt input

Large current 12mA

Port D data

Port D direction

RD (Port D)

Data bus

"0" when reset

Schmitt input
only for PD1

SCK, SO

SIO output enable

SCK only

Large current 12mA

Port E data

"1" when reset

ADJ16K

ADJ2K

10
11

MPX

Data bus

Port E direction

"1" when reset

Port E function selection (Lower)

"00" when reset

Port E function selection (Upper)

Internal reset signal

ADJ signals are frequency

dividing outputs for 32kHz
oscillation frequency
adjustment. ADJ2K provides
usage as buzzer output.

Pull-up resistors approx. 150k

RD (Port E)

Port D

Port E

6 pins

2 pins

1 pin

Hi-Z

High level
(with
approximately
150k

resistor when
reset)

When reset

Circuit format

PD1/SCK
PD2/SO

PE0/TO/ADJ

PD0/INT2
PD3/SI
PD4/HS0
PD5/HS1
PD6/RMC
PD7/EC

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

32kHz oscillation circuit control

RD (Port E)

Schmitt input

Clock input

Data bus

INT0

"1" when reset

PE2/
TEX/
INT0

PE3/
TX

RD (Port E)

Port E data

Port E direction

RD (Port E)

Data bus

"1" when reset

PWM

"1" when reset

Port E function selection

"0" when reset

Port E

1 pin

2 pins

3 pins

When reset

Circuit format

PE2/TEX/INT0
PE3/TX

High level

Oscillation
halted
Port input

Hi-Z

PE1/PWM

PE4/YM
PE5/YS
PE6/I

Port E data

Port E function selection

"0" when reset

YM, YS, I

Output polarity

"0" when reset

Writing data to output polarity
register and port data register
brings output to active.

Port E

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

4 pins

3 pins

When reset

Circuit format

Hi-Z

C bus enable

Port F data

Port F function selection

"0" when reset

"1" when reset

PWM4, PWM5

SCL, SDA

SCL, SDA
(I

C bus circuit)

Schmitt input

Large current 12mA

To internal I

C pins

(SCL1 for SCL0)

BUS SW

R, G, B

Output polarity

"0" when reset

Writing data to output
polarity register brings
output to active.

Port F

PF4/SCL0
PF5/SCL1/PWM4
PF6/SDA0
PF7/SDA1/PWM5

EXLC

XLC

Oscillation control

OSD display clock

EXTAL

XTAL

· Diagram shows the
circuit composition
during oscillation.
· Feedback resistor is
removed during stop.
(This device does not
enter the stop mode.)

Schmitt input

Pull-up resistor

OP Mask option

2 pins

EXLC
XLC

2 pins

EXTAL
XTAL

1 pin

RST

Oscillation
halted

Oscillation

Low level

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

and V

OUT

should not exceed V

+ 0.3 V.

The large current output port is Port C (PC6, PC7), Port D (PD) and Port F (PF).

Note) Usage exceeding absolute maximum ratings may permanently impair the LSI. Normal operation should

be conducted under the recommended operating conditions. Exceeding those conditions may

adversely affect the reliability of the LSI.

OUT

OUTP

OLC

Topr

Tstg

0.3 to +7.0

0.3 to +15.0

130

20 to +75

55 to +150

1000

600

380

°C

Total of all output pins

Ports excluding large current output
(value per pin)

Large current output ports
(value per pin

)

Total of all output pins

SDIP-64P-01

QFP-64P-L01

LQFP-64P-L01

Item

Symbol

Ratings

Unit

Remarks

Absolute Maximum Ratings

(Vss = 0V reference)

Supply voltage

High level input
voltage

Low level input
voltage

Operating temperature

5.5

+ 0.3

0.3V

0.2V

0.4

+75

°C

Item

Symbol

Min.

Max.

Unit

Remarks

4.5

3.5

2.7

0.7V

0.8V

0.4

0.3

IHS

IHEX

ILS

ILEX

Topr

Guaranteed operation range for 1/2 and 1/4
frequency dividing modes

Guaranteed operation range for 1/16 frequency
dividing mode or sleep

Guaranteed operation range for TEX mode

Guaranteed data hold range for stop

EXTAL pin

, TEX pin

EXTAL pin

, TEX pin

This device does not enter the STOP mode.

PA1 to 5, PB3 to 7, PC0 to PC5, PD2, PE0, PE1, PE3, PG3 to PG6, SCL0 to 1, SDA0 to 1 pins

VSYNC, HSYNC, INT2, SCK, SI, HS0, HS1, RMC, EC, INT0, INT1, RST pins

Specifies only during external clock input.

Specifies only during external event count input.

Recommended Operating Conditions

(Vss = 0V reference)

Supply voltage

Input voltage

Output voltage

Medium drive output voltage

High level output current

High level total output current

Low level output current

Low level total output current

Operating temperature

Storage temperature

Allowable power dissipation

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

= 4.5V, I

= 0.5mA

= 4.5V, I

= 1.2mA

= 4.5V, I

= 1.8mA

= 4.5V, I

= 3.6mA

= 4.5V, I

= 3.0mA

= 4.5V, I

= 4.0mA

= 5.5V, V

= 5.5V

= 5.5V, V

= 0.4V

= 5.5V, V

= 5.5V

= 4.5V, I

= 12.0mA

High level output
voltage

Low level output
voltage

Input current

I/O leakage current

Open drain I/O
leakage current
(in N-ch Tr off state)

Supply current

4.0

3.5

1.2

µA

120

2.1

µA

0.4

0.6

1.5

0.4

0.6

400

±10

µA

0.5

0.1

1.5

PA, PB, PC0 to PC5,
PD, PE0 to PE1,
PE4 to PE6, PG, R,
G, B

PA to PD, PE0 to PE1,
PE4 to PE6, PF0 to
PF3, PG, R, G, B

PC6, PC7, PD, PF

PF4 to PF7
(SCL0, SCL1,
SDA0, SDA1)

EXTAL

RST

PA to PE, PG, R,
G, B, RST

PC6, PC7, PF0 to PF3

PF4 to PF7

SCL0: SCL1
SDA0: SDA1

= 5.5V, V

= 0.4V

= 5.5V,

= 0, 5.5V

= 5.5V, V

= 12.0V

= 5.5V, V

= 5.5V

= 4.5V

SCL0

= V

SCL1

= 2.25V

SDA0

= V

SDA1

= 2.25V

= 3.3V,

32MHz crystal oscillation
(C

= C

= 47pF)

Item

Symbol

Pins

Conditions

Min.

Typ.

Max.

Unit

LOH

DD1

DD2

DDS1

DDS2

DDS3

IHE

ILE

IHT

ILT

ILR

Electrical Characteristics

DC characteristics

(Ta = 20 to +75°C, Vss = 0V reference)

1/2 frequency dividing mode

TEX

= 5.5V,

16MHz crystal oscillation
(C

= C

= 15pF)

= 3.3V,

32MHz crystal oscillation
(C

= C

= 47pF)

Sleep mode

= 5.5V,

16MHz crystal oscillation
(C

= C

= 15pF)

Stop mode

= 5.5V,

termination of 16MHz
and 32MHz oscillation

C bus switch

connection impedance
(in output Tr off state)

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Indicates three values according to the contents of the clock control register (CLC: 00FEh) upper 2 bits

(CPU clock selection).

sys (ns) = 2000/fc (Upper 2 bits = "00"), 4000/fc (Upper 2 bits = "01"), 16000/fc (Upper 2 bits = "11")

EXTAL

0.4V

1/fc

Crystal oscillation
Ceramic oscillation

EXTAL

XTAL

External clock

EXTAL

XTAL

74HC04

32kHz clock applied condition
Crystal oscillation

TEX

TEX
EC

0.2V

0.8V

AC Characteristics

(1) Clock timing

System clock frequency

System clock input pulse width

System clock input rise and fall
times

Event count input clock pulse
width

Event count input clock rise
and fall times

System clock frequency

Event count input clock input
pulse width

Event count input clock rise
and fall times

XTAL
EXTAL

EXTAL

TEX
TX

TEX

MHz

kHz

µs

Item

Symbol

Pins

Conditions

Min.

Unit

Fig. 1, Fig.2

Fig. 1, Fig.2
External clock drive

Fig. 3

= 2.7 to 5.5 V

Fig. 2 (32kHz clock
applied conditions)

Fig. 3

sys

Typ.

32.768

Max

200

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Fig.2. Clock applied conditions

Fig. 1. Clock timing

Fig. 3. Event count clock timing

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

(2) Serial transfer

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

SCK cycle time

KCY

SCK

Input mode

Output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

SCK input mode

SCK output mode

1000

8000/fc

400

4000/fc 50

100

200

100

200

100

SCK

SIK

KSI

KSO

SCK High and Low level
width

SI input setup time
(for SCK

)

SI hold time
(for SCK

)

SCK

SO delay time

Symbol

Pins

Conditions

Min.

Max.

Unit

Note) The load of SCK output mode and SO output delay time is 50pF + 1TTL.

Fig. 4. Serial transfer timing

0.2V

0.8V

KCY

SIK

KSI

0.2V

0.8V

KSO

0.2V

0.8V

Output data

Input data

SCK

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Resolution

Linearity error

Zero transition
voltage

Full-scale transition
voltage

Conversion time

Sampling time

Analog input voltage

CONV

SAMP

IAN

AN0 to AN5

Ta = 25°C
V

= 5.0V

Vss = 0V

4910

26/f

ADC

6/f

ADC

4970

±3

5030

Bits

LSB

µs

Item

Symbol

Pins

Conditions

Min.

Typ.

Max.

Unit

(3) A/D converter

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Linearity error

Analog input

FFh

FEh

01h
00h

Digital conversion value

Fig. 5. Definitions for A/D converter terms

: Value at which the digital conversion value changes

from 00h to 01h and vice versa.

: Value at which the digital conversion value changes

from FEh to FFh and vice versa.

ADC

indicates the below values due to the contents of bit

6 (CKS) of the A/D control register (ADC: 00F6h):

ADC

= fc (CKS = "0"), fc/2 (CKS = "1")

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

(5) I

C bus timing

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

SCL clock frequency

Bus-free time before starting transfer

Hold time for starting transfer

Clock Low level width

Clock High level width

Setup time for repeated transfers

Data hold time

Data setup time

SDA, SCL rise time

SDA, SCL fall time

Setup time for transfer completion

SLC

BUF

HD; STA

LOW

HIGH

SU; STA

HD; DAT

SU; DAT

SU; STO

SCL

SDA, SCL

SCL

SDA, SCL

4.7

4.0

4.7

4.0

4.7

250

4.7

100

300

kHz

µs

Symbol

Pins

Conditions

Min.

Max.

Unit

The data hold time should be 300ns or more because the SCL rise time (300ns Max.) is not included in it.

Fig. 8. I

C bus transfer timing

;

STO

;

STA

;

STA

;

DAT

HIGH

;

DAT

LOW

;

STA

BUF

SDA

SCL

Fig. 9. I

C bus device recommended circuit

C bus

device

C bus

device

SDA0
(or SDA1)

SCL0
(or SCL1)

· A pull-up resistor (Rp) must be connected to SDA0 (or SDA1) and SCL0 (or SCL1).

· The SDA0 (or SDA1) and SCL0 (or SCL1) series resistance (Rs = 300

or less) can be used to reduce the

spike noise caused by CRT flashover.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

(6) OSD timing

(Ta = 20 to +75°C, V

= 4.5 to 5.5V, Vss = 0V reference)

Item

OSD clock frequency

HSYNC pulse width

VSYNC pulse width

HSYNC afterwrite rise and fall
times

VSYNC beforewrite rise and fall
times

OSC

HWD

VWD

HCG

VCG

EXLC
XLC

HSYNC

VSYNC

HSYNC

VSYNC

Fig. 11

Fig. 10

30.4

200

1.0

MHz

µs

Symbol

Pins

Conditions

Unit

Min.

Max

Fig. 10. OSD timing

0.8V

0.2V

HCG

HWD

HSYNC

For OSD I/O polarity register

(OPOL: 01FEh)

bit 7 at "0"

0.8V

0.2V

VCG

VSYNC

For OSD I/O polarity register

(OPOL: 01FEh)

bit 6 at "0"

VWD

Fig. 11. LC oscillation circuit connection

EXLC

XLC

The series resistor for XLC (R = 1k

or less) can reduce the frequency of occurrence of the undesired

radiation.

The maximum value of fosc is specified with the following equation.

fosc [max]

1.9

H indicates 1HSYNC period.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Appendix

Fig. 12. Recommended oscillation circuit

EXTAL

XTAL

(i) Main clock

TEX

(iii) Sub clock

EXTAL

XTAL

(ii) Main clock

Reset pin pull-up resistor

Non-existent

Existent

Item

Content

Mask Option Table

Models with an astarisk (

) have the built-in ground capacitance (C

, C

The series resistor for XTAL (Rd = 500

or less) can reduce the effect of the noise caused by the

electrostatic discharge.

Manufacture

RIVER
ELETEC CO.,
LTD.

MURATA MFG
CO., LTD.

CSA10.0MTZ

CSA12.0MTZ

CSA16.00MXZ040

CST10.0MTW

CST12.0MTW

CST16.00MXW0C1

KINSEKI LTD.

Model

HC-49/U03

HC-49/U (-S)

fc (MHz)

10.0

12.0

16.0

10.0

12.0

16.0

8.0

12.0

16.0

8.0

12.0

16.0

OPEN

330

120k

32.768kHz

(iii)

(pF)

Rd (

)

Circuit example

(i)

(ii)

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Fig. 13. Characteristic curves

vs. V

(fc = 16MHz, Ta = 25°C, Typical)

Frequency [MHz]

Supply current [mA]

vs. fc

= 5V, Ta = 25°C, Typical)

0.1

Supply voltage [V]

Supply current [mA]

0.01

1/16 dividing mode

1/4 dividing mode

Sleep mode

100

32kHz sleep mode

32kHz operation mode

1/2 dividing mode

1/4 dividing mode

1/16 dividing mode

Sleep mode

100

Inductance [µ

Parameter curve for OSD oscillator L vs. C

(Analytically calculated value)

, C

Capacitance [pF]

20MHz
24MHz

30MHz

100

0.1

0.01

28MHz

16MHz

OSC

= C = C

//C

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Package Outline

Unit: mm

64PIN

SDIP (PLASTIC)

75 0.

0.9

0.15

0.5

0.1

25 0.

+ 0.

17.

19.

1.778

57.6 0.1

+ 0.4

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

42/COPPER ALLOY

SONY CODE

EIAJ CODE

JEDEC CODE

SDIP-64P-01

P-SDIP64-17.1x57.6-1.778

SOLDER PLATING

8.6g

+ 0.

0° to 15°

PACKAGE STRUCTURE

LEAD SPECIFICATIONS

ITEM

LEAD MATERIAL

ALLOY 42

LEAD TREATMENT

Sn-Bi 2.5%

LEAD TREATMENT THICKNESS

5-18

SPEC.

64PIN

SDIP (PLASTIC)

0.9

0.15

0.5

0.1

+ 0.

17.

19.

1.778

57.6 0.1

+ 0.4

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

42/COPPER ALLOY

SONY CODE

EIAJ CODE

JEDEC CODE

SDIP-64P-01

P-SDIP64-17.1x57.6-1.778

SOLDER PLATING

8.6g

+ 0.

0° to 15°

PACKAGE STRUCTURE

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

Package Outline

Unit: mm

SONY CODE

EIAJ CODE

JEDEC CODE

23.9

0.4

20.0 0.1

0.4 0.1

+ 0.15

14.

0.15 0.05

+ 0.1

2.75 0.15

16.

0.1 0.05

+ 0.2

0.2

0.15

+ 0.4

17.9

0.4

+ 0.

+ 0.35

64PIN QFP (PLASTIC)

QFP-64P-L01

P-QFP64-14x20-1.0

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

SOLDER PLATING

42/COPPER ALLOY

PACKAGE STRUCTURE

1.5g

1.0

to10

SONY CODE

EIAJ CODE

JEDEC CODE

23.9

0.4

20.0 0.1

0.4 0.1

+ 0.15

14.

0.15 0.05

+ 0.1

2.75 0.15

16.

0.1 0.05

+ 0.2

0.2

0.15

+ 0.4

17.9

0.4

+ 0.

+ 0.35

64PIN QFP (PLASTIC)

QFP-64P-L01

P-QFP64-14x20-1.0

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

SOLDER PLATING

42/COPPER ALLOY

PACKAGE STRUCTURE

1.5g

1.0

to10

LEAD SPECIFICATIONS

ITEM

LEAD MATERIAL

ALLOY 42

LEAD TREATMENT

Sn-Bi 2.5%

LEAD TREATMENT THICKNESS

5-18

SPEC.

CXP86212/86216, CXP86324/86332, CXP86440/86448/86460

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

42/COPPER ALLOY

PACKAGE STRUCTURE

12.0

0.2

10.0

0.1

(0.22)

0.1

0.5

0.2

0° to 10°

64PIN LQFP (PLASTIC)

LQFP-64P-L01

P-LQFP64-10x10-0.5

0.3g

DETAIL A

0.5

0.2

(11.0)

1.5 0.1

+ 0.2

0.1

SOLDER PLATING

NOTE: Dimension "

" does not include mold protrusion.

0.13 M

0.5

b = 0.18 0.03

( 0.18 )

(0.127)

+ 0.08

0.127

0.02

+ 0.05

DETAIL B: SOLDER

Package Outline

Unit: mm

Sony Corporation

SONY CODE

EIAJ CODE

JEDEC CODE

PACKAGE MATERIAL

LEAD TREATMENT

LEAD MATERIAL

PACKAGE MASS

EPOXY RESIN

42/COPPER ALLOY

PACKAGE STRUCTURE

12.0

0.2

10.0

0.1

(0.22)

0.1

0.5

0.2

0° to 10°

64PIN LQFP (PLASTIC)

LQFP-64P-L01

P-LQFP64-10x10-0.5

0.3g

DETAIL A

0.5

0.2

(11.0)

1.5 0.1

+ 0.2

0.1

SOLDER PLATING

NOTE: Dimension "

" does not include mold protrusion.

0.13 M

0.5

b = 0.18 0.03

( 0.18 )

(0.127)

+ 0.08

0.127

0.02

+ 0.05

DETAIL B: SOLDER

LEAD SPECIFICATIONS

ITEM

LEAD MATERIAL

ALLOY 42

LEAD TREATMENT

Sn-Bi 2.5%

LEAD TREATMENT THICKNESS

5-18

SPEC.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: CXP86212/86216

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: CXP86212/86216