4/04

The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. Some content is reproduced from the CompactFlash

Specification (2.0) by permission of the CompactFlash Association. Other content is reproduced from the ATA/ATAPI-6 (T13/1410D revision 3b) spec-

ification by permission of the National Committee for Information Technology Standards. These specifications are subject to change without notice.

Advance Information

FEATURES:

Industry Standard ATA/IDE Bus Interface

Host Interface: 8- or 16-bit access
Supports up to PIO Mode-4
Supports up to Multi-word DMA Mode-2

Interface for standard NAND Flash Media

Flash Media Interface: 8-bit or 16-bit access

- Supports up to 8 flash media devices directly
- Supports up to 255 flash media devices with

external decoding logic

Supports Single-Level Cell (SLC) and

Multi-Level Cell (MLC) flash media

Low power, 3.3V core operation

5.0V or 3.3V host interface through V

DDQ

pins

Low current operation:

Active mode: 25 mA/35 mA (3.3V/5.0V) (typical)
Sleep mode: 40 µA/50 µA (3.3V/5.0V) (typical)

Power Management Unit

Immediate disabling of unused circuitry

Expanded Data Protection

WP_PD# pin configurable by firmware for

prevention of data overwrites

Added data security through user-selectable

protection zones

20-byte Unique ID for Enhanced Security

Factory Pre-programmed 10-byte Unique ID
User-Programmable 10-byte ID

Pre-programmed Embedded Firmware

Performs self-initialization on first system Power-on
Executes industry standard ATA/IDE commands
Implements dynamic wear-leveling algorithms to

substantially increase the longevity of flash media

Embedded Flash File System
Built-in ECC corrects up to 3 random 12-bit

symbols of error per 512-byte sector

Internal or External System Clock Option

Multi-tasking Technology enables Fast
Sustained Write Performance (Host to Flash)

SST55LD019A supports up to 6 MB/sec
SST55LD019B/C support up to 10MB/sec

Fast Sustained Read Performance (Flash to Host)

Up to 10 MB/sec

Automatic Recognition and Initialization of
Flash Media Devices

Seamless integration into a standard SMT

manufacturing process

0.5 sec/MB (typical) for flash drive recognition

and setup

Commercial and Industrial Temperature Ranges

0°C to 70°C for commercial operation
-40°C to +85°C for industrial operation

Packages Available

100-lead TQFP
84-ball TFBGA
64-lead TQFP (reduced function)

PRODUCT DESCRIPTION

SST's ATA Flash Disk Controller is the heart of a high-
performance, flash media-based data storage system.
The ATA Flash Disk Controller recognizes the control,
address, and data signals on the ATA/IDE bus and trans-
lates them into memory accesses to the standard NAND-
type flash media. The SST55LD019A/B/C device sup-
ports both Single Level Cell (SLC) and Multi-Level Cell
(MLC) flash media. This technology suits solid state
mass storage applications offering new, expanded func-
tionality while enabling smaller, lighter designs with lower
power consumption.

The ATA/IDE interface is widely used in such products as
portable and desktop computers, digital cameras, music
players, handheld data collection scanners, PDAs, handy
terminals, personal communicators, audio recorders, moni-
toring devices, and set-top boxes. SST's ATA Flash Disk
Controller supports standard ATA/IDE protocol with up to
PIO Mode-4 and Multi-word DMA Mode-2 interface.

Utilizing SST's proprietary SuperFlash memory technology,
the ATA Flash Disk Controller is factory pre-programmed
with an embedded flash file system which, upon initial
Power-on, recognizes the attached flash media devices,
sets up a bad block table, executes all necessary hand-
shaking routines for flash media support, and, finally, per-
forms the low-level format. This process typically takes
about 0.5 sec/MB of drive capacity, allowing a 640 MByte
flash drive to be fully initialized in about 5 minutes.

This technology enables a very fast, completely seam-
less integration of flash drives into an embedded design.
For added manufacturing flexibility, system debug, re-ini-
tialization, and user customization can be accomplished
either through the ATA/IDE interface, for ATA Disk Module
or flash drive products, or through the Serial Communi-
cation Interface (SCI), for fully embedded ATA Flash Disk
Controller designs.

ATA Flash Disk Controller

SST55LD019A / SST55LD019B / SST55LD019C

SST55LD019A/B/CHigh-Performance ATA Flash Disk Controller

Advance Information

ATA Flash Disk Controller

SST55LD019A / SST55LD019B / SST55LD019C

S71241-02-000

4/04

The SST55LD019A/B/C high-performance ATA Flash
Disk Controller offers sustained write performance up to
10.0 MB/sec. The SST55LD019A controller is to be used
when the random access performance needs to be maxi-
mized. The SST55LD019B controller is to be used when
the sequential access performance needs to be maxi-
mized. The SST55LD019C controller is to be used when
the flash drive capacity and sequential access perfor-
mance need to be maximized. The SST55LD019A/B/C
can directly support up to 8 flash media devices or,
through simple decoding logic, can support up to 255
flash media devices. Users can select either an internal
or external system clock option for optimal performance vs.
the supply current.

The SST55LD019A/B/C offers added security protection
for confidential information stored in the flash media. It
allows up to four protection zones which can be set by the

user to be Read-only or Hidden (Read-disabled). The ATA
Flash Disk Controller can access the data within the pro-
tected zones through a password-protected command.
The controller also provides a WP_PD# pin to protect criti-
cal information stored in the flash media from unauthorized
overwrites.

The ATA Flash Disk Controller comes pre-programmed
with a 10-byte unique serial ID. For even greater system
security, the user has the option of programming an addi-
tional 10 Bytes of ID space to create a unique, 20-byte ID.

The ATA Flash Disk Controller comes packaged in an
industry-standard, 100-lead TQFP package, an 84-ball
TFBGA package, or a 64-lead TQFP package (reduced
function) for easy integration into an SMT manufacturing
process.

TABLE OF CONTENTS

PRODUCT DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

LIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

LIST OF TABLES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.0 GENERAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.0 FUNCTIONAL BLOCKS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

3.0 PIN ASSIGNMENTS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.0 CAPACITY SPECIFICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

4.1 Functional Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

5.0 MANUFACTURING SUPPORT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.1 ATA/IDE Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5.2 Serial Communication Interface (SCI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

6.0 EXTERNAL CLOCK INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

7.0 SECURITY FEATURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8.0 CONFIGURABLE WRITE PROTECT/POWER-DOWN MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8.1 Write Protect Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

8.2 Power-down Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

9.0 POWER-ON AND BROWN-OUT RESET CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Advance Information

ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C

S71241-02-000

4/04

10.0 I/O TRANSFER FUNCTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

11.0 SOFTWARE INTERFACE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

11.1 ATA Flash Disk Controller Drive Register Set Definitions and Protocol. . . . . . . . . . . . . . . . . . . . . . . . 17

11.2 ATA Flash Disk Controller Command Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

12.0 ELECTRICAL SPECIFICATIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

12.1 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

12.2 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

13.0 APPENDIX . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72

13.1 Differences between SST's ATA Flash Disk Controller and ATA/ATAPI-5 Specifications. . . . . . . . . . 72

14.0 PRODUCT ORDERING INFORMATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73

15.0 PACKAGING DIAGRAM. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74

LIST OF FIGURES

FIGURE 2-1: ATA Flash Disk Controller Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

FIGURE 3-1: Pin Assignments for 100-lead TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

FIGURE 3-2: Pin Assignments for 84-ball TFBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

FIGURE 3-3: Pin Assignments for 64-lead TQFP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

FIGURE 9-1: Power-on and Brown-out Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

FIGURE 12-1: AC Input/Output Reference Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

FIGURE 12-2: Host Side Interface I/O Read Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

FIGURE 12-3: Host Side Interface I/O Write Timing Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

FIGURE 12-4: Initiating a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

FIGURE 12-5: Sustaining a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

FIGURE 12-6: Device Terminates a Multi-word DMA Data Transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

FIGURE 12-7: Host Terminates a Multi-word DMA Data Transfer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

FIGURE 12-8: Media Command Latch Cycle. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

FIGURE 12-9: Media Address Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70

FIGURE 12-10: Media Data Loading Latch Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

FIGURE 12-11: Media Data Read Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

Advance Information

ATA Flash Disk Controller

SST55LD019A / SST55LD019B / SST55LD019C

S71241-02-000

4/04

LIST OF TABLES

TABLE 3-1: Pin Assignments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

TABLE 4-1: Default ATA Flash Drive Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

TABLE 4-2: Functional Specification of SST55LD019A/B/C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

TABLE 9-1: Power-on and Brown-out Reset Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

TABLE 10-1: I/O Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

TABLE 11-1: Task File Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

TABLE 11-2: ATA Flash Disk Controller Command Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

TABLE 11-3: Diagnostic Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

TABLE 11-4: Identify-Drive Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

TABLE 11-5: Extended Error Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

TABLE 11-6: Security Password Data Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

TABLE 11-7: Security Password Data Content . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

TABLE 11-8: Identifier and Security Level Bit Interaction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

TABLE 11-9: Features Supported . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45

TABLE 11-10: Advanced Power Management Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

TABLE 11-11: Transfer Mode Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

TABLE 11-12: Set-Max Features register values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

TABLE 11-13: Set-Max-Set-Password Data Content. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

TABLE 11-14: Translate Sector Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

TABLE 11-15: Error and Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

TABLE 12-1: Absolute Maximum Power Pin Stress Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

TABLE 12-2: Recommended System Power-on Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

TABLE 12-3: Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

TABLE 12-4: Reliability Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

TABLE 12-5: DC Characteristics for Media Interface. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

TABLE 12-6: DC Characteristics for Host Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64

TABLE 12-7: Host Side Interface I/O Read Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

TABLE 12-8: Host Side Interface I/O Write Timing Specification. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

TABLE 12-9: Multi-word DMA Timing Parameters - Mode 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67

TABLE 12-10: SST55LD019A/B/C Timing Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69

TABLE 15-1: Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76

Advance Information

ATA Flash Disk Controller
SST55LD019A / SST55LD019B / SST55LD019C

S71241-02-000

4/04

1.0 GENERAL DESCRIPTION

The ATA Flash Disk Controller contains a microcontroller
and embedded flash file system integrated in TQFP and
TFBGA packages. Refer to Figure 2-1 for the ATA Flash
Disk Controller block diagram. The controller interfaces with
the host system allowing data to be written to and read
from the flash media.

1.1 Performance-optimized ATA Flash Disk
Controller

The heart of the flash drive is the ATA Flash Disk Controller
which translates standard ATA signals into flash media data
and control signals. The following components contribute to
the ATA Flash Disk Controller's operation.

1.1.1 Microcontroller Unit (MCU)

The MCU translates ATA/IDE commands into data and
control signals required for flash media operation.

1.1.2 Internal Direct Memory Access (DMA)

The ATA Flash Disk Controller uses internal DMA allowing
instant data transfer from buffer to flash media. This imple-
mentation eliminates microcontroller overhead associated
with the traditional, firmware-based approach, thereby
increasing the data transfer rate.

1.1.3 Power Management Unit (PMU)

The power management unit controls the power consump-
tion of the ATA Flash Disk Controller. The PMU dramatically
reduces the power consumption of the ATA Flash Disk
Controller by putting the part of the circuitry that is not in
operation into sleep mode.

1.1.4 SRAM Buffer

A key contributor to the ATA Flash Disk Controller perfor-
mance is an SRAM buffer. The buffer optimizes the host's
data transfer to and from the flash media.

1.1.5 Embedded Flash File System

The embedded flash file system is an integral part of the
ATA Flash Disk Controller. It contains MCU firmware that
performs the following tasks:

1. Translates host side signals into flash media

writes and reads.

2. Provides dynamic flash media wear leveling to

spread the flash writes across all unused memory
address space to increase the longevity of flash
media.

3. Keeps track of data file structures.

4. Manages system security for the selected

protection zones.

1.1.6 Error Correction Code (ECC)

The ATA Flash Disk Controller utilizes 72-bit Reed-
Solomon Error Detection Code (EDC) and Error Correc-
tion Code (ECC), which provides the following error
immunity for each 512-byte block of data:

1. Corrects up to three random 12-bit symbol errors.

2. Corrects single bursts up to 25 bits.

3. Detects single bursts up to 61 bits and double

bursts up to 15 bits.

4. Detects up to six random 12-bit symbol errors.

1.1.7 Serial Communication Interface (SCI)

The Serial Communication Interface (SCI) is designed to
enable the user to restart the self-initialization process and
to customize the drive identification information.

1.1.8 Multi-tasking Interface

The multi-tasking interface enables fast, sustained write
performance by allowing concurrent Read, Program, and
Erase operations to multiple flash media devices.

Ð­Ð»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SST55LD019A-45-C-TQWE

ÐÐ»ÐµÐºÑ‚Ñ€Ð¾Ð½Ð½Ñ‹Ð¹ ÐºÐ¾Ð¼Ð¿Ð¾Ð½ÐµÐ½Ñ‚: SST55LD019A-45-C-TQWE