LCD Controller
1 /24
Issue date: 13 August, 1999
Syntek Semiconductor Co., Ltd.
STK55C324
Specification
1. FEATURES :
* Operating voltage : 2.5V 5.5 V.
* Maximum CPU operating frequency : 2MHz at 2.7V
* Dual oscillators :
- RC or 32.768 KHz crystal oscillator for LCD display and watch timer.
- RC oscillator for system clock.
* 40 segments and 8 commons output for LCD driver.
- 1/4 bias, 1/8 duty and 64Hz frame frequency.
- 16 levels contrast control.
* I/O port.
- 8 I/O pins with selectable wake up interrupt.
- Two output pins. These two pins can be set as sound channel DAC outputs.
* Built in 160 bytes data RAM and 40 bytes display RAM.
* Built in 32K bytes ROM for program.
* One 8-bit timer with 8 predefined input clock.
* Two sound generators with 7-bit D/A output.
* Four interrupt sources :
NMI - 64 Hz interrupt
IRQ1 - Fix-time timer interrupt
IRQ2 - Timer interrupt
IRQ3 - External interrupt
* Code option :
-
Built-in 150K OHM pull-up resistors for I/O port.
-
RC or 32768Hz crystal oscillation for LCD driver.
2. APPLICATION :
* Calculator
* Hand-held game
* Small instrument
* Toy
LCD Controller
2 /24
Issue date: 13 August, 1999
Syntek Semiconductor Co., Ltd.
STK55C324
3. BLOCK DIAGRAM :
A0-A15
IRQ
D0-D7
P10-P17
SOUND1
SOUND2
8-bit CPU
Address
decoder
ROM
32Kx8
RAM
160x8
Clock
Generator
LCD driver with
4-bit contrast
control
8-bit Timer
Port 1
Two sound generator
with 7-bit D/A
RC oscillator
32768Hz
C0-C7
S0-S39
OSC1
OSC2
LCD RAM
40x8
CONTRAST
LCD Controller
3 /24
Issue date: 13 August, 1999
Syntek Semiconductor Co., Ltd.
STK55C324
4. PIN DESCRIPTION :
(Total 66 pads)
Pin name
I/O
Function description
COM0-COM7
O
LCD common output pins
SEG0-SEG39
O
LCD segment output pins
P10-P17
I/O
8-bit I/O pins for port 1
OSC1
I
Main system oscillator input pin for chip
OSC2
O
Main system oscillator output pin for resistor
XOSC1
I
32.768K Hz crystal oscillator input
XOSC2
O
32.768K Hz crystal oscillator output
SOUND1
O
Sound channel 1 output with volume control. This pin is
CMOS output when sound channel is disabled.
SOUND2
O
Sound channel 2 output with volume control. This pin is
CMOS output when sound channel is disabled.
/RES
I
System reset pin with 150K pull-up resistor.
CONTRAST
I
Bias voltage input pin. Add a resistor to Vdd can
change the LCD contrast.
VDD
Power input
VSS
Signal ground
5. ADDRESS ARRANGEMENT
1) RAM
0000-003C for LCD output data storage. The memory address which are not specified in the table are
not implemented
Memory address
Pin for 1/8 duty
0000-0004
COM0
0008-000C
COM1
0010-0014
COM2
0018-001C
COM3
0020-0024
COM4
0028-002C
COM5
0030-0034
COM6
0038-003C
COM7
The LSB of low byte SEG0.
The MSB of high byte SEG39.
LCD Controller
4 /24
Issue date: 13 August, 1999
Syntek Semiconductor Co., Ltd.
STK55C324
The middle bits are in the order.
0040-00DF for zero page area.
0100-01DF for stacks. This area is overlapped with 0000-00DF.
2) ROM
8000-FFFF for program area.
FFFF, FFFE - IRQ vector.
FFFD, FFFC - RES vector.
FFFB, FFFA - NMI vector.
3) Others
1000 To enter stand-by mode. Write only.
* Write this address, the CPU will be hold with LCD state no change.
* When in stand-by mode, the NMI and IRQ will wake up the CPU.
1001 To enter sleep mode. Write only.
Bit 0 = 1 Sleep mode 1
1 = 1 Sleep mode 2
In sleep mode 1, both of the main system oscillator and 32.768KHz sub-system oscillator will be
stopped. So, all functions are stopped and only external interrupt can wake up this chip. The LCD
display will be turn off while getting into sleep mode 1. If the LCD is turned on after wake-up
immediately, then some garbage may display on the LCD. It is better to turn off the LCD by software
before enter sleep mode 1. After wake up, the software has to delay several ms before turn on the
LCD because the crystal will take several mS to stable.
In sleep mode 2, only main system oscillator will be stopped. So, the following functions will still keep
working.
* The LCD will be kept on.
* The fix-time timer will keep going.
* The NMI, port 1, and fix-time timer interrupt will wake up this chip.
* CPU will keep working if clock source is 32.768K Hz.
1002 Watch timer control register. Write only.
Bit 1 : = 0 Set fix-time timer interrupt at 2 Hz
= 1 Set fix-time timer interrupt at 1 Hz
LCD Controller
5 /24
Issue date: 13 August, 1999
Syntek Semiconductor Co., Ltd.
STK55C324
4 : = 0 CPU clock is system clock.
= 1 CPU clock is 32.768K Hz.
7-5 : Reserved.
The default values for each bit is zero.
1003 IRQ flag register. Read & write.
Read function :
Bit 0 : = 1 Fix-time timer interrupt, IRQ1.
1 : = 1 Timer interrupt, IRQ2.
2 : = 1 External interrupt, IRQ3.
Write function :
Bit 0 : = 0 Clear fix-time timer interrupt.
1 : = 0 Clear timer interrupt.
2 : = 0 Clear external interrupt.
* Before firmware exits the interrupt routine, the interrupt flag must be cleared. Otherwise, the IC will
get into interrupt again.
* Write 0 to clear the corresponding IRQ but do not use `STZ $1003' to clear all interrupts at the
same time. Following instructions are recommended
LDA
$1003
STA
IRQBuff
EOR
#0FFH
STA
$1003
;Clear all active interrupts at the same time
LDA
IRQBuff
AND
#1
BEQ
next_irq
* Do NOT use TRB to test and clear this register. Following instructions are recommended.
LDA
$1003
AND
#1
;Check IRQ 1
BEQ
next_irq
STA
$1003
;Clear the active interrupt.
1004 Port 1 data. Read & write.
1005 Set port 1 bit function. Write only.
* An '1' in this register will set the corresponding pin of port 1 as an output pin.
* The default values for each bit is zero. A pull-up resistor can be added to the pin by code option.
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