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Электронный компонент: 74AC163

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74AC163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
December 1998
s
HIGH SPEED:
f
MAX
=200 MHz (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 4
A (MAX.) at T
A
= 25
o
C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 163
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The
AC163
is
a
high-speed
CMOS
SYNCRONOUS
PRESETTABLE
COUNTERS
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology. It is
ideal for low power applications mantaining high
speed operation similar to eqivalent Bipolar
Schottky TTL. It is a 4 bit binary counter with
Synchronous Clear.
The circuits have four fundamental modes of
operation, in order of preference: synchronous
reset, parallel load, count-up and hold. Four
control inputs, Master Reset (CLEAR), Parallel
Enable Input (LOAD), Count Enable Input (PE)
and Count Enable Carry Input (TE), determine
the mode of operation as shown in the Truth
Table. A LOW signal on CLEAR overrides
counting and parallel loading and allows all
output to go LOW on the next rising
edge of
CLOCK. A LOW signal on LOAD overrides
counting and allows information on Parallel Data
Qn inputs to be loaded into the flip-flops on the
next rising edge of CLOCK. With LOAD and
CLEAR, PE and TE permit counting when both
are HIGH. Conversely, a LOW signal on either
PE and TE inhibits counting.
All inputs
and
outputs are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
M
(Micro Package)
B
(Plastic Package)
ORDER CODES :
74AC163B
74AC163M
1/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
LOGIC DIAGRAMS
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND FUNCT ION
1
CLEAR
Master Reset
2
CLOCK
Clock Input (LOW-to-HIGH,
Edge- Triggered)
3, 4, 5, 6
A, B, C, D
Data Inputs
7
ENABLE P Count Enable Input
10
ENABLE T
Count Enable Carry Input
9
LOAD
Parallel Enable Input
14, 13, 12,
11
QA to QD
Flip-Flop Outpus
10
ENABLE T
Count Enable Carry Input
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
TRUTH TABLE
INPUT S
O UT PUT S
FUNCT ION
CLR
LD
PE
T E
CK
QA
QB
QC
QD
L
X
X
X
L
L
L
L
RESET TO "0"
H
L
X
X
A
B
C
D
PRESET DATA
H
H
X
L
NO CHANGE
NO COUNT
H
H
L
X
NO CHANGE
NO COUNT
H
H
H
H
COUNT UP
COUNT
X
X
X
X
NO CHANGE
NO COUNT
NOTE:
X:Don't Care
A,B, C,D: Logic level of data input
CARRY=TE
QA
QB
QC
QD
74AC163
2/12
TIMING CHART
74AC163
3/12
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current
300
mA
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Valu e
Uni t
V
CC
Supply Voltage
2 to 6
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature:
-40 to +85
o
C
dt/dv
Input Rise and Fall Time V
CC
= 3.0, 4.5 or 5.5 V(note 1)
8
ns/V
1) V
IN
from 30% to70%of V
CC
74AC163
4/12
DC SPECIFICATIONS
Symb ol
Parameter
Test Co nditi ons
Valu e
Un it
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Min.
T yp.
Max.
Mi n.
Max.
V
IH
High Level Input Voltage
3.0
V
O
= 0.1 V or
V
CC
- 0.1 V
2.1
1.5
2.1
V
4.5
3.15
2.25
3.15
5.5
3.85
2.75
3.85
V
IL
Low Level Input Voltage
3.0
V
O
= 0.1 V or
V
CC
- 0.1 V
1.5
0.9
0.9
V
4.5
2.25
1.35
1.35
5.5
2.75
1.65
1.65
V
OH
High Level Output Voltage
3.0
V
I
(* )
=
V
IH
or
V
IL
I
O
=-50
A
2.9
2.99
2.9
V
4.5
I
O
=-50
A
4.4
4.49
4.4
5.5
I
O
=-50
A
5.4
5.49
5.4
3.0
I
O
=-12 mA
2.56
2.46
4.5
I
O
=-24 mA
3.86
3.76
5.5
I
O
=-24 mA
4.86
4.76
V
OL
Low Level Output Voltage
3.0
V
I
(* )
=
V
IH
or
V
IL
I
O
=50
A
0.002
0.1
0.1
V
4.5
I
O
=50
A
0.001
0.1
0.1
5.5
I
O
=50
A
0.001
0.1
0.1
3.0
I
O
=12 mA
0.36
0.44
4.5
I
O
=24 mA
0.36
0.44
5.5
I
O
=24 mA
0.36
0.44
I
I
Input Leakage Current
5.5
V
I
= V
CC
or GND
0.1
1
A
I
CC
Quiescent Supply Current
5.5
V
I
= V
CC
or GND
4
40
A
I
OLD
Dynamic Output Current
(note 1, 2)
5.5
V
OLD
= 1.65 V max
75
mA
I
OHD
V
OHD
= 3.85 V min
-75
mA
1) Maximum test duration 2ms, one output loaded attime
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
.
(*) All outputs loaded.
74AC163
5/12