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Электронный компонент: 74ACT299M

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74ACT299
8 BIT PIPO SHIFT REGISTER
WITH ASYNCHRONOUS CLEAR
PRELIMINARY DATA
April 1999
s
HIGH SPEED:
f
MAX
= 170 MHz (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 8
A (MAX.) at T
A
= 25
o
C
s
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 299
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT299 is an high-speed CMOS 8-BIT PIPO
SHIFT REGISTERS (3-STATE) fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power
applications
mantaining
high
speed
operation similar to equivalent Bipolar Schottky
TTL.
These devices have four modes (HOLD, SHIFT
LEFT, SHIFT RIGHT and LOAD DATA). Each
mode is chosen by two function select inputs (S0,
S1) as shown in the Truth Table.
When one or both enable inputs, (G1, G2) are
high, the eight input/output terminals are in
the high-impedance state ; however sequential
operation or clearing of the register is not
affected. Clear function is synchronous to clock.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs
and
outputs are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
M
(Micro Package)
B
(Plastic Package)
ORDER CODES :
74ACT299B
74ACT299M
1/13
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PIN No
SYMBOL
NAME AND F UNCTION
1, 19
S0, S1
Mode Select Inputs
2, 3
G1, G2
3 State Output Enable Inputs (Active LOW)
7, 13, 6, 14, 5, 15, 4, 16
A/QA to H/QH
Parallel Data Inputs or 3 State Parallel Outputs (Bus Driver)
8, 17
QA' to QH'
Serial Outputs (Standard Output)
9
CLEAR
Asynchronous Master Reset Input (Active LOW)
11
SR
Serial Data Shift Right Input
12
CLOCK
Clock Input (LOW to HIGH, Edge-triggered)
18
SL
Serial Data Shift Left Input
10
GND
Ground (0V)
20
V
CC
Positive Supply Voltage
TRUTH TABLE
MO DE
INPUTS
I NPUTS/ OUTPUTS
O UT PUT S
CLEAR
F UNCTIO N
SELECTED
OUTPUT
CONTRO L
CLO CK
SERI AL
A/Q A
H/Q H
QA'
QH'
S1
S0
G1*
G2*
SL
SR
Z
L
H
H
X
X
X
X
X
Z
Z
L
L
CLEAR
L
L
X
L
L
X
X
X
L
L
L
L
L
X
L
L
L
X
X
X
L
L
L
L
HOLD
H
L
L
L
L
X
X
X
QA0
QH0
QA0
QH0
SHIFT
RIGHT
H
L
H
L
L
X
H
H
QGn
H
QGn
H
L
H
L
L
X
L
L
QGn
L
QGn
SHIFT
LEFT
H
H
L
L
L
H
X
QBn
H
QBn
H
H
H
L
L
L
L
X
QBn
L
QBn
L
LOAD
H
H
H
X
X
X
X
a
h
a
h
* When one or both output controls are high, the eight, input/output terminals arethe high impedanc e state: howewer sequential operation or clearing of
the register is not affected.
Z
: HIGH IMPEDANCE
Qn0 : THE LEVELOF An BEFORE THE INDICATED STEADYSTATEINPUTCONDITIONS WERE ESTABLISED.
Qnn : THE LEVELOF Qn BEFORETHE MOST RECENTACTIVETRANSITIONINDICATEDBY OR
a,h : THE LEVELOF THE STEADYSTATEINPUTSA, H, RESPECTIVELY.
X
: DON'T CARE
74ACT299
2/13
LOGIC DIAGRAM
74ACT299
3/13
TIMING CHART
74ACT299
4/13
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Unit
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current
400
mA
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature:
-40 to +85
o
C
dt/dv
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
8
ns/V
1) V
IN
from 0.8 V to 2.0 V
74ACT299
5/13