74ACT373
OCTAL D-TYPE LATCH
WITH 3 STATE OUTPUT NON INVERTING
April 1997
s
HIGH SPEED: t
PD
= 6 ns (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 8
A (MAX.) at T
A
= 25
o
C
s
COMPATIBLE WITH TTL OUTPUTS
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
s
50
TRANSMISSION LINE DRIVING
CAPABILITY
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24 mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 373
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT373 is an advanced high-speed CMOS
OCTAL D-TYPE LATCH with 3 STATE OUTPUT
NON INVERTING fabricated with sub-micron
silicon gate and double-layer metal wiring C
2
MOS
technology. It is ideal for low power applications
mantaining high speed operation similar to
equivalent Bipolar Schottky TTL.
These 8 bit D-Type latch are controlled by a latch
enable input (LE) and an output enable input
(OE).
While the LE inputs is held at a high level, the Q
outputs will follow the data input precisely or
inversely. When the LE is taken low, the Q
outputs will be latched precisely or inversely at
the logic level of D input data. While the (OE)
input is low, the 8 outputs will be in a normal logic
state (high or low logic level) and while high level
the outputs will be in a high impedance state.
This device is designed to interface directly High
Speed CMOS systems with TTL and NMOS
components.
All
inputs and
outputs
are
equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES :
74ACT373B
74ACT373M
M
(Micro Package)
B
(Plastic Package)
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INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
PI N No
SYMBOL
NAME AND F UNCTIO N
1
OE
3 State Output Enable
Input (Active LOW)
2, 5, 6,
9, 12, 15,
16, 19
Q0 to Q7
Data Inputs
3, 4, 7,
8, 13, 14,
17, 18
D0 to D7
3 State Outputs
11
LE
Latch Enable
Input
10
GND
Ground (0V)
20
V
CC
Positive Supply Voltage
TRUTH TABLE
INPUT S
OUT PUT S
OE
L E
D
Q
H
X
X
Z
L
L
X
NO CHANGE *
L
H
L
L
L
H
H
H
X: DON'T CARE
Z: HIGH IMPEDANCE
*: Q OUTPUTS ARE LATCHED AT THE TIME WHEN THE LE INPUT IS TAKEN LOW LOGIC LEVEL.
LOGIC DIAGRAMS
74ACT373
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ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Uni t
V
CC
Supply Voltage
-0.5 to +7
V
V
I
DC Input Voltage
-0.5 to V
CC
+ 0.5
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
50
mA
I
CC
or I
GND
DC V
CC
or Ground Current
400
mA
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
300
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Valu e
Uni t
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to V
CC
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature:
-40 to +85
o
C
dt/dv
Input Rise and Fall Time V
CC
= 4.5 to 5.5V (note 1)
8
ns/V
1) V
IN
from 0.8 V to 2.0 V
74ACT373
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DC SPECIFICATIONS
Symbol
Parameter
Test Con dition s
Value
Unit
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Mi n.
Typ.
Max.
Min .
Max.
V
IH
High Level Input Voltage
4.5
V
O
= 0.1 V or
V
CC
- 0.1 V
2.0
1.5
2.0
V
5.5
2.0
1.5
2.0
V
IL
Low Level Input Voltage
4.5
V
O
= 0.1 V or
V
CC
- 0.1 V
1.5
0.8
0.8
V
5.5
1.5
0.8
0.8
V
OH
High Level Output
Voltage
4.5
V
I
(*)
=
V
IH
or
V
IL
I
O
=-50
A
4.4
4.49
4.4
V
5.5
I
O
=-50
A
5.4
5.49
5.4
4.5
I
O
=-24 mA
3.86
3.76
5.5
I
O
=-24 mA
4.86
4.76
V
OL
Low Level Output
Voltage
4.5
V
I
(*)
=
V
IH
or
V
IL
I
O
=50
A
0.001
0.1
0.1
V
5.5
I
O
=50 mA
0.001
0.1
0.1
4.5
I
O
=24 mA
0.36
0.44
5.5
I
O
=24 mA
0.36
0.44
I
I
Input Leakage Current
5.5
V
I
= V
CC
or GND
0.1
1
A
I
OZ
3 State Output Leakage
Current
5.5
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
0.5
5
A
I
CCT
Max I
CC
/Input
5.5
V
I
= V
CC
-2.1 V
0.6
1.5
mA
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
8
80
A
I
OLD
Dynamic Output Current
(note 1, 2)
5.5
V
OLD
= 1.65 V max
75
mA
I
OHD
V
OHD
= 3.85 V min
-75
mA
1) Maximum test duration 2ms, one output loaded at time
2) Incident wave switching is guaranteed on transmission lines with impedances as low as 50
.
(*) All outputs loaded.
74ACT373
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CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Test Con dition s
Value
Unit
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Mi n.
Typ.
Max.
Min .
Max.
C
OUT
Output Capacitance
5.0
10
pF
C
IN
Input Capacitance
5.0
5
pF
C
PD
Power Dissipation
Capacitance (note 1)
5.0
25
pF
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without load. (Refer to
Test Circuit). Average operating current can be obtained by the following equation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
/n (per circuit)
AC ELECTRICAL CHARACTERISTICS (C
L
= 50 pF, R
L
= 500
, Input t
r
= t
f
=3 ns)
Symbol
Parameter
T est Cond iti on
Value
Unit
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Mi n.
Typ.
Max.
Min .
Max.
t
PLH
t
PHL
Propagation Delay Time
LE to Q
5.0
(*)
6.0
10.0
11.5
ns
t
PLH
t
PHL
Propagation Delay Time
D to Q
5.0
(*)
5.5
10.0
11.5
ns
t
PZL
t
PZH
Output Enable Time
5.0
(*)
6.0
9.5
10.5
ns
t
PLH
t
PHL
Output Disable Time
5.0
(*)
7.0
11.0
12.5
ns
t
w
CK Pulse Width, HIGH
or LOW
5.0
(*)
1.0
7.0
8.0
ns
t
s
Setup Time Q to CK
HIGH or LOW
5.0
(*)
0.5
7.0
8.0
ns
t
h
Hold Time Q to CK
HIGH or LOW
5.0
(*)
0.5
0.0
1.0
ns
(*) Voltage range is 5V
0.5V
74ACT373
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