1/13
September 2004
s
5V TOLERANT INPUTS AND OUTPUTS
s
HIGH SPEED:
t
PD
= 6.0 ns (MAX.) at V
CC
= 3V
s
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 24mA (MIN) at V
CC
= 3V
s
PCI BUS LEVELS GUARANTEED AT 24 mA
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 257
s
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s
ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX257 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER (3-STATE) fabricated
with sub-micron silicon gate and double-layer
metal wiring C
2
MOS technology. It is ideal for low
power and high speed 3.3V applications; it can be
interfaced to 5V signal environment for both inputs
and outputs.
It is composed of four independent 2 channel
multiplexers with common SELECT and ENABLE
(OE) INPUT. The 74LCX257 is a non-inverting
multiplexer. When the ENABLE INPUT is held
"High", all outputs become in high impedance
state. If SELECT INPUT is held "Low", "A" data is
selected, when SELECT INPUT is "High", "B" data
is chosen.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LCX257
LOW VOLTAGE CMOS QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS AND OUTPUTS (3-STATE)
Figure 1: Pin Connection And IEC Logic Symbols
Table 1: Order Codes
PACKAGE
T & R
SOP
74LCX257MTR
TSSOP
74LCX257TTR
TSSOP
SOP
Rev. 4
74LCX257
2/13
Figure 2: Input And Output Equivalent Circuit
Table 2: Pin Description
Table 3: Truth Table
X : Don't Care
Z : High Impedance
PIN N
SYMBOL
NAME AND FUNCTION
1
SELECT
Common Data Select Inputs
2, 5, 11, 14
1A to 4A
Data Inputs From Source A
3, 6, 10, 13
1B to 4B
Data Inputs From Source B
4, 7, 9, 12
1Y to 4Y
3 State Multiplexer Outputs
15
OE
3 State Output Enable Inputs (Active LOW)
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
INPUTS
OUTPUT
OE
SELECT
A
B
Y
H
X
X
X
Z
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
74LCX257
3/13
Figure 3: Logic Diagram
This logic diagram has not be used to estimate propagation delays
Table 4: Absolute Maximum Ratings
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
1) I
O
absolute maximum rating must be observed
2) V
O
< GND
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage (OFF State)
-0.5 to +7.0
V
V
O
DC Output Voltage (High or Low State) (note 1)
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 50
mA
I
OK
DC Output Diode Current (note 2)
- 50
mA
I
O
DC Output Current
50
mA
I
CC
DC Supply Current per Supply Pin
100
mA
I
GND
DC Ground Current per Supply Pin
100
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
74LCX257
4/13
Table 5: Recommended Operating Conditions
1) Truth Table guaranteed: 1.5V to 3.6V
2) V
IN
from 0.8V to 2V at V
CC
= 3.0V
Table 6: DC Specifications
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage (note 1)
2.0 to 3.6
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage (OFF State)
0 to 5.5
V
V
O
Output Voltage (High or Low State)
0 to V
CC
V
I
OH
, I
OL
High or Low Level Output Current (V
CC
= 3.0 to 3.6V)
24
mA
I
OH
, I
OL
High or Low Level Output Current (V
CC
= 2.7V)
12
mA
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time (note 2)
0 to 10
ns/V
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
-40 to 85 C
-55 to 125 C
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
2.7 to 3.6
2.0
2.0
V
V
IL
Low Level Input
Voltage
0.8
0.8
V
V
OH
High Level Output
Voltage
2.7 to 3.6
I
O
=-100
A
V
CC
-0.2
V
CC
-0.2
V
2.7
I
O
=-12 mA
2.2
2.2
3.0
I
O
=-18 mA
2.4
2.4
I
O
=-24 mA
2.2
2.2
V
OL
Low Level Output
Voltage
2.7 to 3.6
I
O
=100
A
0.2
0.2
V
2.7
I
O
=12 mA
0.4
0.4
3.0
I
O
=16 mA
0.4
0.4
I
O
=24 mA
0.55
0.55
I
I
Input Leakage
Current
2.7 to 3.6
V
I
= 0 to 5.5V
5
5
A
I
off
Power Off Leakage
Current
0
V
I
or V
O
= 5.5V
10
10
A
I
OZ
High Impedance
Output Leakage
Current
2.7 to 3.6
V
I
= V
IH
or V
IL
V
O
= 0 to V
CC
5
5
A
I
CC
Quiescent Supply
Current
2.7 to 3.6
V
I
= V
CC
or GND
10
10
A
V
I
or V
O
= 3.6 to 5.5V
10
10
I
CC
I
CC
incr. per Input
2.7 to 3.6
V
IH
= V
CC
- 0.6V
500
500
A
74LCX257
5/13
Table 7: Dynamic Switching Characteristics
1) Number of outputs defined as "n". Measured with "n-1" outputs switching from HIGH to LOW or LOW to HIGH. The remaining output is
measured in the LOW state.
Table 8: AC Electrical Characteristics
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW (t
OSLH
= | t
PLHm
- t
PLHn
|, t
OSHL
= | t
PHLm
- t
PHLn
|)
2) Parameter guaranteed by design
Table 9: Capacitive Characteristics
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/4 (per
channel)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25 C
Min.
Typ.
Max.
V
OLP
Dynamic Low Level Quiet
Output (note 1)
3.3
C
L
= 50pF
V
IL
= 0V, V
IH
= 3.3V
0.8
V
V
OLV
-0.8
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
R
L
(
)
t
s
= t
r
(ns)
-40 to 85 C
-55 to 125 C
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time (A, B to Y)
2.7
50
500
2.5
1.5
6.5
1.5
6.5
ns
3.0 to 3.6
1.5
6.0
1.5
6.0
t
PLH
t
PHL
Propagation Delay
Time (SELECT to Y)
2.7
50
500
2.5
1.5
8.5
1.5
8.5
ns
3.0 to 3.6
1.5
7.0
1.5
7.0
t
PZL
t
PZH
Output Enable Time
2.7
50
500
2.5
1.5
8.5
1.5
8.5
ns
3.0 to 3.6
1.5
7.0
1.5
7.0
t
PLZ
t
PHZ
Output Disable Time
2.7
50
500
2.5
1.5
6.0
1.5
6.0
ns
3.0 to 3.6
1.5
5.5
1.5
5.5
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
3.0 to 3.6
50
500
2.5
1.0
1.0
ns
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25 C
Min.
Typ.
Max.
C
IN
Input Capacitance
3.3
V
IN
= 0 to V
CC
7
pF
C
OUT
Output Capacitance
3.3
V
IN
= 0 to V
CC
8
pF
C
PD
Power Dissipation Capacitance
(note 1)
3.3
f
IN
= 10MHz
V
IN
= 0 or V
CC
25
pF
74LCX257
6/13
Figure 4: Test Circuit
C
L
= 50 pF or equivalent (includes jig and probe capacitance)
R
L
= R1 = 500
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
Figure 5: Waveform - Propagation Delays (f=1MHz; 50% duty cycle)
TEST
SWITCH
t
PLH
, t
PHL
Open
t
PZL
, t
PLZ
6V
t
PZH
, t
PHZ
GND
74LCX257
7/13
Figure 6: Waveform - Output Enable And Disable Time (f=1MHz; 50% duty cycle)
74LCX257
8/13
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
1.75
0.068
a1
0.1
0.25
0.004
0.010
a2
1.64
0.063
b
0.35
0.46
0.013
0.018
b1
0.19
0.25
0.007
0.010
C
0.5
0.019
c1
45 (typ.)
D
9.8
10
0.385
0.393
E
5.8
6.2
0.228
0.244
e
1.27
0.050
e3
8.89
0.350
F
3.8
4.0
0.149
0.157
G
4.6
5.3
0.181
0.208
L
0.5
1.27
0.019
0.050
M
0.62
0.024
S
8 (max.)
SO-16 MECHANICAL DATA
0016020D
74LCX257
9/13
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
1.2
0.047
A1
0.05
0.15
0.002
0.004
0.006
A2
0.8
1
1.05
0.031
0.039
0.041
b
0.19
0.30
0.007
0.012
c
0.09
0.20
0.004
0.0079
D
4.9
5
5.1
0.193
0.197
0.201
E
6.2
6.4
6.6
0.244
0.252
0.260
E1
4.3
4.4
4.48
0.169
0.173
0.176
e
0.65 BSC
0.0256 BSC
K
0
8
0
8
L
0.45
0.60
0.75
0.018
0.024
0.030
TSSOP16 MECHANICAL DATA
c
E
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1
L
K
e
0080338D
74LCX257
10/13
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
330
12.992
C
12.8
13.2
0.504
0.519
D
20.2
0.795
N
60
2.362
T
22.4
0.882
Ao
6.45
6.65
0.254
0.262
Bo
10.3
10.5
0.406
0.414
Ko
2.1
2.3
0.082
0.090
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
Tape & Reel SO-16 MECHANICAL DATA
74LCX257
11/13
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
330
12.992
C
12.8
13.2
0.504
0.519
D
20.2
0.795
N
60
2.362
T
22.4
0.882
Ao
6.7
6.9
0.264
0.272
Bo
5.3
5.5
0.209
0.217
Ko
1.6
1.8
0.063
0.071
Po
3.9
4.1
0.153
0.161
P
7.9
8.1
0.311
0.319
Tape & Reel TSSOP16 MECHANICAL DATA
74LCX257
12/13
Table 10: Revision History
Date
Revision
Description of Changes
15-Sep-2004
4
Ordering Codes Revision - pag. 1.
74LCX257
13/13
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
All other names are the property of their respective owners
2004 STMicroelectronics - All Rights Reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
PDF 
ZIP