1/12
July 2003
s
HIGH SPEED:
t
PD
= 3.2ns (MAX.) at T
A
= 85C V
CC
= 3.0V
s
LOW POWER DISSIPATION HIGH LEVEL
OUTPUT: I
CC
= 190
A (MAX.) at T
A
= 85C
s
OUTPUT IMPEDANCE:
|I
OH
| = 32mA, I
OL
= 64mA (MIN at V
CC
= 3.0V)
|I
OH
| = 8mA, I
OL
= 24mA (MIN at V
CC
= 2.7V)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN),V
IL
= 0.8V(MAX) at
V
CC
= 2.7 to 3.6V
s
POWER-UP/DOWN 3-STATE: I
OZPU
= 100
A
MAX at V
CC
= 0V to 1.5V, V
CC
= 1.5V to 0V, T
A
= 85C
s
BUS HOLD PROVIDED ON DATA INPUTS
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2.7V to 3.6V
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES H16244
s
LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
DESCRIPTION
The 74LVTH16244 is a low voltage BiCMOS 16
BIT BUS BUFFER (NON-INVERTED) fabricated
with sub-micron silicon gate and five-layer metal
wiring BiCMOS technology. It is ideal and full
specified for hot-insertion and high speed 3.3V ap-
plications; the power-up/down 3-state circuitry
places the outputs in the high impedance state
during power-up/down, which prevents driver con-
flict. This function is guaranteed when V
CC
is be-
tween 0 and 1.5V. It can be interfaced to 3.3V sig-
nal environment for both inputs and outputs. Any
nG output control governs four BUS BUFFERS.
Output Enable input (nG) tied together gives full
16-bit operation. When nG is LOW, the outputs
are on. When nG is HIGH, the output are in high
impedance state effectively isolated. Bus hold on
data inputs is provided in order to eliminate the
need for external pull-up or pull-down resistors.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
ESD immunity and transient excess voltage.
74LVTH16244
LOW VOLTAGE BICMOS 16 BIT BUS BUFFER
WITH BUS HOLD AND POWER UP 3-STATE
This is preliminary information on a new product now in development are or undergoing evaluation. Details subject to change without notice.
ORDER CODES
PACKAGE
T & R
TSSOP48
74LVTH16244TTR
TFBGA54
74LVTH16244LBR
TSSOP
TFBGA
PRELIMINARY DATA
LOGIC DIAGRAM
74LVTH16244
2/12
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TFBGA PIN N
o
TSSOP PIN N
o
SYMBOL
NAME AND FUNCTION
A3, J3
1, 24
1G, 4G
Output Enable Inputs
A6, B5, B6, C5, C6, D5, D6, E5, E6,
F5, F6, G5, G6, H5, H6, J6
47, 46, 44, 43, 41, 40, 38, 37,
36, 35, 33, 32, 30, 29, 27, 26
1A1-4,2A1-4
3A1-4, 4A1-4
Data Inputs
A1, B2, B1, C2, C1, D2, D1, E2, E1,
F2, F1, G2, G1, H2, H1, J1
2, 3, 5, 6, 8, 9, 11, 12,
13, 14, 16, 17, 19, 20, 22, 23
1Y1-4,2Y1-4
3Y1-4, 4Y1-4
Data Outputs
J4, A4
25, 48
3G, 2G
Output Enable Inputs
D3, D4, E3, E4, F3, F4
4, 10, 15, 21, 28, 34, 39, 45
GND
Ground (0V)
A2, A5, B3, B4, H3, H4, J2, J5
-
NC
No Connected
C4, G4, C3, G3
42, 31, 7, 18
V
CC
Positive Supply Voltage
74LVTH16244
4/12
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
(*) 500mW:
65C derated to 300mW by 10mW/C: 65C to 85C
RECOMMENDED OPERATING CONDITIONS
1) V
I
from 0.8V to 2.0V at V
CC
=2.7V to 3.6V
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +4.6
V
V
I
DC Input Voltage
-0.5 to +4.6
V
V
O
DC Output Voltage (Output disabled)
-0.5 to +4.6
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
-
50
mA
I
OK
DC Output Diode Current
-
50
mA
I
O
DC Output Current low state
128
mA
I
O
DC Output Current high state
64
mA
I
CC
DC V
CC
or Ground Current
100
mA
P
d
Power Dissipation (*)
400
mW
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
2.7 to 3.6
V
V
I
Input Voltage (An, nG)
0 to 3.6
V
V
O
Output Voltage
V
CC
V
V
O
Output Voltage (Output Disabled)
3.6
V
T
op
Operating Temperature
-40 to 85
C
dt/dV
CC
Minimum Power-up ramp rate
200
s/V
dt/dv
Input Rise and Fall Time (note 1)
0 to 20
ns/V
74LVTH16244
5/12
DC SPECIFICATIONS
(*) Power Supply Range V
CC
= 3.30.3V
Symbol
Parameter
Test Condition
Value
Unit
V
CC(*)
(V)
T
A
= 25 C
-40 to 85 C
Min.
Typ.
Max.
Min.
Max.
V
IK
Input Voltage Clamp
(An, nG)
2.7
I
IK
= -18mA
-0.85
-1.2
V
V
IH
High Level Input Voltage
(An, nG)
2.7
2.0
2.0
V
3.3
2.0
2.0
V
IL
Low Level Input Voltage
(An, nG)
2.7
0.8
0.8
V
3.3
0.8
0.8
I
I
Control Input Leakage
Current
3.6
V
I
= GND or V
CC
1
A
Data Input Leakage
Current
3.6
V
I
= GND or V
CC
nG = GND
1
A
I
I(HOLD)
Data Input Hold Current
3.0
V
I
= 0.8V
135
75
A
3.0
V
I
= 2.0V
-135
-75
3.6
V
I
= 0 to 3.6V
500
A
V
OHA
High Level Output
Voltage
2.7
I
O
= -100
A
2.5
V
2.7
I
O
= -8 mA
2.4
3.0
I
O
= -32 mA
2.0
V
OLA
Low Level Output
Voltage
2.7
I
O
= 100
A
0.2
V
2.7
I
O
= 24 mA
0.5
3.0
I
O
= 16 mA
0.4
3.0
I
O
= 32 mA
0.5
3.0
I
O
= 64 mA
0.55
I
OZ
High Impedance Output
Leakage Current
3.6
V
O
= 0.5V or 3.0V
V
I
= V
IL
or V
IH
nG = V
CC
5
A
I
OZPU
High Impedance Output
Leakage Current
0 to 1.5
V
O
= 0.5V or 3.0V
V
I
= GND or V
CC
nG = GND or V
CC
100
A
I
OZPD
High Impedance Output
Leakage Current
1.5 to 0
V
O
= 0.5V or 3.0V
V
I
= GND or V
CC
nG = GND or V
CC
100
A
I
OFF
Power Off Leakage
Current
0
V
I
= GND to 3.6V
V
O
= GND to 3.6V
100
A
I
CCA
Quiescent Supply
Current
3.6
V
O
= High
,
I
O
= 0
0.19
mA
V
O
= Low, I
O
= 0
5.0
nG = V
CC,
I
O
= 0
V
O
= GND or V
CC
0.19
I
CC
Maximum Quiescent
Supply Current / Input
(An or nG)
3.0 to
3.6
V
I
= V
CC
- 0.6V
An,nG = V
CC
or GND
0.2
mA
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