1/9
July 2001
s
HIGH SPEED :
t
PD
= 5.1 ns (TYP.) at V
CC
= 3.3V
s
5V TOLERANT INPUTS
s
INPUT VOLTAGE LEVEL :
V
IL
=0.8V, V
IH
=2V at V
CC
=3V
s
LOW POWER DISSIPATION:
I
CC
= 2
A (MAX.) at T
A
=25C
s
LOW NOISE:
V
OLP
= 0.3V (TYP.) at V
CC
= 3.3V
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 4mA (MIN)
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 3.6V (1.2V Data Retention)
s
PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 157
s
IMPROVED LATCH-UP IMMUNITY
s
POWER DOWN PROTECTION ON INPUTS
DESCRIPTION
The 74LVX157 is a low voltage CMOS QUAD 2
CHANNEL MULTIPLEXER fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is ideal for low
power, battery operated and low noise 3.3V
applications.
It consists of four 2-input digital multiplexers with
common select and strobe inputs. When STROBE
input is held high, selection of data is inhibited and
all the outputs become low. The SELECT
decoding determines whether the A or B inputs
get routed to their corresponding Y outputs.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage.
This device can be used to interface 5V to 3V
system. It combines high speed performance with
the true CMOS low power consumption.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74LVX157
LOW VOLTAGE QUAD 2 CHANNEL MULTIPLEXER
WITH 5V TOLERANT INPUTS
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
TUBE
T & R
SOP
74LVX157M
74LVX157MTR
TSSOP
74LVX157TTR
TSSOP
SOP
74LVX157
2/9
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
X : Don't Care
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
RECOMMENDED OPERATING CONDITIONS
1) Truth Table guaranteed: 1.2V to 3.6V
2) V
IN
from 0.8V to 2.0V
PIN No
SYMBOL
NAME AND FUNCTION
1
SELECT
Common Data Select
Inputs
2, 5, 11, 14
1A to 4A
Data Inputs From Source
A
3, 6, 10, 13
1B to 4B
Data Inputs From Source
B
4, 7, 9, 12
1Y to 4Y
Multiplexer Outputs
15
STROBE
Strobe Input
8
GND
Ground (0V)
16
V
CC
Positive Supply Voltage
INPUTS
OUTPUT
STROBE
SELECT
A
B
Y
H
X
X
X
L
L
L
L
X
L
L
L
H
X
H
L
H
X
L
L
L
H
X
H
H
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage (note 1)
2 to 3.6
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time (note 2) (V
CC
= 3.3V)
0 to 100
ns/V
74LVX157
3/9
DC SPECIFICATIONS
DYNAMIC SWITCHING CHARACTERISTICS
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.3V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.3V. Inputs under test switching: 3.3V to threshold (V
ILD
), 0V to threshold
(V
IHD
), f=1MHz.
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
1.5
V
3.0
2.0
2.0
2.0
3.6
2.4
2.4
2.4
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
0.5
V
3.0
0.8
0.8
0.8
3.6
0.8
0.8
0.8
V
OH
High Level Output
Voltage
2.0
I
O
=-50
A
1.9
2.0
1.9
1.9
V
3.0
I
O
=-50
A
2.9
3.0
2.9
2.9
3.0
I
O
=-4 mA
2.58
2.48
2.4
V
OL
Low Level Output
Voltage
2.0
I
O
=50
A
0.0
0.1
0.1
0.1
V
3.0
I
O
=50
A
0.0
0.1
0.1
0.1
3.0
I
O
=4 mA
0.36
0.44
0.55
I
I
Input Leakage
Current
3.6
V
I
= 5V or GND
0.1
1
1
A
I
CC
Quiescent Supply
Current
3.6
V
I
= V
CC
or GND
2
20
20
A
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
OLP
Dynamic Low
Voltage Quiet
Output (note 1, 2)
3.3
C
L
= 50 pF
0.3
0.5
V
V
OLV
-0.5
-0.3
V
IHD
Dynamic High
Voltage Input (note
1, 3)
3.3
2
V
ILD
Dynamic Low
Voltage Input (note
1, 3)
3.3
0.8
74LVX157
4/9
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3ns)
1) Skew is defined as the absolute value of the difference between the actual propagation delay for any two outputs of the same device switch-
ing in the same direction, either HIGH or LOW
2) Parameter guaranteed by design
(*) Voltage range is 3.3V
0.3V
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
/n (per circuit)
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time
(A, B - Y)
2.7
15
6.6
12.5
1.0
15.5
1.0
16.5
ns
2.7
50
9.1
16.0
1.0
19.0
1.0
20.0
3.3
(*)
15
5.1
7.9
1.0
9.5
1.0
11.0
3.3
(*)
50
7.6
11.4
1.0
13.0
1.0
14.0
t
PLH
t
PHL
Propagation Delay
Time
(SELECT - Y)
2.7
15
8.9
16.9
1.0
20.5
1.0
21.5
ns
2.7
50
11.4
20.4
1.0
24.0
1.0
26.0
3.3
(*)
15
7.0
11.0
1.0
13.0
1.0
14.0
3.3
(*)
50
9.5
14.5
1.0
16.5
1.0
17.5
t
PLH
t
PHL
Propagation Delay
Time
(STROBE - Y)
2.7
15
9.1
17.6
1.0
20.5
1.0
21.5
ns
2.7
50
11.6
21.1
1.0
20.4
1.0
21.4
3.3
(*)
15
7.2
11.5
1.0
13.5
1.0
14.5
3.3
(*)
50
9.7
15.0
1.0
17.0
1.0
18.0
t
OSLH
t
OSHL
Output To Output
Skew Time (note1,
2)
2.7
50
0.5
1.0
1.5
1.5
ns
3.3
(*)
50
0.5
1.0
1.5
1.5
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
3.3
4
10
10
pF
C
PD
Power Dissipation
Capacitance
(note 1)
3.3
f
IN
= 10MHz
20
pF
74LVX157
5/9
TEST CIRCUIT
C
L
=15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50
)
WAVEFORM 1 : PROPAGATION DELAYS FOR INVERTING CONDITIONS (f=1MHz; 50% duty cycle)
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