74V1G03
SINGLE 2-INPUT OPEN DRAIN NAND GATE
PRELIMINARY DATA
September 1999
s
HIGH SPEED: t
PD
= 3.7 ns (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 1
A (MAX.) at T
A
= 25
o
C
s
HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% V
CC
(MIN.)
s
POWER DOWN PROTECTION ON INPUTS
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1G03 is an advanced high-speed CMOS
SINGLE 2-INPUT OPEN DRAIN NAND GATE
fabricated with sub-micron silicon gate and
double-layer metal wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer output, which provide high noise
immunity and stable output.
This device can, with an external pull-up resistor,
be used in wired AND configuration. This device
can also be used as a led driver in any other
application requiring a current sink.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODE:
74V1G03S
74V1G03C
S
(SOT23-5L)
C
(SC-70)
1/7
INPUT EQUIVALENT CIRCUIT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
T
stg
Storage Temperature
-65 to +150
o
C
T
L
Lead Temperature (10 sec)
260
o
C
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is not implied.
TRUTH TABLE
A
B
Y
L
L
Z
L
H
Z
H
L
Z
H
H
L
Z: High Impedance
PIN DESCRIPTION
PI N No
SYMBOL
NAME AND FUNCT ION
1
1A
Data Input
2
1B
Data Input
4
1Y
Data Output
3
GND
Ground (0V)
5
V
CC
Positive Supply Voltage
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Valu e
Uni t
V
CC
Supply Voltage
2.0 to 5.5
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-40 to +85
o
C
dt/dv
Input Rise and Fall Time (see note 1) (V
CC
= 3.3
0.3V)
(V
CC
= 5.0
0.5V)
0 to 100
0 to 20
ns/V
ns/V
1) V
IN
from 30% to70%of V
CC
74V1G03
2/7
DC SPECIFICATIONS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
V
CC
(V)
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
V
IH
High Level Input
Voltage
2.0
1.5
1.5
V
3.0 to 5.5
0.7V
CC
0.7V
CC
V
IL
Low Level Input
Voltage
2.0
0.5
0.5
V
3.0 to 5.5
0.3V
CC
0.3V
CC
V
OL
Low Level Output
Voltage
2.0
I
O
=50
A
0.0
0.1
0.1
V
3.0
I
O
=50
A
0.0
0.1
0.1
4.5
I
O
=50
A
0.0
0.1
0.1
3.0
I
O
=4 mA
0.36
0.44
4.5
I
O
=8 mA
0.36
0.44
I
OZ
High Impedance
Output Leakage
Current
5.5
V
I
= V
IH
or V
IL
V
O
= V
CC
or GND
0.25
2.5
A
I
I
Input Leakage Current
0 to 5.5
V
I
= 5.5V or GND
0.1
1.0
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
2
20
A
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
T est Cond ition s
Val ue
Un it
T
A
= 25
o
C
-40 to 85
o
C
Min.
Typ .
Max.
Min .
Max.
C
IN
Input Capacitance
4
10
10
pF
C
OUT
Output Capacitance
5
pF
C
PD
Power Dissipation
Capacitance (note 1)
6
pF
1) C
PD
isdefined as the value of the IC'sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operating current can be obtained by the following equation. I
CC
(opr) = C
PD
V
CC
f
IN
+ I
CC
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
=3 ns)
Symbol
Parameter
T est Condi tio n
Valu e
Unit
V
CC
(V)
C
L
(p F)
T
A
= 25
o
C
-40 to 85
o
C
Min.
T yp.
Max.
Mi n.
Max.
t
PZL
Propagation Delay
Time
3.3
(*)
15
R
L
= 1 K
5.5
7.9
1.0
9.5
ns
3.3
(*)
50
R
L
= 1 K
8.0
11.4
1.0
13.0
5.0
(**)
15
R
L
= 1 K
3.7
5.5
1.0
6.5
5.0
(**)
50
R
L
= 1 K
5.2
7.5
1.0
8.5
t
PLZ
Propagation Delay
Time
3.3
(*)
50
R
L
= 1 K
9.0
11.4
1.0
13.0
ns
5.0
(**)
50
R
L
= 1 K
6.0
7.5
1.0
8.5
(*) Voltage range is 3.3V
0.3V
(**) Voltage range is 5V
0.5V
74V1G03
3/7
TEST CIRCUIT
C
L
= 15/50 pF or equivalent (includes jig and probe capacitance)
R
L
= R
1
= 1K
or equivalent
R
T
= Z
OUT
of pulse generator (typically 50
)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
74V1G03
4/7
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