1/10
July 2001
s
HIGH SPEED: t
PD
= 4.7ns (TYP.) at V
CC
= 5V
s
LOW POWER DISSIPATION:
I
CC
= 1
A(MAX.) at T
A
=25C
s
COMPATIBLE WITH TTL OUTPUTS:
V
IH
= 2V (MIN), V
IL
= 0.8V (MAX)
s
POWER DOWN PROTECTION ON INPUTS
s
SYMMETRICAL OUTPUT IMPEDANCE:
|I
OH
| = I
OL
= 8mA (MIN) at V
CC
= 4.5V
s
BALANCED PROPAGATION DELAYS:
t
PLH
t
PHL
s
OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 4.5V to 5.5V
s
IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74V1T77 is an advanced high-speed CMOS
SINGLE D-TYPE LATCH fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology. It is designed to
operate from 4.5V to 5.5V, making this device
ideal for portable applications.
The single D-Type latch is controlled by an Latch
Enable Input (LE). While the LE input is held at a
high level, the Q output will follow the data input
precisely. When the LE input is taken low the Q
output is latched precisely at the logic level of D
data input.
Power down protection is provided on inputs and
0 to 7V can be accepted on inputs with no regard
to the supply voltage. This device can be used to
interface 5V to 3V.
It's available in the commercial and extended
temperature range.
All inputs and output are equipped with protection
circuits against static discharge, giving them ESD
immunity and transient excess voltage.
74V1T77
SINGLE D-TYPE LATCH
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE
T & R
SOT23-5L
74V1T77STR
SOT323-5L
74V1T77CTR
SOT323-5L
SOT23-5L
74V1T77
2/10
INPUT AND OUTPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
TRUTH TABLE
(*) Q output is latched at the time when the LE input is taken low
logic level.
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
1) V
IN
from 0.8V to 2V
PIN No
SYMBOL
NAME AND FUNCTION
1
D
Data Input
2
LE
Latch Enable Input
4
Q
Data Output
3
GND
Ground (0V)
5
V
CC
Positive Supply Voltage
D
LE
Q
L
L
No Change *
H
L
No Change *
L
H
L
H
H
H
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
-0.5 to +7.0
V
V
I
DC Input Voltage
-0.5 to +7.0
V
V
O
DC Output Voltage
-0.5 to V
CC
+ 0.5
V
I
IK
DC Input Diode Current
- 20
mA
I
OK
DC Output Diode Current
20
mA
I
O
DC Output Current
25
mA
I
CC
or I
GND
DC V
CC
or Ground Current
50
mA
T
stg
Storage Temperature
-65 to +150
C
T
L
Lead Temperature (10 sec)
300
C
Symbol
Parameter
Value
Unit
V
CC
Supply Voltage
4.5 to 5.5
V
V
I
Input Voltage
0 to 5.5
V
V
O
Output Voltage
0 to V
CC
V
T
op
Operating Temperature
-55 to 125
C
dt/dv
Input Rise and Fall Time (note 1) (V
CC
= 5.0
0.5V)
0 to 20
ns/V
74V1T77
3/10
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (Input t
r
= t
f
= 3ns)
(*) Voltage range is 5.0V
0.5V
CAPACITIVE CHARACTERISTICS
1) C
PD
is defined as the value of the IC's internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= C
PD
x V
CC
x f
IN
+ I
CC
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
V
IH
High Level Input
Voltage
4.5 to
5.5
2
2
2
V
V
IL
Low Level Input
Voltage
4.5 to
5.5
0.8
0.8
0.8
V
V
OH
High Level Output
Voltage
4.5
I
O
=-50
A
4.4
4.5
4.4
4.4
V
4.5
I
O
=-8 mA
3.94
3.8
3.7
V
OL
Low Level Output
Voltage
4.5
I
O
=50
A
0.0
0.1
0.1
0.1
V
4.5
I
O
=8 mA
0.36
0.44
0.55
I
I
Input Leakage
Current
0 to
5.5
V
I
= 5.5V or GND
0.1
1.0
1.0
A
I
CC
Quiescent Supply
Current
5.5
V
I
= V
CC
or GND
1
10
20
A
I
CC
Additional Worst
Case Supply
Current
5.5
One Input at 3.4V,
other input at V
CC
or GND
1.35
1.5
1.5
mA
Symbol
Parameter
Test Condition
Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
t
PLH
t
PHL
Propagation Delay
Time LE to Q
5.0 (*)
15
4.4
6.5
1.0
7.5
1.0
8.5
ns
5.0 (*)
50
4.8
7.0
1.0
8.0
1.0
9.0
t
PLH
t
PHL
Propagation Delay
Time D to Q
5.0 (*)
15
4.7
6.5
1.0
7.5
1.0
8.5
ns
5.0 (*)
50
5.3
7.0
1.0
8.0
1.0
9.0
t
W
LE Pulse Width,
HIGH
5.0 (*)
3.0
3.0
3.0
ns
t
s
Setup Time D to
LE, HIGH or LOW
5.0 (*)
2.0
2.0
2.0
ns
t
h
Hold Time D to LE,
HIGH or LOW
5.0 (*)
1.0
1.0
1.0
ns
Symbol
Parameter
Test Condition
Value
Unit
T
A
= 25C
-40 to 85C
-55 to 125C
Min.
Typ.
Max.
Min.
Max.
Min.
Max.
C
IN
Input Capacitance
4
10
10
10
pF
C
PD
Power Dissipation
Capacitance
(note 1)
8
pF
74V1T77
4/10
TEST CIRCUIT
C
L
= 15/50pF or equivalent (includes jig and probe capacitance)
R
T
= Z
OUT
of pulse generator (typically 50
)
WAVEFORM 1: LE TO Qn PROPAGATION DELAYS, LE MINIMUN PULSE WIDTH, Dn TO LE SETUP
AND HOLD TIMES (f=1MHz; 50% duty cycle)
74V1T77
5/10
WAVEFORM 2: PROPAGATION DELAY TIME (f=1MHz; 50% duty cycle)
PDF 
ZIP