ChipFind - документация

Электронный компонент: EMIF02-USB03F2

Скачать:  PDF   ZIP
1/7
PRODUCT CHARACTERISTICS
ESD protection and EMI filtering for:
USB OTG port
DESCRIPTION
The EMIF02-USB03F2 is a highly integrated array
designed to suppress EMI / RFI noise for USB
OTG (On The Go).
The EMIF02-USB03F2 Flip-Chip packaging means
the package size is equal to the die size.
Additionally, this filter includes an ESD protection
circuitry which prevents the protected device from
destruction when subjected to ESD surges up to
15 kV on external contacts.
BENEFITS
2 lines low-pass-filter + 2 lines ESD protection
High efficiency in EMI filtering
Lead Free package
Very low PCB space consuming: < 3.25 mm
2
Very thin package: 0.65 mm
High efficiency in ESD suppression
(IEC61000-4-2 level 4)
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration and wafer level packaging.
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4 on external pins 15kV (air discharge)
8kV (contact discharge)
Level 1 on internal pins 2kV (air and contact
discharge)
EMIF02-USB03F2
2 LINES EMI FILTER
INCLUDING ESD PROTECTION
REV. 3
October 2004
Figure 2: Schematic
Cline = 20 pF max.
D+OUT
D+IN
D-IN
D-OUT
Pd2
Pd1
R2=33
C
C
R3=1.3k
Pup
Dz
ID
Vbus
R1=33
EMIF02-USB03F2
R5=15k
R4=17k
IPADTM
Flip-Chip
(11 Bumps)
Figure 1: Pin Configuration (ball side)
3
ID
Vbus
D+
out
D-
out
Pup
Pd2
GND
Pd1
D+
in
D-
in
Dz
2
A
B
C
D
1
TM: IPAD is a trademark of STMicroelectronics.
Table 1: Order Code
Part Number
Marking
EMIF02-USB03F2
FU
EMIF02-USB03F2
2/7
Table 2: Absolute Ratings (T
amb
= 25C))
Table 3: Electrical Characteristics (T
amb
= 25C)
Figure 3: Application Schematic
Symbol
Parameter and test conditions
Value
Unit
V
PP
External pins (D1, C1, A2, A3, B3)
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
Internal pins (D3, C3, C2, B2, B1)
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharg
15
8
2
2
kV
T
j
Maximum junction temperature
125
C
T
op
Operating temperature range
- 40 to + 85
C
T
stg
Storage temperature range
- 55 to + 150
C
Symbol
Parameter
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
V
CL
Clamping voltage
Rd
Dynamic impedance
I
PP
Peak pulse current
C
line
Input line capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V
BR
I
R
= 1 mA
14
V
I
RM
V
RM
= 3V
0.1
0.5
A
C
line
@ 0V
20
pF
R
1
,R
2
Tolerance 5%
33
R
3
Tolerance 5%
1.30
k
R
4
Tolerance 5%
17
k
R
5
Tolerance 5%
15
k
R1 = R2 = 33
Cline = 20 pF max.
D+
D-
Vbus
ID
D+
D+OUT
D+IN
D-IN
D-OUT
Pd2
Pd1
D-
Vbus
ID
GND
GND
USB
O
T
G connector
R2=33
C
C
R3=1.3k
Pup
Dz
ID
Vbus
R1=33
3.3V
USB
O
T
G Xceiv
er
EMIF02-USB03F2
R5=15k
R4=17k
EMIF02-USB03F2
3/7
Figure 4: Filtering measurements
Figure 5: Analog crosstalk measurements
Figure 6: ESD response to IEC61000-4-2
(+15kV air discharge) on one input V(in) and on
one output (Vout)
Figure 7: ESD response to IEC61000-4-2 (-15kV
air discharge) on one input V(in) and on one
output (Vout)
Figure 8: Junction capacitance versus reverse
voltage applied (typical values)
100.0k
1.0M
10.0M
100.0M
1.0G
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
EMIF02-USB03F2_EVAL-SAMPLES_PM431
Aplac 7.70 User: ST Microelectronics
Jul 22 2004
dB
f/Hz
C1/C3 Line
D1/D3 Line
100.0k
1.0M
10.0M
100.0M
1.0G
-100.00
-90.00
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
EMIF02-USB03F2_EVAL-SAMPLES_PM431
Aplac 7.70 User: ST Microelectronics
Jul 22 2004
dB
f/Hz
C1/D3 Line
A2/A3 Line
0
2
4
6
8
10
12
14
16
18
20
0
1
2
3
4
5
6
7
8
9
10
11
12
C(pF)
V
R
(V)
EMIF02-USB03F2
4/7
Figure 9: Aplac model
Figure 10: Aplac parameters
bulk
MODEL = D02_usb03
R_33R
bulk
bulk
Port1
C2
50
R_1k3
C3
MODEL = D02_usb03
A3
Port2
bulk
50
bulk
A2
MODEL = D02_usb03
B2
R_33R
R_15k
D3
C2
bulk
Lbump
C1
R_17k
B1
bulk
bulk
MODEL = D02_usb03_gnd
C3
D2
C1
bulk
bulk
Rbump
D1
D1
bulk
D3
bulk
bulk
B1
bulk
B3
Lbump
Rbump
D2
Lbump
Rbump
Lgnd
Rgnd
B3
bulk
Cgnd
B1
bulk
B2
Rs
Ls
Rs
Ls
bulk
Rsubump
Cbump
A3
bulk
B2
bulk
A2
bulk
C3
bulk
C2
C1
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
Rsubump
Cbump
bulk
MODEL = D02_usb03
R_33R
bulk
bulk
Port1
C2
50
R_1k3
C3
MODEL = D02_usb03
A3
Port2
bulk
50
bulk
A2
MODEL = D02_usb03
B2
R_33R
R_15k
D3
C2
bulk
Lbump
C1
R_17k
B1
bulk
bulk
MODEL = D02_usb03_gnd
C3
D2
C1
bulk
bulk
Rbump
D1
D1
bulk
D3
bulk
bulk
B1
bulk
B3
Lbump
Rbump
D2
Lbump
Rbump
Lgnd
Rgnd
D2
Lbump
Rbump
Lgnd
Rgnd
B3
bulk
Cgnd
B1
bulk
B2
Rs
Ls
Rs
Ls
bulk
Rsubump
Cbump Rsubump
Cbump
A3
bulk
B2
bulk
A2
bulk
C3
bulk
C2
C1
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Rsubump
Cbump Rsubump
Cbump
Ls 950pH
Rs 150m
R_33R 33
R_1k3 1.3k
R_15k 15k
R_17k 17k
Cz_usb03 11pF
Rs_usb03 1
Cz_usb03_gnd 220pF
Rs_usb03_gnd 0.9
Lgnd 50pH
Rgnd 100m
Cgnd 0.15pF
Lbump 50pH
Rbump 20m
Cbump 2.4pF
Rsubump 100m
EMIF02-USB03F2
5/7
Figure 11: Order Code
Figure 12: FLIP-CHIP Package Mechanical Data
Figure 14: Foot Print Recommendations
Figure 15: Marking
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
Package
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
F = Flip-Chip
x
= 1: 500m, Bump = 315m
= 2: Leadfree Pitch = 500m, Bump = 315m
1.57mm 50m
2.07mm 50m
315m 50
500m 50
500m 50
650m 65
Copper pad Diameter :
250m recommended, 300m max.
Solder stencil opening :
330m recommended
Solder mask opening recommendation :
340m min. for 300m copper pad diameter
E
x
y
x
w
z
w
565
545
400
100
230
Dot, ST logo
xx = marking
z = packaging location
yww = datecode
(y = year
ww = week)
All dimensions in m