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MAIN PRODUCT APPLICATIONS:
EMI filtering and ESD protection for:
SIM Interface (Subscriber Identify Module)
UIM Interface (Universal Identify Module)
DESCRIPTION
The EMIF03-SIM02F2 is a highly integrated
device designed to suppress EMI/RFI noise in all
systems subjected to electromagnetic interfer-
ence. The EMIF03 flip chip packaging means the
package size is equal to the die size.
This filter includes an ESD protection circuitry
which prevents the device from destruction when
subjected to ESD surges up 15kV.
BENEFITS
EMI symmetrical (I/O) low-pass filter
High efficiency in EMI filtering
Lead free package
Very low PCB space consuming:
1.42mm x 1.42mm
Very thin package: 0.65 mm
High efficiency in ESD suppression
High reliability offered by monolithic integration
High reducing of parasitic elements through
integration & wafer level packaging.
COMPLIES WITH THE FOLLOWING STANDARDS:
IEC61000-4-2
Level 4 on external & V
cc
pins:
15kV(air discharge)
8kV (contact discharge)
Level 1 on internal pins: 2kV (air discharge)
2kV (contact discharge)
MIL STD 883E - Method 3015-6 Class 3
EMIF03-SIM02F2
3 LINE EMI FILTER
INCLUDING ESD PROTECTION
REV. 5
September 2005
Figure 2: Configuration
47
CLK in
Data in
CLK ext
Data ext
100
R1
R2
R3
RST in
RST ext
100
V
CC
GND
Cline = 20pF max.
Flip-Chip
(8 Bumps)
Figure 1: Pin Configuration (Ball side)
B
C
1
2
3
A
RST
in
RST
ext
CLK
in
Data
in
Gnd
V
CC
CLK
ext
Data
ext
TM: IPAD is a trademark of STMicroelectronics.
Table 1: Order Code
Part Number
Marking
EMIF03-SIM02F2
GJ
IPADTM
EMIF03-SIM02F2
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Table 2: Absolute Ratings (limiting values)
Table 3: Electrical Characteristics (T
amb
= 25C)
Symbol
Parameter and test conditions
Value
Unit
V
PP
Internal pins (A3, B3, C3):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
External pins (A2, B1, C2, C1):
ESD discharge IEC61000-4-2, air discharge
ESD discharge IEC61000-4-2, contact discharge
2
2
15
8
kV
T
j
Maximum junction temperature
125
C
T
op
Operating temperature range
- 40 to + 85
C
T
stg
Storage temperature range
- 55 to + 150
C
Symbol
Parameter
V
BR
Breakdown voltage
I
RM
Leakage current @ V
RM
V
RM
Stand-off voltage
V
CL
Clamping voltage
R
d
Dynamic impedance
I
PP
Peak pulse current
R
I/O
Series resistance between Input &
Output
C
line
Input capacitance per line
Symbol
Test conditions
Min.
Typ.
Max.
Unit
V
BR
I
R
= 1 mA
6
20
V
I
RM
V
RM
= 3V
0.2
A
R
d
1.5
R
1
, R
3
Tolerance 20%
100
R
2
Tolerance 20%
47
C
line
@ 0V
20
pF
I
V
I
F
I
RM
I
R
I
PP
V
RM
V
F
V
BR
V
CL
EMIF03-SIM02F2
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Figure 3: S21 (dB) attenuation measurement
(A2-A3 line)
Figure 4: S21 (dB) attenuation measurement
(B1-B3 line)
Figure 5: S21 (dB) attenuation measurement
(C1-C3 line)
Figure 6: Analog crosstalk measurements
Figure 7: Voltages when IEC61000-4-2 (+15 kV
air discharge) applied to external pin
Figure 8: Voltages when IEC61000-4-2 (-15 kV
air discharge) applied to external pin
100.0k
1.0M
10.0M
100.0M
1.0G
-40.00
-30.00
-20.00
-10.00
0.00
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
dB
f/Hz
A2/A3 Line
100.0k
1.0M
10.0M
100.0M
1.0G
-40.00
-30.00
-20.00
-10.00
0.00
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
dB
f/Hz
B1/B3 line
100.0k
1.0M
10.0M
100.0M
1.0G
-40.00
-30.00
-20.00
-10.00
0.00
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
dB
f/Hz
C1/C3 line
100.0k
1.0M
10.0M
100.0M
1.0G
-100.00
-90.00
-80.00
-70.00
-60.00
-50.00
-40.00
-30.00
-20.00
-10.00
0.00
EMIF03-SIM02F2_FREQ-MEAS_PM428
Aplac 7.70 User: ST Microelectronics Sep 22 2004
dB
f/Hz
Xtalk A2/B3
100ns/d
Vexternal : 10V/d
Vinternal : 10V/d
100ns/d
Vexternal : 5V/d
Vinternal : 5V/d
EMIF03-SIM02F2
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Figure 10: Aplac model
Figure 11: Aplac parameters
Figure 9: Line capacitance versus reverse
applied voltage (typical)
0.00
4.00
8.00
12.00
16.00
20.00
0
1
2
3
4
5
VR(V)
C(pF)
50
Port1
Ls
100m
a2
Port2
50
100m
Ls
a3
100
47
100
0.29
0.31
Dint1
Dint2
0.29
Dint1
0.25
Dext1
0.28
Dext2
0.25
Dext1
Bulk
Lbump
Rbump
Lbump
Rbump
Lbump
Rbump
LbumpRbump
Lbump Rbump
Lbump Rbump
bulk
Rsub Cbump
bulk
Rsub Cbump
a3
bulk
Rsub Cbump
b1
c3
bulk
Rsub
Cbump
bulk
Rsub
Cbump
bulk
Rsub
Cbump
a2
b3
c1
Lbump
Rbump
Lgnd
Rgnd
Cgnd
Ls 950pH
Rs 150m
Cext1 15pF
Cint1 4.5pF
Cext2 14pF
Cint2 4pF
Rbump 20m
Lbump 50pH
Cbump 0.15pF
Rgnd 500m
Lgnd 50pH
Cgnd 0.15pF
Rsub 100m
Model Dint1
BV=15
CJO=Cint1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dext1
BV=15
CJO=Cext1
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dint2
BV=15
CJO=Cint2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
Model Dext2
BV=15
CJO=Cext2
IBV=1u
IKF=1000
IS=10f
ISR=100p
N=1
M=0.3333
RS=0.001m
VJ=0.6
TT=50n
EMIF03-SIM02F2
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Figure 12: Ordering Information Scheme
Figure 13: FLIP-CHIP Package Mechanical Data
Figure 14: Foot print recommendations
Figure 15: Marking
EMIF yy - xxx zz Fx
EMI Filter
Number of lines
Information
Package
x = resistance value (Ohms)
z = capacitance value / 10(pF)
or
3 letters = application
2 digits = version
F = Flip-Chip
x
= 1: 500m, Bump = 315m
= 2: Leadfree Pitch = 500m, Bump = 315m
= 3: Leadfree Pitch = 400m, Bump = 250m
1.42mm 50m
1.42mm 50m
315m 50
500m 50
500m 50
650m 65
Copper pad Diameter :
250m recommended , 300m max
Solder stencil opening : 330m
Solder mask opening recommendation :
340m min for 315m copper pad diameter
365
365
240
40
220
x
y
x
w
z
w
All dimensions in m
E
Dot, ST logo
xx = marking
yww = datecode
(y = year
ww = week)
z = packaging
location
EMIF03-SIM02F2
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Figure 16: FLIP-CHIP Tape and Reel Specification
Dot identifying Pin A1 location
User direction of unreeling
All dimensions in mm
4 +/- 0.1
8 +/- 0.3
4 +/- 0.1
1.75 +/- 0.1
3.5 +/- 0.1
1.5 +/- 0.1
0.73 +/- 0.05
xxz
yww
ST
E
xxz
yww
ST
E
xxz
yww
ST
E
Table 4: Ordering Information
Note: More informations are available in the application notes:
AN1235: "Flip-Chip: Package description and recommendations for use"
AN1751: "EMI Filters: Recommendations and measurements"
Ordering code
Marking
Package
Weight
Base qty
Delivery mode
EMIF03-SIM02F2
GJ
Flip-Chip
2.9 mg
5000
Tape & reel 7"
Table 5: Revision History
Date
Revision
Description of Changes
08-Oct-2004
1
First issue.
20-Oct-2004
2
Minor layout update.
25-Mar-2005
3
Figure 1 on page 1: pin configuration definitions changed
from RST out, CLK out and Data out to RST ext, CLK ext
and Data ext.
13-Jun-2005
4
Titles in Figures 7 and 8 changed - No technical data
changed
12-Sep-2005
5
"out" changed to "ext" in Figure 2.
EMIF03-SIM02F2
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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All other names are the property of their respective owners
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