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Электронный компонент: ESDLIN1524BJ

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August 2006
Rev 1
1/6
6
ESDLIN1524BJ
TRANSILTM diode for ESD protection
Features
Max peak pulse power 160 W (8/20 s)
Asymmetrical bidirectional device
Stand-off voltage: 15 and 24 V
Low clamping factor V
CL
/V
BR
Complies with the following standards :
IEC 61000-4-2 level 4 (> 15 kV air
discharge, > 8 kV contact discharge)
IEC 61000-4-5; I
pp
= 3 A (8/20 s)
HBM MIL STD 833, class 3 (> 4 kV)
Low Leakage current
Description
The ESDLIN1524BJ is an asymmetrical
TRANSIL diode designed specifically for
protecting one automotive LIN bus line against
electrostatic discharge (ESD). The SOD-323 is a
very small package which allows space saving on
high density printed circuit board .
Transil diodes provide high overvoltage protection
by clamping action and have instantaneous
response to transient overvoltages.
Configuration
TM: TRANSIL is a trademark of STMicroelectronics.
Pin
Description
1
Cathode 1 (15 V reverse stand-off voltage)
2
Cathode 2 (24 V reverse stand-off voltage)
1
2
SOD-323
1
1
2
2
Table 1.
Absolute maximum ratings (limiting values) T
amb
= 25 C
Symbol
Parameter
Value
Unit
P
PP
Peak pulse power dissipation 8/20 s
(1)
T
j
initial = T
amb
160
W
T
stg
T
j
Storage temperature range
Operating junction temperature range
-65 to +175
-40 to 150
C
T
L
Maximum lead temperature for soldering during 10 s
260
C
1.
For a surge greater than maximum values, the diode will fail in short-circuit
Table 2.
ESD Maximum ratings
Symbol
Parameter
Conditions
Value
Unit
ESD
Electrostatic discharge capability
IEC 61000-4-2 (contact discharge)
23
kV
HBM MIL STD 833
10
www.st.com
Characteristics
ESDLIN1524BJ
2/6
1 Characteristics
Table 3.
Electrical characteristics (T
amb
= 25 C)
Symbol
Parameter
V
RM
Stand-off voltage
V
BR
Breakdown voltage
V
CL
Clamping voltage
I
RM
Leakage current @ V
RM
I
R
Breakdown current @ V
BR
I
PP
Peak pulse current
C
Junction capacitance
V
C L
V
B R
V
R M
I
R M
I
R
I
PP
V
I
I
R M
I
R
I
PP
V
R M
V
B R
V
C L
V
C L
V
B R
V
R M
I
R M
I
R
I
PP
V
I
I
R M
I
R
I
PP
V
R M
V
B R
V
C L
Types
I
RM
@V
RM
V
BR
@ I
R
(1)
V
CL max
@ I
PP
8/20 s
C
(2)
T
(3)
nA
V
V
mA
V
A
V
A
pF
10
-4
/C
Typ Max
Min
Typ Max
Typ Max
Max
ESDLIN1524BJ(15V)
1
50
15 17.1 18.9 20.3
5
25
1
35
5
16
20
8.8
ESDLIN1524BJ(24V)
1
50
24 25.4 27.8 30.3
5
40
1
50
3
9.6
1.
Pulse test: t
p
< 50 ms
2.
V
R
= 0 V, F= 1 MHz
3.
V
BR
=
T x (T
amb
-25) x V
BR(25 C)
Figure 1.
Relative variation of peak pulse
power versus initial junction
temperature
Figure 2.
Peak pulse power versus
exponential pulse duration
0.0
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1.0
1.1
0
25
50
75
100
125
150
175
P
PP
[Tj initial] / P
PP
[Tj initial=25C]
T
J
(C)
1.E+01
1.E+02
1.E+03
1
10
100
P
PP
(W)
Tj initial =25 C
t
P
(s)
ESDLIN1524BJ
Characteristics
3/6
Figure 5.
Clamping test conditions and results
Figure 3.
Junction capacitance versus line
voltage (typical values), 15 V side
Figure 4.
Junction capacitance versus line
voltage (typical values), 24 V side
0
2
4
6
8
10
12
14
16
18
20
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
C(pF)
F=1 MHz
V
OSC
=30mV
RMS
T
J
=25C
15 V side
V
LINE
(V)
0
2
4
6
8
10
12
14
16
18
20
0
2
4
6
8
10
12
14
16
18
20
22
24
C(pF)
F=1 MHz
V
OSC
=30 mV
RMS
T
J
=25 C
24 V side
V
LINE
(V)
Voltage
probe
TEST BOARD
Ground plane
1
2
V
1kV
ESD Air discharge
ESD test configuration
500
V
:
20V/d
t: 50 ns/d
t: 50 ns/d
V
:
20V/d
Remaining voltage after +1 kV ESD
voltage waveform (IEC 61000-4-2 conditions)
Remaining voltage after -1 kV ESD
voltage waveform (IEC 61000-4-2 conditions)
Ordering information scheme
ESDLIN1524BJ
4/6
2
Ordering information scheme
3 Package
information
ESDLIN 15 24 B J
ESDLIN protection
Stand-off voltage 1
Stand-off voltage 2
Bidirectional
15 = 15 V
24 = 24 V
Package
J = SOD-323
Table 4.
SOD-323 dimensions
Ref.
Dimensions
Millimeters
Inches
Min.
Max.
Min.
Max.
A
1.17
0.046
A1
0
0.1
0
0.004
b
0.25
0.44
0.01
0.017
c
0.1
0.25
0.004
0.01
D
1.52
1.8
0.06
0.071
E
1.11
1.45
0.044
0.057
H
2.3
2.7
0.09
0.106
L
0.1
0.46
0.004
0.02
Q1
0.1
0.41
0.004
0.016
H
b
D
E
A1
A
L
Q1
c
ESDLIN1524BJ
Ordering information
5/6
Figure 6.
SOD-323 footprint (dimensions in millimeters)
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages. These packages have a lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com.
4 Ordering
information
5 Revision
history
3.20
0.54
1.08
1.06
1.06
Part number
Marking
Package
Weight
Base qty
Delivery mode
ESDLIN1524BJ
24
SOD-323
5 mg
3000
Tape and reel
Date
Revision
Changes
28-Aug-2006
1
Initial release.