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Электронный компонент: HCF40208M013TR

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1/11
September 2002
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ONE INPUT AND TWO OUTPUT BUSES
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UNLIMITED EXPANSION IN BIT AND WORD
DIRECTION
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DATA LINES HAVE LATCHED INPUTS
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3-STATE OUTPUTS
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SEPARATE CONTROL OF EACH BUS,
ALLOWING SIMULTANEOUS
INDEPENDENT READING AND ANY OF
FOUR REGISTERS ON BUS A AND BUS B
AND INDEPENDENT WRITING INTO ANY
OF THE FOUR REGISTERS
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40208B IS PIN-COMPATIBLE WITH
INDUSTRY TYPE MC14580
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STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTICS
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QUIESCENT CURRENT SPECIF. UP TO 20V
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5V, 10V AND 15V PARAMETRIC RATINGS
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INPUT LEAKAGE CURRENT
I
I
= 100nA (MAX) AT V
DD
= 18V T
A
= 25C
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100% TESTED FOR QUIESCENT CURRENT
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MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF40208B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in SOP packages.
HCF40208B is a 4 x 4 multiport register containing
four 4-bit registers, a write address decoder, two
separate read address decoders, and two 3-state
output buses. When the ENABLE input is low, the
corresponding output bus is switched,
independently of the clock, to a high impedance
state. The high impedance third state provides the
outputs with the capability of being connected to
the bus lines in a bus organized system without
the need for interface or pull-up components.
When the WRITE ENABLE input is high, all data
input lines are latched on the positive transition of
the CLOCK and the data is entered into the word
selected by the write address lines. When WRITE
ENABLE is low, the CLOCK is inhibited and no
new data is entered. In either case, the contents of
any word may be accessed via the read address
lines independent of the state of the CLOCK input.
HCF40208B
4 x 4 MULTIPORT REGISTER
PIN CONNECTION
ORDER CODES
PACKAGE
TUBE
T & R
SOP
HCF40208BM1
HCF40208M013TR
SOP
HCF40208B
2/11
INPUT EQUIVALENT CIRCUIT
PIN DESCRIPTION
FUNCTIONAL DIAGRAM
PIN No
SYMBOL
NAME AND FUNCTION
4, 5, 6, 7
Q0A to Q3A Word A Output
22, 23, 2, 1
Q0B to Q3B Word B Output
20, 19, 18,
17
D0 to D3
Data Inputs
16
CLOCK
Clock Input
15
WRITE
ENABLE
Write Enable Input
21
3-STATE B
3 State Output
3
3-STATE A
3 State Output
8, 9
WRITE 0,
WRITE 1
Write Address Inputs
10, 11
READ 0B,
READ 1B
Read Address Inputs
13, 14
READ 0A,
READ 1A
Read Address Inputs
12
V
SS
Negative Supply Voltage
24
V
DD
Positive Supply Voltage
HCF40208B
3/11
LOGIC DIAGRAM
HCF40208B
4/11
SCHEMATIC DIAGRAM
HCF40208B
5/11
TRUTH TABLE
TIMING CHART
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied.
All voltage values are referred to V
SS
pin voltage.
CLOCK
Write
Enable
Write
1
Write
2
Read
1A
Read
0A
Read
1B
Read
0B
Enable
A
Enable
B
Dn
DnA
QnB
H
S1
S2
S1
S2
S1
S2
H
H
H
H
H
H
S1
S2
S1
S2
S1
S2
H
L
L
L
L
X
X
X
X
X
X
X
X
L
L
Z
Z
Z
H
L
L
L
H
H
L
H
H
Dn to
word 0
Word 1
Out
Word 2
Out
L
L
L
L
H
H
L
H
H
Word 0
not
altered
Word 1
Out
Word 2
Out
X
X
X
X
H
L
L
H
H
X
X
Word 2
Out
Word 1
Out
X
X
X
X
X
X
X
H
H
X
NC
NC
Symbol
Parameter
Value
Unit
V
DD
Supply Voltage
-0.5 to +22
V
V
I
DC Input Voltage
-0.5 to V
DD
+ 0.5
V
I
I
DC Input Current
10
mA
P
D
Power Dissipation per Package
200
mW
Power Dissipation per Output Transistor
100
mW
T
op
Operating Temperature
-55 to +125
C
T
stg
Storage Temperature
-65 to +150
C