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Электронный компонент: L3235T

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This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
July 2003
HIGHLY INTEGRATED SUBSCRIBER LINE
INTERFACE KIT FOR PABX AND KEY SYS-
TEM APPLICATIONS
IMPLEMENTS ALL KEY ELEMENTS OF THE
BORSCHT FUNCTION
INTEGRATED ZERO CROSSING BALANCED
RINGING INJECTION ELIMINATES EXTER-
NAL RELAY AND CENTRALISED RINGING
GENERATOR
ZERO NOISE INJECTED ON ADJACENT
LINES DURING RINGING SEQUENCE
LOW POWER IN STANDBY AND ACTIVE
MODES
BATTERY FEED WITH PROGRAMMABLE
LIMITING CURRENT
PARALLEL LATCHED DIGITAL INTERFACE
SIGNALLING FUNCTIONS (OFF HOOK,
GND-KEY)
LOW NUMBER OF EXTERNAL COMPO-
NENTS
INTEGRATED THERMAL PROTECTION
INTEGRATED OVER CURRENT PROTEC-
TION
0
C TO 70
C: L3234/L3235
-40
C TO 85
C: L3234T/L3235T
DESCRIPTION
The L3234/L3235 is a highly integrated SLIC KIT
targeted to PABX and key system applications
The kit integrates the majority of functions re-
quired to interface a telephone line. The
L3234/L3235 implements the main features of the
broths function:
- Battery Feed (Balanced Mode)
- Ringing Injection
- Signalling Detection
- Hybrid Function
The Kit comprises 2 devices, the L3234 ringing
injector fabricated in Bipolar in 140V Technology.
Its function is to amplify and inject in balanced
mode with zero crossing the ringing signal. The
device requires an external positive supply of
100V and a low level sinusoid of approx.
950mVrms. The L3235 Line Feeder is integrated
in 60V Bipolar Technology. The L3235 provides
battery feed to the line with programmable current
limitation. The two to four wire voice frequency
signal conversion is implemented by the L3235
and line terminating and balance impedances are
externally programmable. The L3234/L3235 kit is
designed for low power dissipation. In a short
loop condition the extra power is dissipated on an
external transistor. The Kit is controlled by five
wire parallel bus and interfaces easily to all first
and programmable second generation COMBOS.
(see figg. 1 and 2)
HEPTAWATT
ORDERING NUMBER: L3234
PLCC28
ORDERING NUMBER: L3235
L3234
L3235
HIGHLY INTEGRATED SLIC KIT TARGETED TO PABX
AND KEY SYSTEM APPLICATIONS
1/26
Figure 1: Typical Application Circuit with Second Generation COMBO for Complete Subscriber Circuit
(Protection-SLIC-COMBO)
L3234 - L3235
2/26
Figure 2: Typical Application Circuit with First Generation COMBO for Complete Subscriber Circuit
(Protection-SLIC-COMBO)
L3234 - L3235
3/26
DESCRIPTION
The L3234 is a monolithic integrated circuit which
is part of a kit of solid state devices for the sub-
scriber line interface. The L3234 sends a ringing
signal into a two wires analog telephone line in
balanced mode. The AC ringing signal amplitude
is up to 60Vrms, and for that purpose a positive
supply voltage of +100V shall be available on the
subscriber card.
The L3234 receives a low amplitude ringing sig-
nal (950mVrms) and provide the voltage/current
amplification (60Vrms/70mA) when the enable in-
put is active (CS > 2V). In disable mode (CS <
0.8V) the power consumption of the chip is very
low (<14mW).
The circuit is designed with a high voltage bipolar
technology (V
CEO
> 140V / V
CBO
> 250V).
The package is a moulded plastic power package
(Heptawatt) suitable also for surface mounting.
HEPTAWATT
BLOCK DIAGRAM
L3234
Solid State Ringing Injector
L3234 - L3235
4/26
1
2
3
4
5
6
7
D94TL131
OUT2
V100
OUT1
GND
VCC
CS
VA
PIN CONNECTION (Top view)
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V100
Positive Power Supply Voltage
+120
V
V
CC
5V Power Supply Voltage
5.5
V
V
A
Low Voltage Ringing Signal (with V100 = 120Vdc)
1.4
Vrms
CS
Logical Ring Drive Input
V
CC
T
j
Max. Junction Temperature
150
o
C
T
stg
Storage Temperature
-55 to +150
o
C
OPERATING RANGE
Symbol
Parameter
Value
Unit
V100
High Power Supply Voltage
95 to 105
V
V
CC
Low Power Supply Voltage
5
5%
V
V
A
Low Voltage Ringing Signal
600 to 950
within 10Hz - 100Hz
Vrms
T
op
Operating Temperature for L3234
L3234T
0 to 70
-40 to 85
C
C
T
jop
Max. Junction Operating Temperature (due to thermal protection)
130
C
Note: Operating ranges define those limits between which the functionality of the device is guaranteed.
THERMAL DATA
Symbol
Description
Value
Unit
R
th j-case
R
th j-amb
Thermal Resistance Junction-case
Thermal Resistance Junction-ambient
Max.
Max.
4
50
o
C/W
o
C/W
PIN DESCRIPTION
Pin
Name
Description
1
VA
Low Voltage Ringing Signal Input
2
CS
Logical Ring Drive Input
3
V
CC
+5V Low Power Supply
4
GND
Common Analog-Digital Ground
5
OUT1
Ringing Signal Output
6
V100
+100V High Power Supply
L3234 - L3235
5/26
5
7
RO1
RO2
OUT1
2
OUT2
CS
CO1
CO2
CS
LINE FEEDER
L3235
GND
-VBAT
TIP
RING
LINE TERMINALS
A
B
VA
RINGING INJECTOR
L3234
6
4
3
1
CA
VA
C100
CVCC
VCC
GND
V100
+5V
GND
+100V
D94TL132
Figure 3: L3234/L3235 Circuit Configuration
When the ringing function is selected by the sub-
scriber card, a low level signal is continuously ap-
plied to pin 1 through a de coupling capacitor. Then
the logical ring drive signal CS provided by L3235 is
applied to pin 2 with a cadenced mode.
The ringing cycles are synchronised by the L3234
in such a way that the ringing starts and stops al-
ways when the analog input signal crosses zero.
When the ringing injection is enabled (CS = "1"),
an AC ringing signal is injected in a balanced
mode into the telephone line.
When the ringing injection is disabled (CS = "0"),
the output voltage on OUT2 raises to the high
power supply, whereas on OUT1, it falls down to
ground.
The L3234 has a low output impedance when
sending the signal, and high output impedance
when the ringing signal is disabled
In fig. 4 the dynamic features of L3234 are
shown.
OPERATION DESCRIPTION
The Fig. 3 show the simplified circuit configuration
of the L3234 Solid State Ringing injector when
used with the L3235 Line Feeder.
EXTERNAL COMPONENTS LIST
In the following table are shown the recommended external components values for L3234.
Ref.
Value
Involved Parameter or Function
R01, R02
82
Ringing Feeding Series Resistors
C01, C02
10
F - 160V
Ringing Feeding De coupling Capacitors
CA
4.7
F - 10V
Low Level Ringing Signal De coupling Capacitor
C100
100nF - 100V
Positive Battery Filter
CV
CC
100nF
+5V Supply Filter
L3234 - L3235
6/26
Figure 5: Test Circuit Data Transmission Interference Test
Figure 4: Dynamic Features of L3234
DATA TRANSMISSION INTERFERENCE TEST
The L3234 meet the requirements of the technical
specification ST/PAA/TPA/STP/1063 from the
CNET. The test circuit used is indicated below.
The measured error rate for data transmission is
lower than 10
-6
during the ringing phase.
This test measures if during the ringing phase the
circuit induce any noise to the closer lines.
L3234 - L3235
7/26
ELECTRICAL CHARACTERISTICS (Test conditions: V100 = +100V, V
CC
= +5V, T
amb
= 25C, unless oth-
erwise specified)
Note: Testing of all parameter is performed at 25
C. Characterisation, as well as the design rule used al-
low correlation of tested performance with actual performances at other temperatures. All pa-
rameters listed here are met in the range 0
C to +70
C. For applications requiring operations in
the standard temperature range (0
C to 70
C) use L3234. If operations are required in the ex-
tended temperature range (-40
C to 85
C), use the L3234T.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Fig
STAND BY MODE: CS = "0"
I
S
(V100)
I
S
(V
CC
)
Consumption
VA = 950mVrms; 50Hz
45
560
100
800
A
A
V
SOUT1
V
SOUT2
DC Output Voltage
VA = 950mVrms; 50Hz
92
6
V
V
Z
SOUT1
Z
SOUT2
Output Impedance
70
70
k
k
6
Z
OUT
Matching
15
%
THD
Harmonic Distortion During
Emission
V
LINE
< 6dBm; f = 1kHz
-46
-40
dB
7
RINGING PHASE: CS = "1"
DC OPERATION
I
R
(V100)
I
R
(V
CC
)
Consumption
Z
LINE
=
VA = 950mVrms; 50Hz
2.5
2.2
5
3
mA
mA
V
ROUT1
V
ROUT2
DC Output Voltage
VA = 0V
44
44
56
56
V
V
V
IH
I
IH
(CS = 0)
Threshold Voltage on the
Logical Input CS
VA = 950mVrms; 50Hz
2.0
1
V
A
8
V
IL
I
IL
(CS = 0)
0.8
1
V
A
I
lim
DC Line Current Limitation
VA = 0V
70
150
mA
12
AC OPERATION
V
OUT1
/VA
V
OUT2
/VA
Ringing Gain
Z
LINE
= 2.2
F + 1k
VA = 0dBm
29.5
29.5
30
30
dB
dB
9
V
OUT1
-V
OUT1
Ringing Signal
ZLINE = 2.2
F + 1k
VA = 950mVrms; 50Hz
57
60
Vrms
9
THD V
LINE
Harmonic Distortion
VA = 950mVrms; 50Hz
5
%
Z
IN
(VA)
Input Impedance
VA = 950mVrms; 50Hz
40
k
10
Z
OUT
Differential Output Impedance
I
LINE
< 50mArms
20
11
TEST CIRCUITS
Figure 6.
L3234 - L3235
8/26
1
7
82
2
CS
4.7
F
LINE FEEDER
GND
-VBAT
VOUT1
A
B
L3234
6
3
4
ZLINE=600
VE 1KHz
VCC
V100
D94TL133
5
VOUT2
82
10
F/160V
10
F/160V
1M
V
TEST CIRCUITS (continued)
Figure 7.
Figure 8.
Figure 9.
L3234 - L3235
9/26
TEST CIRCUITS (continued)
Figure 10.
Figure 11.
Figure 12.
L3234 - L3235
10/26
DESCRIPTION
Circuit description
The L3235 Subscriber Line Interface Circuit
(SLIC) is a bipolar integrated circuit in 60V tech-
nology optimized for PABX application.
The L3235 supplies a line feed voltage with a cur-
rent limitation which can be modified by an exter-
nal resistor (RLIM).
The SLIC incorporates loop currents, ground key
detection functions with an externally programma-
ble constant time.
The two to four wires and four to two wires voice
frequency signal conversion is performed by the
L3235 and the line terminating and the balancing
impedances are externally programmable.
The device integrates an automatic power limita-
tion circuit. In short loop condition the extra power
is dissipated on one external transistor (Text).
This aproach allows to assembly the L3235 in a
low cost standard plastic PLCC28 package.
The chip is protected by thermal protection at
Tj = 150
C.
The SLIC is able to give a power up command for
Combo in off hook condition and an enable logic
for solid state ringing injector L3234.
The L3235 package is 28 pin plastic PLCC.
The L3235 has been designed to operate
togheter with L3234 performing complete
BORSHT function without any electromechanical
ringing relay (see the application circuit fig. 16).
PLCC28
L3235
Subscriber Line Interface Circuit
PIN CONNECTION
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
BAT
Battery Voltage
-54
V
V
CC
Positive Supply Voltage
5.5
V
V
SS
Negative Supply Voltage
-5.5
V
T
j
Max. Junction Temperature
150
C
T
stg
Storage Temperature
-55 to +150
C
OPERATING RANGE
Symbol
Parameter
Min.
Max.
Unit
V
BAT
Battery Voltage
-52
-24
V
V
CC
Positive Supply Voltage
4.75
5.25
V
V
SS
Negative Supply Voltage
-5.25
-4.75
V
T
op
Operating Temperature for L3235
L3235T
0
-40
70
85
C
C
T
j
Max Junction Operating Temperature
130
C
Note: Operating ranges define those limits between which the functionality of the device is guaranteed.
L3234 - L3235
11/26
THERMAL DATA
Symbol
Description
Value
Unit
R
th j-amb
Thermal Resistance Junction-ambient
Max
80
C/W
PIN DESCRIPTION
Pin
Name
Description
1
V
bat
Negative Battery Supply Input.
2
RING
RING wire of 2 Wire Line Interface.
3
ZAC
Non Inverting Input of the AC Impedance Synthesis Circuit.
4
VREG
Emitter Connection for the External Transistor.
5
AGND
Analog/Digital Ground.
6
BGND
Battery Ground. This is the Reference for the Battery Voltage (note 1).
7
CAC
AC Current Feedback Input.
8
RPC
External Protection Resistors AC Transmission Compensation.
9
TX
Four Wire Transmitting Amplifier Output.
10
ZB
Non Inverting Operational Input Inserted in the Hybrid Circuit for 2W to 4W
Conversion. The Network Connected from this Pin to Ground shall be a copy
of the Line Impedance.
11
ZA
VRX Output Buffer 2W to 4W Conversion.
12
RX
High Impedance Four Wire Receiving Input.
13
V
CC
Positive 5V Supply Voltage.
14
REF
Voltage Reference Output; a Resistor Connected to this pin sets the Internal
Bias Current.
15
V
SS
Negative 5V Supply Voltage.
16
IL
Transversal Line Current Feedback Divided by 50.
17
VPOL
Non Inverting Operational Input to Implement DC Character.
18
BASE
Driver for External Transistor Base.
19
LIM
Voltage Reference Output; a Resistor Connected to this Pin Sets the Value of
Line Current Limitation.
20
RNG
Ringing Logic Input from Line Card Controller.
21
SBY
Stand by Logic Input (SBY = 1 Set Line Current Limitation at 3mA).
22
PU
Power u.p Logic Output for the Codec Filter. (PU = 0 means Codec Filter
Activated)
23
CS
Ring Injector Enable for L3234 Output. (CS = 1 means L3234 Ringing
Injection Enable).
24
OH
Hook Status Logic Output (OH = 0 means off hook).
25
GDK
Ground Key Status Logic Output (GDK = 0 means Ground Key on).
26
RTF
Time Constant Hook Detector Filter Input.
27
GKF
Time Constant GK Detector Filter Input.
28
TIP
Tip Wire of 2 Wire Line Interface.
Note 1:
AGND and BGND pins must be tied together at a low impedance point (e.g. at card connector level).
L3234 - L3235
12/26
FUNCTIONAL DESCRIPTION
DIGITAL INTERFACE
The different operating modes of the L3235 are
programmed through a digital interface based on
two input pins:
1)SBY input programs the stand-by or Ac-
tive/Ringing modes.
2)RNG input programs the ringing ON/OFF acti-
vation condition for the L3234.
The L3235 digital interface has four output pins :
1)OH provides the on hook/off hook or ring trip
informations (active low).
2)GDK provides the ground key on/off informa-
tion (active low).
3)PU must be connected to the enable input pin
of CODEC/FILTER devices like ETC 5054/57
and automatically activates this device when
in active mode off-hook is detected or when
ringing mode is selected.
4)CS output must be connected to the CS en-
able input of the solid state ringing injector
L3234.
In this way the L3234 will be enabled when ring-
ing mode is programmed and will be automat-
ically disabled when the ring trip condition will be
detected reducing the ringing signal disconnec-
tion time after ring trip.
The table 1 here below resumes the different op-
eration modes and the relative logic output sig-
nals.
The two current detection (hook and GND key)
have internal fixed threshold. Externally it is possi-
ble to program their time costant through two R-C
components connected respectively to pin 26
(RTF) and pin 27 (GKF).
L3235 FUNCTIONAL DIAGRAM
L3234 - L3235
13/26
OPERATING MODES
Stand-By
(SBY = 1 and RNG = 0)
In Stand-By mode the L3235 limits the DC Loop
current to 3 mA.
In this mode all the AC circuits are active and all
the AC characteristics are the same as in Active
Mode.
Also the two Line Current detectors (hook and
GND key) are active but due to the loop current
limited to 3 mA they will not be activated.
This mode is useful in emergency condition when
it is very important to limits the system power dis-
sipation.
Ringing Mode (SBY = 0 and RNG = 1)
When ringing mode is selected "CS" pin is set to
1 in order to activate the L3234 ringing injector.
See L3234 for detailed description.
Ring trip is detected by means of the same inter-
nal circuitry used for off-hook detection.
An off-hook delay time lower than
1
/
2
F
RING
should
be selected. (see ext. components list).
When ring trip is detected "CS" is automatically
set to "0" allowing in this way a quick ringing dis-
connection.
After Ring trip detection the Card Controller must
set the L3235 in active mode to remove the inter-
nal latching of the "CS" information.
Active mode (SBY = 0 and CS1 = 0)
In Active mode the L3235 has the DC charac-
teristic show in Fig.13
The DC characteristics of L3235 has two different
feeding conditions:
1)Current Limiting Region : (short loop) the DC
impedance of the SLIC is very high (>20
Kohm) therefore the system works as a cur-
rent generator. By the ext. resistor RLIM con-
nected at pin 19 it is possible to program limit-
ing current values from 20 mA to 70 mA.
2) Voltage source region (long loop).
The DC impedance of the L3235 is almost
equal to zero therefore the system works like
a voltage generator with in series the two ex-
ternal protection resistors Rp.
When a limiting current value higher than 40 mA
is programmed the device will automatically re-
duce to 40 mA the loop current for very short
loop.
This is done in order to limit the maximum power
dissipation in very short loop to values lower than
2W for the external transistor and lower than
0.5W for the L3235 itself.
This improve the system reliability reducing the
L3235 power dissipation and therefore the inter-
nal junction temperature.
Table 1.
OPERATING
MODE
INPUT PIN
LINE STATUS
OUTPUT PIN
SBY
RNG
0: ON HOOK
1: OFF HOOK
0: NO GND KEY
1: GND KEY ON
OH
GDK
PU
CS
ACTIVE
0
0
0
0
0
0
0
0
0
0
1
1
0
1
0
1
1
0
0
0
1
0
1
0
1
0
0
0
0
0
0
0
RINGING
0
0
0
0
1
1
1
1
0
0
1
1
0
1
0
1
1
0
0
0
1
0
1
0
0
0
0
0
1
0(*)
0(*)
0(*)
STAND-BY
1
1
0
1
X
X
X
X
1
1
1
1
1
0
0
1
(*)This status is latched and doesn't change until RNG turn to 0
L3234 - L3235
14/26
AC characteristic
A simplified AC model of the transmission circuits
is shown in figure 15.
Where :
V
rx
is the received signal
V
tx
is the transmitted signal
V
l
is the AC transversal voltage at line terminations.
E
g
is the line open circuit AC voltage
Z
l
is the line impedance
R
p
are the protection resistors
Z
B
is the line impedance balancing network
Z
A
is the SLIC impedance balancing network
Z
AC
program the AC line termination impedance
R
PC
used for external protection resistors insertion
loss compensation
I
l
/50
is the AC transversal current divided by 50
CAC AC feedback current decoupling
Figure 13: DC characteristic in Active Mode with two different values of limiting current (30mA and 70 mA).
Figure 14: Line current versus loop resistance with two different values of limiting current (30mA and
70mA)
L3234 - L3235
15/26
Two wire impedance
To calculate the impedance presented to the two
wire line by the SLIC including the protection re-
sistors R
p
and defined as Z
S
let:
V
rx
= 0
Il/50' = Il/50 (in first approximation)
Rp = 50
Z
S
= Z
AC
/25 + 2R
P
Z
AC
to make Z
S
= 600
Z
AC
= 25
(Z
S
- 2R
P
)
Z
AC
= 25
(600 - 100)
Z
AC
= 12.5K
Two wire to four wire gain (Tx gain)
Let V
rx
= 0
G
tx
=
V
tx
V
l
V
tx
V
l
= 2
Z
AC
+
R
PC
Z
AC
+
50R
P
Example: Calculate Gtx making R
PC
= 50
R
P
G
tx
=
2
Z
AC
+
50
R
P
Z
AC
+
50
R
P
=
2
As you can see the RPC resistor is providing the
compensation of the insertion loss introduced by
the two external protection resistors R
P
.
Four wire to two wire gain (Rx gain)
Let Eg = 0
G
rx
=
V
l
V
rx
=
50
Z
l
25
(
Z
l
+
2R
P
)
+
Z
AC
Example:
Calculate G
rx
making Z
AC
= 25
(Z
ML
- 2
R
P
)
G
rx
=
50
Z
l
25
(
Z
l
+
2R
P
-
2R
P
+
Z
ML
)
G
rx
=
2
Z
l
Z
l
+
Z
ML
In particular for Z
S
= Z
l
: G
rx
= 1
Hybrid function
To calculated the transhybrid loss (Thl) let: Eg = 0
Thl =
=
VT
x
VR
x
=
4
(
Z
B
Z
B
+
Z
A
-
50
(
2
R
P
+
Z
l
)
-
2R
PC
50
(
2
R
P
+
Z
l
)
-
2R
AC
)
Example:
Calculating Thl making R
S
= 50
R
P
, Z
S
= 25
(ZSlic - 2
R
P
)
Thl = 4
(
Z
B
Z
B
+
Z
A
-
Z
l
Z
l
+
Z
ML
)
In particular if
Z
A
Z
B
=
Z
S
Z
l
Thl = 0
From the above relation it is evident that if Z
S
is
equal to the Z
l
used in Thl test, the two Z
A
, Z
B
im-
pedances can be two resistor of the same value.
AC transmission circuit stability
To ensure stability of the feedback loop shown in
block diagram form in figure 15 two capacitors are
required. Figure 16 includes these capacitors Cc
and Ch.
AC - DC separation
The high pass filter capacitor C
AC
provides the
separation between DC circuits and AC circuits. A
CAC value of 100mF will position the low end fre-
quency response 3dB break point at 7Hz,
fsp =
1
2
220
C
AC
Figure 15: Simplified AC Circuits
L3234 - L3235
16/26
External components list for L3235
To set the SLIC into operation the following parameters have to be defined:
- The AC SLIC impedance at line terminals "Zs" to which the return loss measurements is referred. It can
be real (typ. 600
) or complex.
- The equivalent AC impedance of the line "Zl" used for evaluation of the trans-hybrid loss performance
(2/4 wire conversion). It is usually a complex impedance.
- The value of the two protection resistors Rp in series with the line termination.
Once, the above parameters are defined, it is possible to calculate all the external components using the
following table. The typical values has been obtained supposing: Zs = 600
; Zl = 600
; Rp = 50
Name
Suggested Value
Function
Formula
R
F
C
F
39K
390nF
Delay Time
On-hook Off-hook
= 0.69
C
F
39K
(1)
R
GF
C
GF
39K
390nF
Delay Time
GK Detector
= 0.69
C
GF
39K
R
R
51K
Bias Set
R
LIM
8.4K
to 33K
Ext. Current Limit. Progr.
R
LIM
=
564
I
LIM
-
3mA
CR
4.7
F
6.3 V 30%
Negative Battery
Filter
C
AC
=
1
2
16K
fp
R
P
50
Protection Resistors
47 < R
P
< 100
(2)
R
T
1M
20%
Termination Resistor
C
AC
100
F
6.3V 20%
DC/AC current feedback splitting
C
AC
=
1
2
220
f
sp
R
PC
2500
1%
R
P
insertion loss compensation
R
PC
= 25
(2R
P
)
Z
AC
12500
1%
2W AC Impedance programmation
Z
AC
= 25
(Z
S
- 2R
P
)
C
C
220pF 20%
AC Feedback compensation
f1 = 300KHz C
C
=
1
2
f1
50R
P
Z
AS
12500
1%
Slic Impedance Balancing Net.
Z
AS
= 25
(Z
S
- 2R
P
)
R
AS
2500
1%
RAS = 25
(2R
P
)
ZB
15K
1%
Line impedance Balancing Net.
Z
B
= 25
Zl
C
H
220pF 20%
C
C
Transybrid loss Compensation
C
H
= C
C
Z
AC
Z
AS
C
TX
4.7
F 30%
DC Decoupling Tx Output
C
TX
=
1
6.28
fp
Z
load
D1, D2
1N4007
Line Rectifier
Text
(3)
External Transistor
P
Diss
> 2W, V
CEO
> 60V
H
FE
> 40, I
C
> 100mA
V
BE
< 0.8V @ 100mA
CV
SS
; CV
DD
100nF
5V supply filter
C
VB
100nF/100V
V
BAT
supply filter
Notes:
1) For proper operation Cf should be selected in order to verify the following conditions:
A) cf > 150nF
B)
< 1/2
f
RING
f
RING
: Ringing signal frequency
2) For protection purposes the RP resistor is usually splitted in two part R
P1
and R
P2
, with R
P1
> 30
.
3) ex: BD140; MJE172; MJE350.... (SOT32 or SOT82 package available also for surface mount). For low power application (reduced battery
voltage) BCP53 (SOT223 surface mount package) can be used. Depending on application enviroment an heatsink could be necessary.
L3234 - L3235
17/26
Figure 16: Typical Appication Circuit Including L3234 and Protection
L3234 - L3235
18/26
ELECTRICAL CHARACTERISTICS (Test condition: refer to the test circuit of the fig. 17; V
CC
= 5V,
V
SS
= -5V, V
bat
= -48V, T
amb
= 25
C, unless otherwise specified)
Note: Testing of all parameters is performed at 25
C. Characterization, as well as the design rules used
allow correlation of tested performance with actual performance at other temperatures. All pa-
rameters listed here are met in the range 0
C to +70
C. For applications requiring operations in
the standard temperature range (0
C to 70
C) use L3234. If operations are required in the ex-
tended temperature range (-40
C to 85
C), use the L3234T.
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Fig.
STAND-BY
V
ls
Output Voltage at TIP/RING
pins
I
LINE
= 0
35.7
39
V
I
LCC
Short Circuit Current
Stand-by, SBY = 1
2
3
4
mA
DC OPERATION
V
lP
Output Voltage at TIP/RING
pins
I
LINE
= 0
I
LINE
= 50mA
35.7
35.2
39
39
V
V
I
lim
Current Progr.
I
lim
Prog. = 70mA
63
70
77
mA
I
lim
Current Progr.
8.4K
< R
LIM
< 33K
20
70
mA
I
O
On-hook Threshold
5
I
f
Off-hook Threshold
10
I
lgk
GK Detector Threshold
10
17
Gklim
Ground Key Current
Limitation
RING to BGND
13
22
mA
Gkov
Ground Key Threshold
Overloap
Gklim-Ilgk
1
mA
I
max
Max. Output Current at
TIP/RING
I
lim
= 70mA
90
140
mA
IV
CC
Supply Current from V
CC
I
line
= 0
6.2
8
mA
IV
SS
Supply Current from V
SS
Iline = 0
1.6
2.1
mA
IV
bat
Supply Current from V
bat
Iline = 0
2.8
3.6
mA
AC OPERATION
Z
tx
Sending Output Impedance
pin 9 (Tx)
10
Z
rx
Receiving Input Impedance
pin 12 (Rx)
1
M
R
l
2W Return Loss
f = 300 to 3400Hz
20
36
dB
A1
Thl
Trans Hybrid Loos
f = 300 to 3400Hz
20
36
dB
A2
G
s
Sending Gain
f = 1020Hz I
l
= 20mA
5.82
6.02
6.22
dB
A3
G
sf
Flatness
f = 300 to 3400Hz
-0.2
0.2
dB
G
sl
Linearity
-20dB to 10dBm
-0.2
0.2
dB
G
r
Receiving Gain
f = 1020Hz I
l
= 20mA
0.2
0
0.2
dB
A4
G
rf
Flatness
f = 300 to 3400Hz
-0.2
0.2
dB
G
rl
Linearity
-20dBm to +4dBm
-0.2
0.2
dB
Np4W
Psoph. Noise at Tx
-69
-62
dBmp
Np2W
Psoph. Noise at Line
-75
-68
dBmp
S
vrr
Relative to V
bat
versus Line
Terminal versus Tx Terminal
f = 1020Hz
V
S
= 100mVpp
-30
-24
dB
dB
A5
S
vrr
Relative to V
cc
and V
ss
versus Line Terminal versus
Tx Terminal
f = 1020Hz
V
S
= 100mVpp
-20
-14
dB
dB
L
tc
L/T Conversion measured at
line Terminals
f = 300 to 3400
I
line
= 20mA
49
53(*)
dB
dB
A6
T
lc
T/L Conversion Measured at
Line Terminals
f = 300 to 3400
I
line
= 20mA
46(*)
dB
A7
(*) Selected parts L3235C
L3234 - L3235
19/26
Figure 17: Test Circuit
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Fig.
DIGITAL STATIC INTERFACE
V
il
Input Voltage at Logical "0"
Input SBY, CS1
0
0.8
V
V
ih
Input Voltage at Logical "1"
Input SBY, CS1
2
5
V
I
il
Input Current at Logical "0"
Input SBY, CS1
10
A
I
ih
Input Current at Logical "1"
Input SBY, CS1
10
A
V
ol
Output Voltage at Logical "0"
I
out
= 1mA
I
out
= 10
A
0.5
0.4
V
V
V
oh
Output Voltage at Logical "1"
I
out
= 10
A
I
out
= 1mA
4
2.7
V
V
L3234 - L3235
20/26
APPENDIX A
L3235 TEST CIRCUITS
Referring to the test circuit reported in fig 17 you
can find the proper configuration for the main
measurements.
In particular:
A-B: Line terminals
C: Tx sending output on 4W side
D: Rx receiving input on 4W Side
Figure A1: 2W Return Loss
Figure A2: Trans-hybrid Loss
R
L
= 20 log
| Z
ML
-
Z |
| Z
ML
+
Z |
= 20 log
| 2V
S
|
| E |
Figure A3: Sending Gain
T
HL
= 20log
V
S
V
R
100
F
100
F
100
F
100
F
100
F
100
F
L3234 - L3235
21/26
TEST CIRCUITS (continued)
Figure A4: Receiving Gain
Figure A5: SVRR Relative to Battery Voltage VB
Figure A6: Longitudinal to Transversal Conversion
100
F
100
F
100
F
100
F
L3234 - L3235
22/26
APPENDIX B
LAYOUT SUGGESTIONS
Standard layout rules should be followed in order
to get the best system performances:
1) Use always 100nF filtering capacitor close to
the supply pins of each IC.
2) The L3235 bias resistor (RR) should be connected
close to the corresponding pins of L3235
(REF and AGND).
Figure A7: Transversal to Longitudinal Conversion
L3234 - L3235
23/26
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.8
0.189
C
1.37
0.054
D
2.4
2.8
0.094
0.110
D1
1.2
1.35
0.047
0.053
E
0.35
0.55
0.014
0.022
F
0.6
0.8
0.024
0.031
F1
0.9
0.035
G
2.41
2.54
2.67
0.095
0.100
0.105
G1
4.91
5.08
5.21
0.193
0.200
0.205
G2
7.49
7.62
7.8
0.295
0.300
0.307
H2
9.2
10.4
0.362
0.409
H3
10.05
10.4
0.396
0.409
L
4.6
5.05
0.181
0.198
L1
3.9
4.1
4.3
0.153
0.161
0.170
L2
6.55
6.75
6.95
0.253
0.265
0.273
L3
5.9
6.1
6.3
0.232
0.240
0.248
L5
2.6
2.8
3
0.102
0.110
0.118
L6
15.1
15.8
0.594
0.622
L7
6
6.6
0.236
0.260
M
0.17
0.32
0.007
0.012
V2
8
(max)
Dia
3.65
3.85
0.144
0.152
Heptawatt (Surface Mount)
April 1999
OUTLINE AND
MECHANICAL DATA
L3234 - L3235
24/26
PLCC28
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
12.32
12.57
0.485
0.495
B
11.43
11.58
0.450
0.456
D
4.2
4.57
0.165
0.180
D1
2.29
3.04
0.090
0.120
D2
0.51
0.020
E
9.91
10.92
0.390
0.430
e
1.27
0.050
e3
7.62
0.300
F
0.46
0.018
F1
0.71
0.028
G
0.101
0.004
M
1.24
0.049
M1
1.143
0.045
OUTLINE AND
MECHANICAL DATA
L3234 - L3235
25/26
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L3234 - L3235
26/26