1/13

L5951

January 2001

3 VOLTAGE REGULATORS:
3.3V (100mA) STANDBY REGULATOR
5V (100mA) STANDBY REGULATOR
7.8V (100mA)

OUT OF REGULATION DETECTION FOR 5V-
STANDBY REGULATOR

WIDE OPERATING SUPPLY VOLTAGE
RANGE FROM 4.5V UP TO 26.5V FOR
TRANSIENT 34V

VERY LOW STANDBY QUIESCENT
CURRENT (<150

INPUT TO OUTPUT SIGNAL TRANSFER
FUNCTION PROGRAMMABLE

LVS FUNCTION

TTL AND CMOS COMPATIBLE INPUTS

OUTPUT CURRENT LIMITATION

CONTROLLED OUTPUT SLOPE FOR LOW
EMI

OVERTEMPERATURE SHUT-DOWN

ABLE TO SURVIVE UNDER LOSS OF

GROUND OR BATTERY

ESD PROTECTED

DESCRIPTION

The L5951 is a monolithic triple regulator integrated
with a SAE J1850 Integrated Driver / Receiver real-
ized in advanced Multipower-BCD technology. It is
intended to drive single wire J1850 communications,
and offer microcontroller power and power manage-
ment for automotive or industrial applications.

SO24

ORDERING NUMBER: L5951

TRIPLE OUTPUT MULTIFUNCTION VOLTAGE REGULATOR

FOR CAR RADIO WITH IDR/CLASS 2 INTERFACE

BLOCK DIAGRAM

SUPPLY

SELECTOR

BANDGAP

REFERENCE

STANDBY

RESET

ENABLE/

PROTECTION

LOGIC

7.8V

BUS DRIVER

WAVESHAPING

FILTER

4XEN AND

LOOPBACK

DIGITAL OUTPUT

DRIVER

LOSS

OF GND

PROTECTION

LOAD

GND

BUS

REG3

RESET

REG2

REG1

VBAT

LVS

SLEEP

LOOP

D99AU991

L5951

2/13

FUNCTIONAL DESCRIPTION

1.1 General Features

The L5951 is an integrated circuit which provides a J1850 physical layer as well three voltage regulators. The
L5951 was developed to provide the power and Class 2/IDR interface for a microcontroller.

1.2 REG1 Output Voltage

The REG1 regulator output is equal to 3.3V. The 3.3V regulator is non low drop out and can handle currents up
to 100mA with short citcuit limit of 280mA.

1.3 REG2 Output Voltage

The REG2 regulator output is equal to 5V and can handle currents up to 100mA with short citcuit limit of 280mA.
The output stage of the 5V regulator is low dropout.

1.4 REG3 Output Voltage

The REG3 regulator output is equal to 7.8V and can handle currents up to 100mA with short citcuit limit of
280mA. The output stage of the 7.8V regulator is low dropout. REG3 regulator is controlled by the EN (enable)
pin of the IC. REG3 can be turned on and off by toggling the EN pin. A logic "1" on the EN pin enables REG3,
while a logic "0" on the EN pin disables REG3. The maximum voltage when REG3 is off must be less than 0.2V.

Sleep* Input - The Class 2 transmitter can be turned on and turned off by the Sleep* pin. Once the voltage level
is above 2VDC, the transmitter is enabled. If the Sleep* pin drops below 0.8VDC, and EN is "0" the transceiver
goes into a low power mode. In low power mode, REG3 and the transceiver are disabled. The L5951 will still
receive messages and send them to the microcontroller out of the RX pin.

* denotes active low

LVS input - Reg1 and Reg2 are supplied by Vbat pin. The device could then dissipate a lot of power, causing
thermal shutdown at high voltage. For this reason a secondary low voltage supply (LVS) can be used to reduce
power dissipation.

Reset* Output - The L5951 has low voltage or no voltage circuitry that is a warning to the microcontroller. If
REG2 drops 0.3VDC below its normal operating voltage, the Reset* pin will go to a logic "0". Between the volt-
age levels of 4.65VDC (min) and 5.10VDC (max) on REG2, a reset will occur. There is a hysterisis of 50mV on
the Reset* pin.

* denotes active low

Low Input Voltage Operation - If battery voltage level drops below 7.0V, the outputs are to remain alive and
ready for the return of normal voltage battery levels. The L5951 will be able to retrieve data off the BUS and
send it to the micrprocessor when the supply voltage is as low as 4.9V. The regulators should stay the same
voltage as the battery voltage down to 7.0V minus operating headroom for the 7.8V regulator. BUS V

OH,min

are

not guaranteed over all conditions below VBAT = 9.0V.

Waveshaping - Messages sent by the microcontroller to the transceiver are routed to a waveshaping circuit.
The digital signal is rounded at the switching points in order to reduce EMI emissions. A second order function,
I = C*dV/dt, is used to control the rise and fall times of the transmission. The rise and fall times are controlled
by an external resistor Rext . The waveshaping circuit can be enabled and disabled by the 4X pin. A logic "1"
will disable the waveshape circuit and a logic "0" will enable the waveshape circuit. In 4X mode, the speed of
the BUS is increased by a factor of four. Any signal coming from the microcontroller and going to the BUS must
be waveshaped. If loopback(LOOP) is enabled, the signal coming from the micro through the TX pin is routed
to the RX pin back to the micro with or without it being waveshaped. A logic "1" enables loopback and a logic"0"
disables loopback.

Nodes - The transmitter provides a wave-shaped 0 to 7.7 VDC waveform on the BUS output. It also receives
waveforms and transmits a digital level signal back to a logic IC. The transmitter can drive up to 32 remote trans-
ceivers. These remote nodes may be at ground potentials that are ±2 VDC, with respect to the assembly. Under
this condition, waveshaping will only be maintained during 3 of the 4 corners. The L5951 is a remote node on
the Class 2/IDR Bus. Each remote transceiver has a 470 + 10% pF capacitor on its output for EMI suppression,

3/13

L5951

as well as a 10.6 kW + 5% pull down resistor to ground. The main node has a 3,300 + 10% pF capacitor on its
output for EMI suppression, as well as a 1.5 k

+ 5% pull down resistor to ground. With more than 26 nodes

there is no primary node , all nodes will have the 470 ±10% pF capacitor and the 10.6k

5% pull down resistor.

No matter how many remote nodes are on the Class 2/IDR Bus, the RC of the Class 2/IDR Bus is maintained
at approximately 5ms. The minimum and maximum load on the Class 2/IDR Bus is given below :

1.5 Protection

The L5951 can survive under the following conditions: shorting the outputs to BAT and GND, loss of BAT, loss
of IC GND, double battery(+26.5V), 4000V ESD, 34V load dump. L5951 will not handle a reverse battery con-
dition. External components must be implemented for reverse battery protection.

Thermal Shutdown: thermal shutdown is broken down into two areas; V1 and V2 ouputs, and the other is V3
output and the Class 2 Bus Driver. V1 and V2 outputs shutdown at 160°C and returns to normal operation at
130°C. The V3 output and Class 2 Bus Driver shutdown at 150°C and return to normal operation at 120°C.

Current Limiting: each voltage regulator will contain its own current protection, and the maximum allowable cur-
rent for all three regulators is 280mA.

Short Circuit: If the outputs are short circuited, the IC will begin current limiting and eventually the thermal shut-
down will kick in. Current limiting will not disable the outputs.

Overvoltage: The IC will not operate if the BAT voltage reaches 30V or above. V1 and V2 will not be shutdown,
but all other outputs will not operate.

Loss of Ground & Loss of Battery Connection: in this conditions a very small leakage on BUS is generated.

1.6 Protocol Description

The L5951 uses a Variable Pulse Width (VPW) modulated protocol. One frame consists of an entire message
not containing more than 12 bytes. The first bit of each byte will be the most significant bit (MSB). A transmitted
message begins with a SOF signal and ends with the EOF signal.

The data to be transmitted has to be in a specific format as follows:

idle,SOF,DATA, CRC, EOD, NB, IFR, EOF, IFS, idle

Definitions below:

idle:

Logic level low on communication bus

SOF:

Start of Frame

DATA: Data Bytes

CRC:

Cyclic Redundancy Check Error Detection Byte

EOD:

End of DATA(only when IFR is used)

NB: Normalization

Bit

IFR:

In-Frame Response Byte(s)

EOF:

End of Frame

IFS: Inter-Frame

Separation

BRK:

Break(can occur on network at any time)

Idle - Logic level low on bus any time after IFS.

Start of Frame (SOF) - The SOF signals the receiver that a new frame is beginning. SOF signal is a logic level

Capacitance

Resistance to Ground

Minimum Nodes

(3.33 · .9) + (.47 · .9) = 3.39 nF

(1.5 · 1.05) || (10.6 · 1.05) = 1.38 k

Maximum Nodes

(3.3 · 1.1) + 25·(0.47 · 1.1) = 16.55 nF (1.5 · 0.95) || (10.6 · 0.95) / 25 = 314

L5951

4/13

high pulse identified by a pulse width of about t = 200

DATA - Total number of bytes that can be transmitted (from SOF to EOF) is 12 bytes.

Cyclic Redundancy Check (CRC) - A method for determining if the message received is the same as the mes-
sage transmitted. If an invalid CRC number is detected, then an error will be detected. The SOF signal is not
used to determine the CRC. All bits in the CRC are initially "ones" to avoid confusion with a data stream that are
all "zeros".

End of Data (EOD) - Used to signal the receiver about the end of data transmission. If there is a IRF signal, the
sender of the frame will expect one or more bytes in the IFR following the EOD. If there is no IFR used, then the
bus would stay in a logic level low state resulting in a EOF. EOD signal is recognized by a logic level low pulse
for a duration of about 200

Normalization Bit (NB) - The sole reason for the NB is to define the start of the in-frame response. The first bit
the the IFR is passive, therefore it is necessary to have a signal that follows EOD. There are two forms to the
NB. First of all, the NB is a logic level high pulse. The two forms are distinguished by thier pulse widths. The first
form has a pulse width of about 64

s and indicates if the IFR contains a CRC or not. The second form has a

longer pulse width of about 128

s and also indicates if there is a CRC in the IFR or not. The manufacturer can

manipulate the NB to any of the two methods.

In-Frame Response (IFR) - Response bytes are sent by the receiver of the transmission and start after the
EOD. If the IFR stays at a logic level low for a period of time then the frame must be considered to be complete.
IFR bytes can be used to send a signal back to the originator indicating the correct CRC number to confirm the
correct message was sent.

End of Frame (EOF) - Indicates the end of a frame. Once the last byte is transmitted, the bus will be in a logic
level low state for a period of time indicating the end of the frame. EOF signal is recognized by a low pulse for
a width of about 280

Inter-Frame Separation (IFS) - IFS is used to synchronize the receivers at various nodes.

ABSOLUTE MAXIMUM RATINGS

* denotes active low

THERMAL DATA

(*) With 6cm2 on board heat sink area.

Symbol

Parameter

Value

Unit

DC Operating Supply Voltage

-0.6 to 26.5

DIAG

Diagnostic output voltage

-0.6 to 5.5

Input Control Voltage (EN, Sleep, 4X, Loop, TX)

-0.6 to 5.5

OUT

Output Control Voltage (Reset *)

-0.3 to 5.5

Peak Supply Voltage t = 50ms

Operating Temperature Range

-40 to 85

°C

stg

Storage Temperature Range

-40 to 150

°C

Symbol

Parameter

Value

Unit

th j-amb

Thermal resistance junction to ambient (*)

°C/W

5/13

L5951

PIN CONNECTION

PIN FUNCTIONS

*denotes active low for Sleep and Reset.

Name

Function

REG1

Regulator #1

Reset *

Reset Output to

Rext

Waveshaping Resistor

GND_REG

Regulator Ground

,6,7,8,17,

18,19,20

GND_TX

Transceiver Ground

Sleep *

Transceiver Enable Input

Enable for Regulator #3

4XBus mode (41.6K Baud)

LOOP

Loopback Enable

Serial Data Output to mC

Serial Data Input from mC

Load

External Pull Down to Gnd

Bus

Bus Output to Vehicle

Bat

Battery Supply

REG3

Regulator #3

REG2

Regulator #2

LVS

Low Voltage Supply

REG1

RESET

REXT

GND_REG

GND_TX

SLEEP

BUS

GND_TX

BAT

REG3

REG2

LVS

LOAD

D99AU992

LOOP

L5951

6/13

ELECTRICAL CHARACTERISTICS

amb

= 25°C, V

BAT

= 14.4V unless otherwise specified. Standard Loads: I

REG1

= 0.5mA, I

REG2

= 0.5mA, I

REG3

= 5mA)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

q,ST-BY

Standby Quiescent Current

EN, Sleep* = 0V, V

BAT

= 14V,

REG2

= 50mA, I

REG1

= 50mA

EN, Sleep* = 0V, V

BAT

= 14V,

REG2

= 500

A, I

REG1

= 250mA

350

110

Maximum QuiescentCurrent -
V

BAT

= 14V, I

REG1

= 100mA,

REG2

= 100mA, I

REG3

= 100mA,

BUS

= 30mA

LVS = 0V

LVS = 10V

10.5

mA
mA

Maximum QuiescentCurrent -
LVS

BAT

= 14V, I

REG1

= 100mA,

REG2

= 100mA, I

REG3

= 100mA,

BUS

= 30mA LVS = 10V

750

EN Switch Input Current

BAT

= 14V, EN

BAT

= 14V, EN

0.8V

0
0

ENL, ENH

EN Input Threshold Voltage

BAT

= 14V, VIL

BAT

= 14V, VIH

0.8

RES, L

Reset* Output Low Voltage

Set V

BAT

so V

REG2

drops 0.30V

0.02

0.4

RES

Reset* Output Voltage Threshold

Decrease V

BAT

so V

REG2

drops

until Reset* drops

REG2

- 0.20

RES, HYS

Reset Threshold Hysteresis

(*) Denotes active low.

3.3V/100mA DC Characteristics for Regulator Output 1

REG1

Output Voltage

REG1

=100mA

3.14

3.3

3.46

line

Line Regulation

BAT

26V

(Measure

REG1

Across V

BAT

Range)

load

Load Regulation

0.5mA

REG1

100mA

(Measure

REG1

Across V

LOAD

Range)

DROPOUT

Dropout Voltage (Measure V

BAT

REG1

when V

REG1

drops 0.1V)

REG1

= 100mA

REG1

= 5mA

0.12

2.2
1.5

V
V

lim1

Current Limit

200

SVR1

Reg1 Supply Voltage Rejection

REG1

= I

REG2

= I

REG3

= 50mA

f = 20 to 20kHz
VBAT = 14Vdc, 1Vac,pp

5V/100mA Regulator Output 2

REG2

Output Voltage

REG2

=100mA

4.75

5.25

line

Line Regulation

BAT

26V

(Measure

REG2

Across V

BAT

Range)

7/13

L5951

load

Load Regulation

0.5mA

REG2

100mA

(Measure

REG2

Across V

LOAD

Range)

100

DROPOUT

Dropout Voltage (Measure V

BAT

REG2

when V

REG2

drops 0.1V)

REG2

=100mA

REG2

=5mA

450

mV
mV

lim2

Current Limit

200

SVR2

Reg2 Supply Voltage Rejection

REG1

= I

REG2

= I

REG3

= 50mA

f = 20 to 20kHz
VBAT = 14Vdc, 1Vac,pp

7.8V/100mA Regulator Output 3

REG3

Output Voltage

REG3

=100mA - 8.8V

BAT

Range

7.60

7.8

line

Line Regulation

8.8V

BAT

26V

(Measure

REG3

Across V

BAT

Range)

load

Load Regulation

5mA

REG3

100mA

(Measure

REG3

Across V

LOAD

Range)

DROPOUT

Dropout Voltage
(Measure V

BAT

- V

REG3

when

REG3

drops 0.1V)

REG3

= 100mA

REG3

= 5mA

0.5

0.04

V
V

lim3

Current Limit

200

SVR3

Reg3 Supply Voltage Rejection

REG1

= I

REG2

= I

REG3

= 50mA

f = 20 to 20kHz
VBAT = 14Vdc, 1Vac,pp

DC Characteristics for Class 2 Transceiver

Standard Loads: I

REG1

= 0.5mA, I

REG2

= 0.5mA, I

REG3

= 5mA

BUS

BUS Guaranteed
Input Voltages

Verify RX > 3 VDC
Verify RX < 3 VDC

4.25

3.7

3.50

V
V

BUS

Hyst

BUS Hysteresis

BUS

Itoh

- BUS

hhtol

0.15

BUSov

BUS Output Voltage

TX = 5 VDC,
BUS = 257 to 1380

to gnd

BAT

- 8.2 to 16 VDC

BAT

- 6.0 to 8.2 VDC

TX = 0V

7.2

V
V

BUSshort

BUS Short Circuit Current

TX = 5VDC
BUS = -2 to 4.8VDC

170

BUSleak

BUS Leakage Current

BUS = -2 to 0 VDC
BUS = 0 to V

BAT

0
0

mA
mA

LOAD

Load Output

LOAD

= 6mA

0.045

ELECTRICAL CHARACTERISTICS (continued)

amb

= 25°C, V

BAT

= 14.4V unless otherwise specified. Standard Loads: I

REG1

= 0.5mA, I

REG2

= 0.5mA, I

REG3

= 5mA)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

L5951

8/13

LOAD

Dio

Load Output (Unpowered)

BAT

= 0V, I

LOAD

= 6mA

0.7

BUSloss

LOADloss

BUS & LOADCurrent during loss
of assembly V

BAT

or GND

VBAT

= 0mA,

BUS = -18 to 9VDC
LOAD = -18 to 0 VDC

11
39

VIL

VIH

TX Input Voltage

Verify BUS < 3.875VDC
Verify BUS > 3.875VDC

0.8

V
V

TXVIL

TXVIH

TX Input Current

TX = 5VDC
TX = 0VDC

110

Trip1

Trip2

4X Input Trip Point Voltages

Normal Mode
4X Mode

1.4

4Xvih

4Xvil

4X Input Current

4X = 5 VDC
4X = 0 VDC

0
0

Trip1

Trip2

LOOP Input Trip Point Voltages

Normal Mode
Loopback Mode

0.8

V
V

Lvih

Lvil

LOOP Input Current

LOOP = 5VDC
LOOP = 0VDC

RXhigh

RX Output Voltage, High

BUS = 7V, I

= -200

4.85

RXlow

RX Output Voltage, Low

BUS = 0V, I

= 1.6mA

0.2

RX Output Current

RX = high (Short circuit protection
limits)

Sleep* V

Sleep*V

Sleep* Input Voltage

TX = 5VDC
Verify BUS > 3.725
Verify BUS < 4.025

0.8

V
V

Sleepvih

Sleepvil

Sleep* Input Current

Sleep* = 5VDC
Sleep* = 0VDC

0.2

* Denotes active low for Sleep and Reset.

AC Characteristics for Class 2 Transceiver

Standard Loads: IREG1 = 0.5mA, IREG2 = 0.5mA, IREG3 = 5mA

BUS

LTOH

BUS Voltage Rise Times

TX = 7.812Hz square wave
See Figure 1
Min and Max Loaded BUS

BUS

HTOL

BUS Voltage Fall Times

TX = 7.812Hz square wave
See Figure 1
Min and Max Loaded BUS

Wbus

BUS Pulse Width Distortion

TX = 7.812Hz square wave
See Figure 2
Load BUS with 3.300pF and
1.38k

Meas. @ 1.5V levels
Meas. @ 6.25V levels

77
48

ELECTRICAL CHARACTERISTICS (continued)

amb

= 25°C, V

BAT

= 14.4V unless otherwise specified. Standard Loads: I

REG1

= 0.5mA, I

REG2

= 0.5mA, I

REG3

= 5mA)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

9/13

L5951

BUS TIMING DIAGRAM

Figure 1. BUS Rise and Fall Times

Figure 2. BUS Pulse Width Distortion

Spectral Content Limit
(Measure spectral peak from
0.53MHz to 1.6MHz)

BAT

= 9V to 16V, no ground

offset, 0.53

1MHz.

BAT

= 9V to 16V, no ground

offset, 1

1.67MHz.

100

BUS

DLY

Propagation Delay

Measure Delay Between TX Trip
Point and RX Trip Point

4XDLY

NormDLY

TX to BUS Delay

Measure from 2.5V on TX to
3.875V on BUS
4X Mode
Normal Mode

3.5

14.5

LTOHdly

HTOLdly

RX Output Delay Time

See Figure 4
Measured from BUS Threshold
Voltage

1.5
1.9

LTOH

HTOL

RX Output Transition Time

Load RX with 50pF to Ground
See Figure 5

170

ns
ns

LTOH

HTOL

RX Output Transition Time During
Sleep State

Load RX with 50pF to Ground
See Figure 5, Sleep* = 0VDC

170

ns
ns

ELECTRICAL CHARACTERISTICS (continued)

amb

= 25°C, V

BAT

= 14.4V unless otherwise specified. Standard Loads: I

REG1

= 0.5mA, I

REG2

= 0.5mA, I

REG3

= 5mA)

Symbol

Parameter

Test Condition

Min.

Typ.

Max.

Unit

sec

6.25V

BUS

1.5V

trise

tfall

6.25V

1.5V

D99AU993

sec

6.25V

BUS

1.5V

D99AU994

3.875V

>35

sec

<93

sec

Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

The ST logo is a registered trademark of STMicroelectronics

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13/13

L5951

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