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PRELIMINARY DATA
April 2002
STL5NK65Z
N-CHANNEL 650V - 1.5
- 4.2A PowerFLATTM
Zener-Protected SuperMESHTMPower MOSFET
s
TYPICAL R
DS
(on) = 1.5
s
EXTREMELY HIGH dv/dt CAPABILITY
s
IMPROVED ESD CAPABILITY
s
100% AVALANCHE RATED
s
GATE CHARGE MINIMIZED
s
VERY LOW INTRINSIC CAPACITANCES
s
VERY GOOD MANUFACTURING
REPEATIBILITY
DESCRIPTION
The SuperMESHTM series is obtained through an
extreme optimization of ST's well established strip-
based PowerMESHTM layout. In addition to pushing
on-resistance significantly down, special care is tak-
en to ensure a very good dv/dt capability for the
most demanding applications. Such series comple-
ments ST full range of high voltage MOSFETs in-
cluding revolutionary MDmeshTM products.
APPLICATIONS
s
LIGHTING
s
IDEAL FOR OFF-LINE POWER SUPPLIES,
ADAPTORS AND PFC
ORDERING INFORMATION
TYPE
V
DSS
R
DS(on)
I
D
(1)
Pw (1)
STLNK65Z
650 V
< 1.8
4.2 A
75 W
SALES TYPE
MARKING
PACKAGE
PACKAGING
STL5NK65Z
L5NK65Z
PowerFLATTM (5x5)
TAPE & REEL
PowerFLATTM(5x5)
(Chip Scale Package)
INTERNAL SCHEMATIC DIAGRAM
STL5NK65Z
2/6
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
Note: 1. The value is rated according to R
thj-F
.
2. When Mounted on FR-4 Board of 1inch
2
, 2 oz Cu
3. Pulse width limited by safe operating area
4. I
SD
<4.2A, di/dt<300A/s, V
DD
<V
(BR)DSS
, T
J
<T
JMAX
AVALANCHE CHARACTERISTICS
GATE-SOURCE ZENER DIODE
PROTECTION FEATURES OF GATE-TO-SOURCE ZENER DIODES
The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device's
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to souce. In this respect the Zener voltage is appropriate to achieve an efficient and cost-
effective intervention to protect the device's integrity. These integrated Zener diodes thus avoid the usage
of external components.
Symbol
Parameter
Value
Unit
V
DS
Drain-source Voltage (V
GS
= 0)
650
V
V
DGR
Drain-gate Voltage (R
GS
= 20 k
)
650
V
V
GS
Gate- source Voltage
30
V
I
D
(2)
Drain Current (continuous) at T
C
= 25C (Steady State)
Drain Current (continuous) at T
C
= 100C
0.76
0.48
A
A
I
DM
(2)
Drain Current (pulsed)
3
A
P
TOT
(2)
Total Dissipation at T
C
= 25C (Steady State)
2.5
W
P
TOT
(1)
Total Dissipation at T
C
= 25C (Steady State)
75
W
Derating Factor (2)
0.02
W/C
dv/dt (4)
Peak Diode Recovery voltage slope
4.5
V/ns
T
stg
Storage Temperature
55 to 150
C
T
j
Max. Operating Junction Temperature
Symbol
Parameter
Max.
Unit
Rthj-F
Thermal Resistance Junction-Foot (Drain)
1.67
C/W
Rthj-amb (2)
Thermal Resistance Junction-ambient
50
C/W
Symbol
Parameter
Max Value
Unit
I
AR
Avalanche Current, Repetitive or Not-Repetitive
(pulse width limited by T
j
max)
4.2
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25 C, I
D
= I
AR
, V
DD
= 50 V)
190
mJ
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
BV
GSO
Gate-Source Breakdown
Voltage
Igs= 1mA (Open Drain)
30
V
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STL5NK65Z
ELECTRICAL CHARACTERISTICS (TCASE =25C UNLESS OTHERWISE SPECIFIED)
ON/OFF
DYNAMIC
SWITCHING
SOURCE DRAIN DIODE
Note: 1. Pulsed: Pulse duration = 300 s, duty cycle 1.5 %.
2. Pulse width limited by safe operating area.
3. C
oss eq.
is defined as a constant equivalent capacitance giving the same charging time as C
oss
when V
DS
increases from 0 to 80%
V
DSS
.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
(BR)DSS
Drain-source
Breakdown Voltage
I
D
= 1 mA, V
GS
= 0
650
V
I
DSS
Zero Gate Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating, T
C
= 125 C
1
50
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
GS
= 20V
10
A
V
GS(th)
Gate Threshold Voltage
V
DS
= V
GS
, I
D
= 50A
3
3.75
4.5
V
R
DS(on)
Static Drain-source On
Resistance
V
GS
= 10V, I
D
= 2.1 A
1.5
1.8
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
g
fs
(1)
Forward Transconductance
V
DS
= 10 V
,
I
D
= 2.1 A
5
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacitance
Reverse Transfer
Capacitance
V
DS
= 25V, f = 1 MHz, V
GS
= 0
680
80
17
pF
pF
pF
C
oss eq.
(3)
Equivalent Output
Capacitance
V
GS
= 0V, V
DS
= 0V to 480 V
98
pF
R
G
Gate Input Resistance
f=1 MHz Gate DC Bias = 0
Test Signal Level = 20mV
Open Drain
4
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
t
d(on)
t
f
t
d(off)
t
f
Turn-on Delay Time
Fall Time
Turn-off Delay Time
Fall Time
V
DD
= 325 V, I
D
= 2.1 A
R
G
= 4.7
V
GS
= 10 V
(Resistive Load see, Figure 3)
20
15
140
40
ns
ns
ns
ns
Q
g
Q
gs
Q
gd
Total Gate Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 520V, I
D
= 4.2 A,
V
GS
= 10V
25
4.4
13.7
35
nC
nC
nC
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
I
SD
I
SDM
(2)
Source-drain Current
Source-drain Current (pulsed)
0.76
3
A
A
V
SD
(1)
Forward On Voltage
I
SD
= 0.76 A, V
GS
= 0
1.6
V
t
rr
Q
rr
I
RRM
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
I
SD
= 4.2 A, di/dt = 100A/s
V
DD
= 100V, T
j
= 150C
(see test circuit, Figure 5)
375
1.76
10
ns
C
A
STL5NK65Z
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Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
Fig. 4: Gate Charge test Circuit
Fig. 2: Unclamped Inductive Waveform
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuit For
Resistive Load
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STL5NK65Z
DIM.
mm.
inch
MIN.
TYP
MAX.
MIN.
TYP.
MAX.
A
0.90
1.00
0.035
0.039
A1
0.02
0.05
0.001
0.002
b
0.43
0.51
0.58
0.017
0.020
0.023
c
0.64
0.71
0.79
0.025
0.028
0.031
D
5.00
0.197
E
5.00
0.197
E2
2.49
2.57
2.64
0.098
0.101
0.104
e
1.27
0.050
PowerFLATTM(5x5) MECHANICAL DATA
STL5NK65Z
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. STMicroelectronics products are not authorized for use as critical components in life support devices or
systems without express written approval of STMicroelectronics.
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