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Электронный компонент: L6204

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L6204
DMOS DUAL FULL BRIDGE DRIVER
ADVANCE DATA
SUPPLY VOLTAGE UP TO 48V
R
DS(ON)
1.2
(25
C)
CROSS CONDUCTION PROTECTION
THERMAL SHUTDOWN
0.5A DC CURRENT
TTL/CMOS COMPATIBLE DRIVER
HIGH EFFICIENCY CHOPPING
DESCRIPTION
The L6204 is a dual full bridge driver for motor
control applications realized in BCD technology
which combines isolated DMOS power transistors
with CMOS and Bipolar circuits on the same chip.
By using mixed technology it has been possible to
optimize the logic circuitry and the power stage to
achieve the best possible performance.
The logic inputs are TTL/CMOS compatible. Both
channels are controlled by a separate Enable.
Each bridge has a sense resistor to control the
currenrt level.
The L6204 is mounted in an 20-lead Powerdip
and SO 24+2+2 packages and the four center
pins are used to conduct heat to the PCB. At nor-
mal operating temperatures no external heatsink
is required.
This is advanced information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
March 1994
BLOCK DIAGRAM
Powerdip 16+2+2
SO 24+2+2
ORDERING NUMBERS:
L6204
L6204D
MULTIPOWER BCD TECHNOLOGY
1/10
PIN FUNCTIONS
SO
Pin
(*)
DIP
Pin
Symbols
Fun ctions
1
2
3
6
7
8
9
12
13
14
15
16
17
20
21
22
23
26
27
28
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
SENSE 1
IN1
ENABLE 1
OUT 1
GND
GND
OUT 3
ENABLE 2
IN 3
SENSE 2
BOOSTRAP OSC. VCP
IN 4
OUT 4
V
S
2
GND
GND
V
S
1
OUT 2
IN 2
VBOOT
Sense resistor to provide the feedback for motor current control of the bridge A
Digital input from the motor controller (bridge A)
A logic level low on this pin disable the bridge A
Output of one half bridge of the bridge A
Common Power Ground
Common Power Ground
Ouput of one half bridge of the bridge B
A logic level low on this pin disable the bridge B
Digital input from the motor controller (bridge B)
Sense resistor to provide the feedback for motor current control of the bridge B
Oscillator output for the external charge pump
Digital input from the motor controller (bridge B)
Output of one half bridge of the bridge B
Supply voltage bridge B
Common Power Ground
Common Power Ground
Supply Voltage bridge A
Output of one half bridge of the bridge A
Digital input from the motor controller (bridge A)
Overvoltage input for driving of the upper DMOS
(*) For SO package the pins 4, 5, 10, 11, 18, 19, 24 and 25 are not connected.
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Test Conditions
Unit
V
S
Supply Voltage
50
V
V
IN,
V
EN
Input or Enable Voltage Range
-0.3 to +7
V
I
o
Pulsed Output Current
3
A
V
SENSE
Sensing Voltage
-1 to 4
V
V
BOOT
Bootstrap Supply
60
V
P
tot
Total power dissipation: (T
pins
= 80
C)
Total power dissipation:
(T
amb
= 70
C no copper area on PCB)
Total power dissipation:
(T
amb
= 70
C 8cm
2
copper area on PCB)
5
1.23
2
W
W
W
T
stg
, T
j
Storage and Junction Temperature
-40 to 150
C
PIN CONNECTIONS (Top view)
POWERDIP
SO24+2+2
L6204
2/10
Symbol
Description
SO
DIP
Unit
R
th j-pins
R
th j-amb
Thermal Resistance Junction-pins
Thermal Resistance Junction-ambient
Max
Max
16
73
14
65
C/W
C/W
ELECTRICAL CHARACTERISTICS (V
S
= 42V, T
j
= 25
C unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
V
S
Supply Voltage
12
48
V
I
S
Total Quiescent Current
EN1=EN2=H; IN1=IN2=IN3=IN4=L
EN1 = EN2 = L
10
10
mA
mA
f
C
Commutation Frequency
20
KHz
T
J
Thermal Shutdown
150
C
T
d
Dead Time Protection
500
ns
TRANSISTORS
I
DSS
Leakage Current
OFF
1
mA
R
DS
On Resistance
ON
1.2
LOGIC LEVELS
V
INL
, V
ENL
Input Low Voltage
-0.3
0.8
V
V
INH
, V
ENH
Input High Voltage
2
7
V
I
INL
, I
ENL
Input Low Current
IN1 =IN2 =IN3 =IN4= EN1 =EN2 =L
-10
A
I
INH
, I
ENH
Input High Current
IN1 =IN2 =IN3 =IN4= EN1 =EN2 =H
50
A
THERMAL DATA
APPLICATION DIAGRAM
L6204
3/10
CIRCUIT DESCRIPTION
L6204 is a dual full bridge IC designed to drive
DC motors, stepper motors and other inductive
loads. Each bridge has 4 power DMOS transistor
with R
DSon
= 1.2
and the relative protection and
control circuitry. (see fig. 3)
The 4 half bridges can be controlled independently
by means of the 4 inputs IN!, IN2, IN3, IN4 and 2
enable inputs ENABLE1 and ENABLE2.
External connections are provided so that sensing
resistors can be added for constant current chop-
per applications.
LOGIC DRIVE (*)
INPUTS
OUTPUT MOSFETS
EN1=EN2=H
IN1
IN3
IN2
IN4
L
L
H
H
L
H
L
H
Sink 1, Sink 2
Sink 1, Source 2
Source 1, Sink 2
Source 1, Source 2
EN1=EN2=L
X
X
All transistor turned
OFF
L = Low
H = High
X = Don't care
(*) True table for the two full bridges
CROSS CONDUCTION
Although the device guarantees the absence of
cross-conduction, the presence of the intrinsic di-
odes in the POWER DMOS structure causes the
generation of current spikes on the sensing termi-
nals. This is due to charge-discharge phenomena
in the capacitors C1 & C2 associated with the
drain source junctions (fig. 1). When the output
switches from high to low, a current spike is gen-
erated associated with the capacitor C1. On the
low-to-high transition a spike of the same polarity
is generated by C2, preceded by a spike of the
opposite polarity due to the charging of the input
capacity of the lower POWER DMOS transistor
(see fig. 2).
TRANSISTOR OPERATION
ON STATE
When one of the POWER DMOS transistors is ON
it can be considered as a resistor R
DS(ON)
= 1.2
at
a junction temperature of 25
C.
In this condition the dissipated power is given by :
P
ON
= R
DS(ON)
I
DS
2
The low R
DS(ON)
of the Multipower-BCD process
can provide high currents with low power dissipa-
tion.
OFF STATE
When one of the POWER DMOS transistor is
OFF the V
DS
voltage is equal to the supply volt-
age and only the leakage current I
DSS
flows. The
power dissipation during this period is given by :
P
OFF
= V
S
I
DSS
TRANSITIONS
Like all MOS power transistors the DMOS
POWER transistors have as intrinsic diode be-
tween their source and drain that can operate as
a fast freewheeling diode in switched mode appli-
cations. During recirculation with the ENABLE in-
put high, the voltage drop across the transistor is
R
DS(ON)
.
I
D
and when the voltage reaches the di-
ode voltage it is clamped to its characteristic.
When the ENABLE input is low, the POWER
MOS is OFF and the diode carries all of the recir-
culation current. The power dissipated in the tran-
sitional times in the cycle depends upon the volt-
age and current waveforms in the application.
P
trans.
= I
DS
(t)
V
DS
(t)
BOOTSTRAP CAPACITORS
To ensure the correct driving of high side drivers
Figure 2: Current Typical Spikes on the Sensing Pin
Figure 1: Intrinsic Structures in the POWER
MOS Transistors
L6204
4/10
Figure 3a: Two Phase Chopping
IN1 = H
IN2 = L
EN1 = H
IN1 = L
IN2 = H
EN1 = H
Figure 3b: One Phase Chopping
Figure 3c: Enable Chopping
IN1 = H
IN2 = L
EN1 = H
IN1 = H
IN2 = H
EN1 = H
IN1 = H
IN2 = L
EN1 = H
IN1 = X
IN2 = X
EN1 = L
L6204
5/10
a voltage higher than V
S
is supplied on pin 20
(V
boot
). This bootstrap voltage is not needed for
the lower power DMOS transistor because their
sources are grounded. To produce this voltage a
charge pump method is used and mAde by two
external capacitors and two diodes. It can supply
the 4 driving blocks of the high side drivers. Using
an external capacitor the turn-on speed of the
high side driver is very high; furthermore with dif-
ferent capacitance values it is possible to adapt
the device to different switching frequencies. It is
also possible to operate two or more L6204s us-
ing only 2 diodes and 2 capacitance for all the
ICs; all the Vboot pins are connected to the C
store
capacitance while the pin 11 (VCP) of just one
L6204 is connect to C
pump
, obviously all the
L6204 ICs have to be connected to the same V
S
.
(see fig. 4)
DEAD TIME
To protect the device against simultaneous con-
duction in both arms of the bridge and the result-
ing rail-to-rail short, the logic circuits provide a
dead time.
THERMAL PROTECTION
A thermal protection circuit has been included
that will disable the device if the junction tempera-
ture reaches 150
C. When the temperature has
fallen to a safe level the device restarts under the
control of the input and enable signals.
APPLICATION INFORMATION
RECIRCULATION
During recirculation with the ENABLE input high,
the voltage drop across the transistor is R
DS(ON)
.
I
L
for voltages less than 0.7 V and is clamped at a
voltage depending on the characteristics of the
source-drain diode for greater voltages. Although
the device is protected against cross conduction,
current spikes can appear on the current sense
pin due to charge/discharge phenomena in the in-
trinsic source drain capacitances. In the applica-
tion this does not cause any problems because
the voltage created across the sense resistor is
usually much less than the peak value, although a
small RC filter can be added if necessary.
POWER DISSIPATION (each bridge)
In order to achieve the high performance provided
by the L6204 some attention must be paid to en-
sure that it has an adequate PCB area to dissi-
pate the heat. The first stage of any thermal de-
sign is to calculate the dissipated power in the
application, for this example the half step opera-
tion shown in figure 5 is considered.
RISE TIME T
r
When an arm of the half bridge is turned on cur-
rent begins to flow in the inductive load until the
maximum current I
L
is reached after a time T
r
.
The dissipated energy E
OFF/ON
is in this case :
E
OFF/ON
= [R
DS(ON)
I
L
2
T
r
]
2/3
ON TIME T
ON
During this time the energy dissipated is due to
the ON resistance of the transistors E
ON
and the
commutation E
COM
. As two of the POWER DMOS
transistors are ON E
ON
is given by :
E
ON
= I
L
2
R
DS(ON)
2
T
ON
In the commutation the energy dissipated is :
E
COM
= V
S
IL
T
COM
f
SWITCH
T
ON
Where :
T
COM
= Commutation Time and it is assumed that ;
T
COM
= T
TURN-ON
= T
TURN-OFF
= 100 ns
f
SWITCH
= Chopper frequency
FALL TIME T
f
For this example it is assumed that the energy
dissipated in this part of the cycle takes the same
form as that shown for the rise time :
E
ON/OFF
= [R
DS(ON)
I
L
2
T
f
]
2/3
Figure 4
Figure 5
L6204
6/10
QUIESCENT ENERGY
The last contribution to the energy dissipation is
due to the quiescent supply current and is given
by :
E
QUIESCENT
= I
QUIESCENT
V
S
T
TOTAL ENERGY PER CYCLE
E
TOT
= (E
OFF/ON
+ E
ON
+ E
COM
+ E
ON/OFF
)
bridge 1
+
+(E
OFF/ON
+ E
ON
+ E
COM
+ E
ON/OFF
)
bridge 2
+
+ E
QUIESCENT
The Total Power Dissipation P
DIS
is simply :
P
DIS
= E
TOT
/T
T
r
= Rise time
T
ON
= ON time
T
f
= Fall Time
T
d
= Dead time
T = Period
T = T
r
+ T
ON
+ T
f
+ T
d
L6204
7/10
POWERDIP-20 PACKAGE MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
a1
0.51
0.020
B
0.85
1.40
0.033
0.055
b
0.50
0.020
b1
0.38
0.50
0.015
0.020
D
24.80
0.976
E
8.80
0.346
e
2.54
0.100
e3
22.86
0.900
F
7.10
0.280
I
5.10
0.201
L
3.30
0.130
Z
1.27
0.050
L6204
8/10
SO28 PACKAGE MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.65
0.104
a1
0.1
0.3
0.004
0.012
b
0.35
0.49
0.014
0.019
b1
0.23
0.32
0.009
0.013
C
0.5
0.020
c1
45
(typ.)
D
17.7
18.1
0.697
0.713
E
10
10.65
0.394
0.419
e
1.27
0.050
e3
16.51
0.65
F
7.4
7.6
0.291
0.299
L
0.4
1.27
0.016
0.050
S
8
(max.)
L6204
9/10
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications men-
tioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied.
SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without ex-
press written approval of SGS-THOMSON Microelectronics.
1994 SGS-THOMSON Microelectronics - All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
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L6204
10/10