HIGH VOLTAGE RAIL UP TO 600 V
dV/dt IMMUNITY +- 50 V/nsec IN FULL TEM-
PERATURE RANGE
DRIVER CURRENT CAPABILITY:
400 mA SOURCE,
650 mA SINK
SWITCHING TIMES 50/30 nsec RISE/FALL
WITH 1nF LOAD
CMOS/TTL SCHMITT TRIGGER INPUTS
WITH HYSTERESIS AND PULL DOWN
UNDER VOLTAGE LOCK OUT ON LOWER
AND UPPER DRIVING SECTION
INTERNAL BOOTSTRAP DIODE
OUTPUTS IN PHASE WITH INPUTS
DESCRIPTION
The L6385 is an high-voltage device, manufac-
tured with the BCD"OFF-LINE" technology. It has
a Driver structure that enables to drive inde-
pendent referenced N Channel Power MOS or
IGBT. The Upper (Floating) Section is enabled to
work with voltage Rail up to 600V. The Logic In-
puts are CMOS/TTL compatible for ease of inter-
facing with controlling devices.
November 2003
LOGIC
UV
DETECTION
LEVEL
SHIFTER
BOOTSTRAP DRIVER
R
R
S
V
CC
LVG
DRIVER
V
CC
8
7
6
5
4
HIN
LIN
HVG
DRIVER
HVG
H.V.
TO LOAD
OUT
LVG
GND
D97IN514B
Vboot
3
2
1
Cboot
UV
DETECTION
BLOCK DIAGRAM
SO8 Minidip
ORDERING NUMBERS:
L6385D L6385
L6385
HIGH-VOLTAGE HIGH AND LOW SIDE DRIVER
1/9
THERMAL DATA
Symbol
Parameter
SO8
Minidip
Unit
R
th j-amb
Thermal Resistance Junction to Ambient
150
100
C/W
PIN DESCRIPTION
N.
Name
Type
Function
1
LIN
I
Lower Driver Logic Input
2
HIN
I
Upper Driver Logic Input
3
Vcc
I
Low Voltage Power Supply
4
GND
Ground
5
LVG (*)
O
Low Side Driver Output
6
VOUT
O
Upper Driver Floating Reference
7
HVG (*)
O
High Side Driver Output
8
Vboot
Bootstrap Supply Voltage
(*) The circuit guarantees 0.3V maximum on the pin (@ I
sink
= 10mA). This allows to omit the "bleeder" resistor connected between the gate
and the source of the external MOSFET normally used to hold the pin low.
Vcc
HIN
LIN
GND
1
3
2
4
LVG
OUT
HVG
Vboot
8
7
6
5
D97IN517
PIN CONNECTION
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
Vout
Output Voltage
-3 to Vboot - 18
V
Vcc
Supply Voltage
- 0.3 to +18
V
Vboot
Floating Supply Voltage
- 1 to 618
V
Vhvg
Upper Gate Output Voltage
- 1 to Vboot
V
Vlvg
Lower Gate Output Voltage
-0.3 to Vcc +0.3
V
Vi
Logic Input Voltage
-0.3 to Vcc +0.3
V
dVout/dt
Allowed Output Slew Rate
50
V/ns
Ptot
Total Power Dissipation (Tj = 85 C)
750
mW
Tj
Junction Temperature
150
C
Ts
Storage Temperature
-50 to 150
C
Note: ESD immunity for pins 6, 7 and 8 is guaranteed up to 900V (Human Body Model)
L6385
2/9
RECOMMENDED OPERATING CONDITIONS
Symbol
Pin
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Vout
6
Output Voltage
Note 1
580
V
Vboot-
Vout
8
Floating Supply Voltage
Note 1
17
V
fsw
Switching Frequency
HVG,LVG load CL = 1nF
400
kHz
Vcc
2
Supply Voltage
17
V
T
j
Junction Temperature
-45
125
C
Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
ELECTRICAL CHARACTERISTICS
AC Operation (Vcc = 15V; Tj = 25C)
Symbol
Pin
Parameter
Test Condition
Min.
Typ.
Max.
Unit
ton
1 vs 5
High/Low Side Driver Turn-On
Propagation Delay
Vout = 0V
110
ns
toff
2 vs 7
High/Low Side Driver Turn-Off
Propagation Delay
Vout = 600V
105
ns
tr
7,5
Rise Time
CL = 1000pF
50
ns
tf
7,5
Fall Time
CL = 1000pF
30
ns
DC OPERATION (Vcc = 15V; Tj = 25C)
Symbol
Pin
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Low Supply Voltage Section
Vcc
3
Supply Voltage
17
V
Vccth1
Vcc UV Turn On Threshold
9.1
9.6
10.1
V
Vccth2
Vcc UV Turn Off Threshold
7.9
8.3
8.8
V
Vcchys
Vcc UV Hysteresis
1.3
V
Iqccu
Undervoltage Quiescent Supply
Current
Vcc
9V
150
220
A
Iqcc
Quiescent Current
Vcc = 15V
250
320
A
R
dson
Bootstrap Driver on Resistance (*)
Vcc
12.5V
125
Bootstrapped supply Voltage Section
VBS
8
Bootstrap Supply Voltage
17
V
VBSth1
VBS UV Turn On Threshold
8.5
9.5
10.5
V
VBSth2
VBS UV Turn Off Threshold
7.2
8.2
9.2
V
VBShys
VBS UV Hysteresis
1.3
V
IQBS
VBS Quiescent Current
HVG ON
200
A
ILK
High Voltage Leakage Current
VS = VB = 600V
10
A
High/Low Side Driver
Iso
5,7
Source Short Circuit Current
VIN = Vih (tp < 10
s)
300
400
mA
Isi
Sink Short Circuit Current
VIN = Vil (tp < 10
s)
450
650
mA
Logic Inputs
Vil
2,3
Low Level Logic Threshold Voltage
1.5
V
Vih
High Level Logic Threshold Voltage
3.6
V
Iih
High Level Logic Input Current
VIN = 15V
50
70
A
Iil
Low Level Logic Input Current
VIN = 0V
1
A
(*) R
DSON
is tested in the following way: R
DSON
=
(
V
CC
-
V
CBOOT1
)
-
(
V
CC
-
V
CBOOT2
)
I
1
(
V
CC,
V
CBOOT1
)
-
I
2
(
V
CC
,V
CBOOT2
)
where I
1
is pin 8 current when V
CBOOT
= V
CBOOT1
, I
2
when V
CBOOT
= V
CBOOT2
.
L6385
3/9
HIN
HVG
LVG
LIN
D99IN1053
Figure 1. Input/Output Timing Diagram
For both high and low side buffers @25C Tamb
0
1
2
3
4
5
C (nF)
0
50
100
150
200
250
time
(nsec)
Tr
D99IN1054
Tf
Figure 2. Typical Rise and Fall Times vs.
Load Capacitance
0
2
4
6
8
10
12
14
16 V
S
(V)
10
10
2
10
3
10
4
Iq
(
A)
D99IN1055
Figure 3. Quiescent Current vs. Supply
Voltage
BOOTSTRAP DRIVER
A bootstrap circuitry is needed to supply the high
voltage section. This function is normally accom-
plished by a high voltage fast recovery diode (fig.
4a). In the L6385 a patented integrated structure
replaces the external diode. It is realized by a
high voltage DMOS, driven synchronously with
the low side driver (LVG), with in series a diode,
as shown in fig. 4b
An internal charge pump (fig. 4b) provides the
DMOS driving voltage .
The diode connected in series to the DMOS has
been added to avoid undesirable turn on of it.
CBOOT selection and charging:
To choose the proper C
BOOT
value the external
MOS can be seen as an equivalent capacitor.
This capacitor C
EXT
is related to the MOS total
gate charge :
C
EXT
=
Q
gate
V
gate
The ratio between the capacitors C
EXT
and C
BOOT
is proportional to the cyclical voltage loss .
It has to be:
C
BOOT
>>>C
EXT
e.g.: if Q
gate
is 30nC and V
gate
is 10V, C
EXT
is
3nF. With C
BOOT
= 100nF the drop would be
300mV.
If HVG has to be supplied for a long time, the
C
BOOT
selection has to take into account also the
L6385
4/9
leakage losses.
e.g.: HVG steady state consumption is lower than
200
A, so if HVG T
ON
is 5ms, C
BOOT
has to
supply 1
C to C
EXT
. This charge on a 1
F ca-
pacitor means a voltage drop of 1V.
The internal bootstrap driver gives great advan-
tages: the external fast recovery diode can be
avoided (it usually has great leakage current).
This structure can work only if V
OUT
is close to
GND (or lower) and in the meanwhile the LVG is
on. The charging time (T
charge
) of the C
BOOT
is
the time in which both conditions are fulfilled and
it has to be long enough to charge the capacitor.
The bootstrap driver introduces a voltage drop
due to the DMOS R
DSON
(typical value: 125
Ohm). At low frequency this drop can be ne-
glected. Anyway increasing the frequency it
must be taken in to account.
The following equation is useful to compute the
drop on the bootstrap DMOS:
V
drop
=
I
charge
R
dson
V
drop
=
Q
gate
T
charge
R
dson
where Q
gate
is the gate charge of the external
power MOS, R
dson
is the on resistance of the
bootstrap DMOS, and T
charge
is the charging time
of the bootstrap capacitor.
For example: using a power MOS with a total
gate charge of 30nC the drop on the bootstrap
DMOS is about 1V, if the T
charge
is 5
s. In fact:
V
drop
=
30nC
5
s
125
~
0.8V
V
drop
has to be taken into account when the volt-
age drop on C
BOOT
is calculated: if this drop is
too high, or the circuit topology doesn't allow a
sufficient charging time, an external diode can be
used.
TO LOAD
D99IN1056
H.V.
HVG
a
b
LVG
HVG
LVG
C
BOOT
TO LOAD
H.V.
C
BOOT
D
BOOT
V
BOOT
V
S
V
S
V
OUT
V
BOOT
V
OUT
Figure 4. Bootstrap Driver.
-45
-25
0
25
50
75
100
125
0
50
100
150
200
250
T
on (ns
)
Tj (C)
Typ.
@ Vcc = 15V
Figure 5. Turn On Time vs. Temperature
-45
-25
0
25
50
75
100
125
0
50
100
150
200
250
T
o
ff
(n
s
)
Tj (C)
Typ.
@ Vcc = 15V
Figure 6. Turn Off Time vs. Temperature
L6385
5/9
-45
-25
0
25
50
75
100
125
0
200
400
600
800
1000
cu
r
r
e
n
t
(m
A)
Tj (C)
Typ.
@ Vcc = 15V
Figure 12. Output Sink Current vs. Tempera-
ture
-45
-25
0
25
50
75
100
125
5
6
7
8
9
10
11
12
13
V
b
t
h1 (
V
)
Tj (C)
Typ.
@ Vcc = 15V
Figure 7. V
BOOT
UV Turn On Threshold vs.
Temperature
-45
-25
0
25
50
75
100
125
6
7
8
9
10
11
12
13
14
Vb
t
h
2
(
V
)
Typ.
@ Vcc = 15V
Figure 8. V
BOOT
UV Turn Off Threshold vs.
Temperature
-45
-25
0
25
50
75
100
125
7
8
9
10
11
12
13
V
cct
h1
(
V
)
Tj (C)
Typ.
Figure 9. Vcc UV Turn On Threshold vs.
Temperature
-45
-25
0
25
50
75
100
125
6
7
8
9
10
11
V
cct
h2(
V
)
Tj (C)
Typ.
Figure 10. Vcc UV Turn Off Threshold vs.
Temperature
-45
-25
0
25
50
75
100
125
0
200
400
600
800
1000
c
u
rre
n
t
(m
A)
Tj (C)
Typ.
@ Vcc = 15V
Figure 11. Output Source Current vs. Tem-
perature
L6385
6/9
OUTLINE AND
MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
3.32
0.131
a1
0.51
0.020
B
1.15
1.65
0.045
0.065
b
0.356
0.55
0.014
0.022
b1
0.204
0.304
0.008
0.012
D
10.92
0.430
E
7.95
9.75
0.313
0.384
e
2.54
0.100
e3
7.62
0.300
e4
7.62
0.300
F
6.6
0.260
I
5.08
0.200
L
3.18
3.81
0.125
0.150
Z
1.52
0.060
Minidip
L6385
7/9
OUTLINE AND
MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.35
1.75
0.053
0.069
A1
0.10
0.25
0.004
0.010
A2
1.10
1.65
0.043
0.065
B
0.33
0.51
0.013
0.020
C
0.19
0.25
0.007
0.010
D
(1)
4.80
5.00
0.189
0.197
E
3.80
4.00
0.15
0.157
e
1.27
0.050
H
5.80
6.20
0.228
0.244
h
0.25
0.50
0.010
0.020
L
0.40
1.27
0.016
0.050
k
0 (min.), 8 (max.)
ddd
0.10
0.004
Note:
(1) Dimensions D does not include mold flash, protru-
sions or gate burrs.
Mold flash, potrusions or gate burrs shall not exceed
0.15mm (.006inch) in total (both side).
SO-8
0016023 C
L6385
8/9
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of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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L6385
9/9
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