June 2006
Rev 3
1/27
27
L6725
Low cost adjustable step-down controller
Features
Input voltage range from 1.8V to 14V
Supply voltage range from 4.5V to 14V
Adjustable output voltage down to 0.6V with
0.8% accuracy over line voltage and
temperature (0C~125C)
Fixed frequency voltage mode control
0% to 100% duty cycle
External input voltage reference
Soft-start and inhibit
High current embedded drivers
Predictive anti-cross conduction control
Programmable high-side and low-side R
DS(on)
sense over-current-protection
Sink current capability
Selectable switching frequency 250KHz/
500KHz
Pre-bias start up capability
Over voltage protection
Thermal shut-down
Package: SO16N
Applications
Low voltage distributed DC-DC
Graphic cards
SO16N (Narrow)
www.st.com
Order Codes
Part number
Package
Packing
L6725
SO16N
Tube
L6725TR
SO16N
Tape & Reel
Contents
L6725
2/27
Contents
1
Summary description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1
Maximum rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3
Pin connections and functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
5
Device description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.1
Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.2
Internal LDO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
5.3
Bypassing the LDO to avoid the voltage drop with low Vcc . . . . . . . . . . . . . 11
5.4
Internal and external references . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5.5
Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.6
Soft start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.7
Driver section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.8
Monitoring and protections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.9
Hiccup mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.10
Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
L6725
Contents
3/27
6
Application details . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.1
Inductor design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.2
Output capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.3
Input capacitors . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.4
Compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7
L6725 demoboard . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
8
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
9
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Summary description
L6725
4/27
1 Summary
description
The device is a low cost pwm controller dedicated for low voltage distributed DC-DC. The input
voltage can range from 1.8V to 14V, while the supply voltage can range from 4.5V to 14V. The
output voltage is adjustable down to 0.6V.
High peak current gate drivers provide for fast switching to the external power section, and the
output current can be in excess of 20A. The device is capable to manage minimum on-times
(T
ON
) shorter than 100ns making possible conversions with very low duty cycle and very high
switching frequency. In order to guarantee a real overcurrent protection, also with very narrow
T
ON
, the current sense is realized both on the high-side and low-side MOSFETs. When
necessary, two different current limit protections can be externally set through an external
resistor. The device can sink current after the soft-start phase while, during the soft-start, the
sink mode capability is disabled in order to allow a proper start-up also in pre-biased output
voltage conditions. Other features are over-voltage-protection and thermal shutdown.
1.1 Functional
description
Figure 1.
Block diagram
L6725
Electrical data
5/27
2 Electrical
data
2.1 Maximum
rating
Table 1.
Absolute maximum ratings
2.2 Thermal
data
Table 2.
Thermal data
Symbol Parameter
Value
Unit
V
CC
V
CC
to GND and PGND, OCH
-0.3 to 18
V
V
BOOT -
V
PHASE
Boot Voltage
0 to 6
\
V
HGATE -
V
PHASE
0 to V
BOOT
- V
PHASE
V
V
BOOT
BOOT
-0.3 to 24
V
V
PHASE
PHASE
-1 to 18
V
PHASE Spike, transient < 50ns (F
SW
= 500KHz)
-3
+24
SS, FB, EAREF, OCL, LGATE, COMP, V
CCDR
-0.3 to 6
V
OCH Pin
Maximum Withstanding Voltage Range
Test Condition: CDF-AEC-Q100-002 "Human Body Model"
Acceptance Criteria: "Normal Performance"
1500
V
OTHER PINS
2000
Symbol
Description
Value
Unit
R
thJA
(1)
1.
Package mounted on demoboard
Max. Thermal Resistance Junction to ambient
50
C/W
T
STG
Storage temperature range
-40 to 150
C
T
J
Junction operating temperature range
-40 to 125
C
T
A
Ambient operating temperature range
-40 to +85
C
Pin connections and functions
L6725
6/27
3
Pin connections and functions
Figure 2.
Pins connection (Top view)
Table 3.
Pin functions
Pin n.
Name
Function
15
SGND
All the internal references are referred to this pin.
16
FB
This pin is connected to the error amplifier inverting input. Connect it to V
OUT
through
the compensation network. This pin is also used to sense the output voltage in order
to manage the over voltage protection.
1
COMP
This pin is connected to the error amplifier output and is used to compensate the
voltage control feedback loop.
2
SS/INH
The soft-start time is programmed connecting an external capacitor from this pin to
GND. The internal current generator forces a current of 10
A through the capacitor.
When the voltage at this pin is lower than 0.5V the device is disabled.
3
EAREF
By setting the voltage at this pin is possible to select the internal/external reference
and the switching frequency:
V
EAREF
0-80% of V
CCDR
-> External Reference/F
SW
= 250KHz
V
EAREF
= 80% - 95% of V
CCDR
-> V
REF
= 0.6V/F
SW
= 500KHz
V
EAREF
= 95% - 100% of V
CCDR
->V
REF
= 0.6V/F
SW
= 250KHz
An internal clamp limits the maximum V
EAREF
at 2.5V (typ.). The device captures the
analog value present at this pin at the start-up when V
CC
meets the UVLO threshold.
1
2
3
4
5
6
11
12
SO16N
13
14
15
16
EAREF
HGATE
OCL
SS/INH
COMP
OCH
FB
N.C.
LGATE
PHASE
N.C.
7
10
SGND
VCC
VCCDR
BOOT
8
9
PGND
L6725
Pin connections and functions
7/27
4
OCL
A resistor connected from this pin to ground sets the valley- current-limit. The valley
current is sensed through the low-side MOSFET(s). The internal current generator
sources a current of 100
A (I
OCL
) from this pin to ground through the external resistor
(R
OCL
). The over-current threshold is given by the following equation:
5
OCH
A resistor connected from this pin and the high-side MOSFET(s) drain sets the peak-
current-limit. The peak current is sensed through the high-side MOSFET(s). The
internal 100
A current generator (I
OCH
) sinks a current from the drain through the
external resistor (R
OCH
). The over-current threshold is given by the following
equation:
6
PHASE
This pin is connected to the source of the high-side MOSFET(s) and provides the
return path for the high-side driver. This pin monitors the drop across both the upper
and lower MOSFET(s) for the current limit together with OCH and OCL.
7
HGATE
This pin is connected to the high-side MOSFET(s) gate.
8
BOOT
Through this pin is supplied the high-side driver. Connect a capacitor from this pin to
the PHASE pin and a diode from V
CCDR
to this pin (cathode versus BOOT).
9
PGND
This pin has to be connected closely to the low-side MOSFET(s) source in order to
reduce the noise injection into the device.
10
LGATE
This pin is connected to the low-side MOSFET(s) gate.
11
V
CCDR
5V internally regulated voltage. It is used to supply the internal drivers. Filter it to
ground with a 1uF ceramic cap.
12
V
CC
Supply voltage pin. The operative supply voltage range is from 4.5V to 14V.
Table 3.
Pin functions
DSonLS
R
2
OCL
R
OCL
I
VALLEY
I
=
DSonHS
R
OCH
R
OCH
I
PEAK
I
=
Electrical characteristics
L6725
8/27
4 Electrical
characteristics
V
CC
= 12V, T
A
= 25C unless otherwise specified.
Table 4.
Electrical characteristics
Symbol Parameter
Test
Condition
Min.
Typ.
Max.
Unit
V
CC
SUPPLY CURRENT
I
CC
V
CC
Stand By current
SS to GND
7
9
mA
V
CC
quiescent current
HG = open, LG = open, PH=open
8.5
10
Power-ON
V
CC
Turn-ON V
CC
threshold
V
OCH
= 1.7V
4.0
4.2
4.4
V
Turn-OFF V
CC
threshold
V
OCH
= 1.7V
3.6
3.8
4.0
V
V
IN OK
Turn-ON V
OCH
threshold
1.1
1.25
1.47
V
Turn-OFF V
OCH
threshold
0.9
1.05
1.27
V
V
CCDR
Regulation
V
CCDR
voltage
V
CC
=5.5V to 14V
I
DR
= 1mA to 100mA
4.5
5
5.5
V
Soft Start and Inhibit
I
SS
Soft Start Current
SS = 2V
7
10
13
A
SS = 0 to 0.5V
20
30
45
Oscillator
f
OSC
Accuracy
237
250
263
KHz
450
500
550
KHz
V
OSC
Ramp Amplitude
2.1
V
Output Voltage
V
FB
Output Voltage
0.597
0.6
0.603
V
L6725
Electrical characteristics
9/27
Symbol Parameter
Test
Condition
Min.
Typ.
Max.
Unit
Error Amplifier
R
EAREF
EAREF Input Resistance
Vs. GND
70
100
150
k
I
FB
I.I. bias current
V
F
= 0V
0.290
0.5
A
Ext Ref
Clamp
2.3
V
V
OFFSET
Error amplifier offset
Vref = 0.6V
-5
+5
mV
G
V
Open Loop Voltage Gain
Guaranteed by design
100
dB
GBWP
Gain-Bandwidth Product
Guaranteed by design
10
MHz
SR
Slew-Rate
COMP = 10pF
Guaranteed by design
5
V/
s
Gate Drivers
R
HGATE_ON
High Side Source Resistance
V
BOOT
- V
PHASE
= 5V
1.7
R
HGATE_OFF
High Side Sink Resistance
V
BOOT
- V
PHASE
= 5V
1.12
R
LGATE_ON
Low Side Source Resistance
V
CCDR
= 5V
1.15
R
LGATE_OFF
Low Side Sink Resistance
V
CCDR
= 5V
0.6
Protections
I
OCH
OCH Current Source
V
OCH
= 1.7V
90
100
110
I
OCL
OCL Current Source
90
100
110
OVP
Over Voltage Trip
(V
FB
/ V
EAREF
)
V
FB
Rising
V
EAREF
= 0.6V
120
%
V
FB
Falling
V
EAREF
= 0.6V
117
%
Table 4.
Electrical characteristics
L6725
Device description
10/27
5 Device
description
The controller
provides complete control logic and protection for flexible and cost-effective DC-
DC converters. It is designed to drive N-Channel MOSFETs in a synchronous rectified buck
topology. The output voltage of the converter can be precisely regulated down to 600mV with a
maximum tolerance of 0.8%, when the internal reference is used. The device allows also
using an external reference (0V to 2.5V) for the regulation. The device provides voltage-mode
control. The switching frequency can be set at two different values: 250KHz or 500KHz. The
error amplifier features a 10MHz gain-bandwidth-product and 5V/s slew-rate that permits to
realize high converter bandwidth for fast transient response. The PWM duty cycle can range
from 0% to 100%. The device protects against over current conditions providing a constant-
current-protection during the soft-start phase and entering in HICCUP mode in all the other
conditions. The device monitors the current by using the R
DS(ON)
of both the high-side and low-
side MOSFET(s), eliminating the need for a current sensing resistor and guaranteeing an
effective over-current-protection in all the application conditions. Other features are over-
voltage-protection and thermal shutdown. The device is available in SO16N package.
5.1 Oscillator
The switching frequency can be fixed to two values: 250KHz or 500KHz by setting the proper
voltage at the EAREF pin (see
Table 3.
Pins function and section 4.3 Internal and external
reference).
5.2 Internal
LDO
An internal LDO supplies the internal circuitry of the device. The input of this stage is the V
CC
pin and the output (5V) is the V
CCDR
pin. The LDO can be by-passed, providing directly a 5V
voltage to V
CCDR
. In this case V
CC
and V
CCDR
pins must be shorted together as shown in
Figure 3
. V
CCDR
pin must be filtered
with a 1uF capacitor to sustain the internal LDO during the
recharge of the bootstrap capacitor.
L6725
Device description
11/27
5.3
Bypassing the LDO to avoid the voltage drop with low Vcc
If V
CC
5V the internal LDO works in dropout with an output resistance of about 1
. The
maximum LDO output current is about 100mA and so the output voltage drop is 100mV, to
avoid this the LDO can be bypassed.
5.4
Internal and external references
It is possible to set the internal/external reference and the switching frequency by setting the
proper voltage at the EAREF pin. The maximum value of the external reference depends on the
V
CC
: with V
CC
= 4V the clamp operates at about 2V (typ.), while with V
CC
greater than 5V the
maximum external reference is 2.5V (typ.).
V
EAREF
from 0% to 80% of V
CCDR
-> External reference/Fsw=250KHz
V
EAREF
from 80% to 95% of V
CCDR
-> V
REF
= 0.6V/Fsw=500KHz
V
EAREF
from 95% to 100% of V
CCDR
-> V
REF
= 0.6V/Fsw=250KHz
Providing an external reference from 0V to 450mV the output voltage will be regulated but
some restrictions must be considered:
The minimum OVP threshold is set at 300mV;
The under-voltage-protection doesn't work;
To set the resistor divider it must be considered that a 100K pull-down resistor is integrated into
the device (see
Figure 4.
). Finally it must be taken into account that the voltage at the EAREF
pin is captured by the device at the start-up when V
CC
is about 4V.
Figure 3.
Bypassing the LDO
Device description
L6725
12/27
5.5 Error
amplifier
5.6 Soft
start
When both V
CC
and V
IN
are above their turn-ON thresholds (V
IN
is monitored by the OCH pin)
the start-up phase takes place. Otherwise the SS pin is internally shorted to GND. At start-up, a
ramp is generated charging the external capacitor C
SS
with an internal current generator. The
initial value for this current is 35A and charges the capacitor up to 0.5V. After that it becomes
10A until the final charge value of approximately 4V (see
Figure 5.
).
Figure 4.
Error amplifier reference
Figure 5.
Soft-Start phase.
t
t
0.5V
4V
Vcc
Vin
Vss
4.2V
1.25V
L6725
Device description
13/27
The output of the error amplifier is clamped with this voltage (V
SS
) until it reaches the
programmed value. No switching activity is observable if V
SS
is lower than 0.5V and both
MOSFETs are OFF. When V
SS
is between 0.5V and 1.1V the low-side MOSFET is turned ON.
As V
SS
reaches 1.1V (i.e. the oscillator triangular wave inferior limit) even the high-side
MOSFET begins to switch and the output voltage starts to increase. During the soft-start phase
the current can't be reversed in order to allow pre-biased start-up (see
Figure 6.
and
Figure 7.
).
If an over current is detected during the soft-start phase, the device provides a constant-
current-protection. In this way, in case of short soft-start time and/or small inductor value and/or
high output capacitors value, the converter can start in any case, limiting the current
(
Chapter 5.8: Monitoring and protections on page 14
). The soft-start phase ends when Vss
reaches 3.5V. After that the over-current-protection triggers the HICCUP mode.
Figure 6.
Start-up without pre-bias
Figure 7.
Start-up with pre-bias
LGate
V
OUT
I
L
V
SS
V
SS
I
L
V
OUT
LGate
Device description
L6725
14/27
5.7 Driver
section
The high-side and low-side drivers allow using different types of power MOSFETs (also multiple
MOSFETs to reduce the R
DSON
), maintaining fast switching transitions. The low-side driver is
supplied by V
CCDR
while the high-side driver is supplied by the BOOT pin. A predictive dead
time control avoids MOSFETs cross-conduction maintaining very short dead time duration in
the range of 20ns. The control monitors the phase node in order to sense the low-side body
diode recirculation. If the phase node voltage is less than a certain threshold (-350mV typ.)
during the dead time, it will be reduced in the next PWM cycle. The predictive dead time control
doesn't work when the high-side body diode is conducting because the phase node doesn't go
negative. This situation happens when the converter is sinking current for example and, in this
case, an adaptive dead time control operates.
5.8
Monitoring and protections
The output voltage is monitored by means of pin FB. The device provides over-voltage-
protection: when the voltage sensed on FB pin reaches a value 20% (typ.) greater than the
reference the low-side driver is turned on as long as the over voltage is detected (see
Figure 8
).
The device realizes the over-current-protection (OCP) sensing the current both on the high-side
MOSFET(s) and the low-side MOSFET(s) and so 2 current limit thresholds can be set (see
OCH pin and OCL pin in
Table 3: Pin functions
):
Peak Current Limit
Valley Current Limit
The Peak Current Protection is active when the high-side MOSFET(s) is turned on, after a
masking time of 100ns. The valley-current-protection is enabled when the low-side MOSFET(s)
is turned on after a masking time of 500ns. If, when the soft-start phase is completed, an over
current event occurs during the on time (peak-current-protection) or during the off time (valley-
current-protection) the device enters in HICCUP mode: the high-side and low-side MOSFET(s)
are turned off, the soft-start capacitor is discharged with a constant current
of 10A and when
the voltage at the SS pin reaches 0.5V the soft-start phase restarts (see
Figure 9
).
Figure 8.
OVP
LGate
FB
L6725
Device description
15/27
5.9 Hiccup
mode
During the soft-start phase the OCP provides a constant-current-protection. If during the T
ON
the OCH comparator triggers an over current the high-side MOSFET(s) is immediately turned
OFF (after the masking time and the internal delay) and returned on at the next pwm cycle. The
limit of this protection is that the T
ON
cannot be less than masking time plus propagation delay,
because during the masking time the peak-current-protection is disabled. In case of very hard
short circuit, even with this short T
ON
, the current could escalate. The valley-current-protection
is very helpful in this case to limit the current. If during the off-time the OCL comparator triggers
an over current, the high-side MOSFET(s) is not turned on until the current is over the valley-
current-limit. This implies that, if it is necessary, some pulses of the high-side MOSFET(s) will
be skipped, guaranteeing a maximum current due to the following formula:
5.10 Thermal
shutdown
When the junction temperature reaches 150C 10C the device enters in thermal shutdown.
Both MOSFETs are turned OFF and the soft-start capacitor is rapidly discharged with an
internal switch. The device does not restart until the junction temperature goes down to 120C
and, in any case, until the voltage at the soft-start pin reaches 500mV.
Figure 9.
Constant current and Hiccup Mode during an OCP.
VSS
VCOMP
I
L
MIN
ON
VALLEY
MAX
T
L
Vout
Vin
I
I
,
-
+
=
(1)
Application details
L6725
16/27
6 Application
details
6.1 Inductor
design
The inductance value is defined by a compromise between the transient response time, the
efficiency, the cost and the size. The inductor has to be calculated to sustain the output and the
input voltage variation to maintain the ripple current (I
L
) between 20% and 30% of the
maximum output current. The inductance value can be calculated with the following
relationship:
Where F
SW
is the switching frequency, V
IN
is the input voltage and V
OUT
is the output voltage.
Figure 10
shows the ripple current vs. the output voltage for different values of the inductor,
with V
IN
= 5V and V
IN
= 12V at a switching frequency of 500KHz.
Increasing the value of the inductance reduces the ripple current but, at the same time,
increases the converter response time to a load transient. If the compensation network is well
designed, during a load transient the device is able to set the duty cycle to 100% or to 0%.
When one of these conditions is reached, the response time is limited by the time required to
change the inductor current. During this time the output current is supplied by the output
capacitors. Minimizing the response time can minimize the output capacitor size.
Figure 10. Inductor current ripple.
Vin
Vout
I
Fsw
Vout
Vin
L
L
-
(2)
0
1
2
3
4
5
6
7
8
0
1
2
3
4
O UT P UT V O LT AG E (V )
I
NDUC
T
O
R CURR
E
N
T
RI
P
P
L
V in = 5 V , L = 5 0 0 n H
V in = 5 V , L = 1 .5 u H
V in = 1 2 V , L = 2 u H
V in = 1 2 V , L = 1 u H
L6725
Application details
17/27
6.2 Output
capacitors
The output capacitors are basic components for the fast transient response of the power
supply. For example, during a positive load transient, they supply the current to the load until
the converter reacts. The controller recognizes immediately the load transient and sets the duty
cycle at 100%, but the current slope is limited by the inductor value. The output voltage has a
first drop due to the current variation inside the capacitor (neglecting the effect of the ESL):
Moreover, there is an additional drop due to the effective capacitor discharge that is given by:
Where D
MAX
is the maximum duty cycle value that in the L6725 is 100%. Usually the voltage
drop due to the ESR is the biggest one while the drop due to the capacitor discharge is almost
negligible. Moreover the ESR value also affects the voltage static ripple, that is:
6.3 Input
capacitors
The input capacitors have to sustain the RMS current flowing through them, that is:
Where D is the duty cycle. The equation reaches its maximum value, I
OUT
/2 with D = 0.5. The
losses in worst case are:
ESR
Iout
Vout
ESR
=
(3)
)
max
min
,
(
2
2
Vout
D
Vin
Cout
L
Iout
Vout
COUT
-
=
(4)
L
I
ESR
Vout
=
(5)
)
1
(
D
D
Iout
Irms
-
=
(6)
2
)
5
.
0
(
Iout
ESR
P
=
(7)
Application details
L6725
18/27
6.4 Compensation
network
The loop is based on a voltage mode control (
Figure 11
). The output voltage is regulated to the
internal/external reference voltage and scaled by the external resistor divider. The error
amplifier output V
COMP
is then compared with the oscillator triangular waveform to provide a
pulse-width modulated (PWM) with an amplitude of V
IN
at the PHASE node. This waveform is
filtered by the output filter. The modulator transfer function is the small signal transfer function
of V
OUT
/V
COMP
. This function has a double pole at frequency F
LC
depending on the L-C
OUT
resonance and a zero at F
ESR
depending on the output capacitor's ESR. The DC Gain of the
modulator is simply the input voltage V
IN
divided by the peak-to-peak oscillator voltage: V
OSC
.
The compensation network consists in the internal error amplifier, the impedance networks Z
IN
(R3, R4 and C20) and Z
FB
(R5, C18 and C19). The compensation network has to provide a
closed loop transfer function with the highest 0dB crossing frequency to have fastest transient
response (but always lower than f
SW
/10) and the highest gain in DC conditions to minimize the
load regulation error. A stable control loop has a gain crossing the 0dB axis with -20dB/decade
slope and a phase margin greater than 45. To locate poles and zeroes of the compensation
networks, the following suggestions may be used:
Modulator singularity frequencies:
Compensation network singularity frequencies:
Figure 11. Compensation Network
Cout
L
LC
=
1
Cout
ESR
ESR
=
1
(8)
(9)
+
=
19
18
19
18
5
1
1
C
C
C
C
R
P
20
4
2
1
C
R
P
=
(10)
(11)
19
5
1
1
C
R
Z
=
(
)
4
3
20
2
1
R
R
C
Z
+
=
(12)
(13)
L6725
Application details
19/27
Compensation network design:
Put the gain R
5
/R
3
in order to obtain the desired converter bandwidth:
Place
Z1
before the output filter resonance
LC
;
Place
Z2
at the output filter resonance
LC
;
Place
P1
at the output capacitor ESR zero
ESR
;
Place
P2
at one half of the switching frequency;
Check the loop gain considering the error amplifier open loop gain.
Figure 12. Asymptotic Bode plot of Converter's open loop gain
LC
C
Vosc
Vin
R
R
=
3
5
(14)
L6725 demoboard
L6725
20/27
7 L6725
demoboard
7.1 Description
L6725
demoboard realizes in a four layer PCB a step-down DC/DC converter and shows the
operation of the device in a general purpose application. The input voltage can range from 4.5V
to 14V and the output voltage is at 3.3V. The module can deliver an output current in excess of
20A. The switching frequency is set at 250 KHz (controller free-running F
SW
) but it can be set
to 500KHz acting on the EAREF pin.
Figure 13. Demoboard schematic
Table 5.
Demoboard part list
Reference
Value
Manufacturer
Package
Supplier
R1
1k
Neohm
SMD 0603
IFARCAD
R2
1k
Neohm
SMD 0603
IFARCAD
R3
4K7
R4
2k7
Neohm
SMD 0603
IFARCAD
R5
0
Neohm
SMD 0603
IFARCAD
R6
N.C.
Neohm
SMD 0603
IFARCAD
R7
2K
Neohm
SMD 0603
IFARCAD
R8
10
Neohm
SMD 0603
IFARCAD
R9
1K5
Neohm
SMD 0603
IFARCAD
R10
2.2
Neohm
SMD 0603
IFARCAD
GOUT
R2
GIN
L1
Q1-3
Q4-6
D3
5
U1
L6725
VIN
VOUT
8
OCH
C11
R9
C9
9
10
6
7
HGATE
PHASE
LGATE
PGND
3
VCC
12
VCC
2
SS
C4
BOOT
D1
11
VCCDR
C10
1
VFB
COMP
R3
R1
C1
C2
C3
R4
R7
4
EAREF
C7
R8
16
15
GND
OCL
R10
R11
C12-C13
C16-C19
C5
R6
R5
C8
J1
R12
C15
EXT REF
J2
L6725
L6725 demoboard
21/27
R11
2.2
Neohm
SMD 0603
IFARCAD
R12
N.C.
Neohm
SMD 0603
IFARCAD
C1
4.7nF
Kemet
SMD 0603
IFARCAD
C2
47nF
Kemet
SMD 0603
IFARCAD
C3
1nF
Kemet
SMD 0603
IFARCAD
C4
100nF
Kemet
SMD 0603
IFARCAD
C5
100nF
Kemet
SMD 0603
IFARCAD
C6
N.C.
/
/
/
C7
100nF
Kemet
SMD 0603
IFARCAD
C8
4.7uF 20V
AVX
SMA6032
IFARCAD
C9
1nF
Kemet
SMD 0603
IFARCAD
C10
1uF Kemet
SMD
0603
IFARCAD
C11
220nF Kemet
SMD
0603
IFARCAD
C12-13
3X 15uF
/
/
ST (TDK)
C15
N.C.
/
/
/
C16-19
2X 330
F
/
/
ST (poscap)
L1
1.8
H
Panasonic
SMD
ST
D1
STPS1L30M
ST
DO216AA
ST
D3
N.C.
/
/
/
Q1-Q2
STS12NH3LL
ST
SO8
ST
Q4-Q5
STS25NH3LL
ST
SO8
ST
U1
L6725
ST
SO16N
ST
Table 6.
Other inductor manufacturer
Manufacturer Series
Inductor
Value (H)
Saturation Current (A)
WURTH ELEKTRONIC
744318180
1.8
20
SUMIDA CDEP134-2R7MC-H
2.7
15
EPCOS HPI_13
T640 1.4 22
TDK SPM12550T-1R0M220
1
22
TOKO FDA1254
2.2
14
COILTRONICS
HCF1305-1R0 1.15 22
HC5-1R0 1.3 27
Table 5.
Demoboard part list
L6725 demoboard
L6725
22/27
Table 7.
Other capacitor manufacturer
Manufacturer
Series
Capacitor value(F)
Rated voltage (V)
TDK
C4532X5R1E156M
15
25
C3225X5R0J107M
100
6.3
NIPPON CHEMI-CON
25PS100MJ12
100
25
PANASONIC
ECJ4YB0J107M
100
6.3
Figure 14. Demoboard efficiency
Figure 15. PCB Layout: Top Layer
Figure 16. PCB Layout: Power Ground Layer
F s w = 4 0 0 K H z
7 5 . 0 0 %
8 0 . 0 0 %
8 5 . 0 0 %
9 0 . 0 0 %
9 5 . 0 0 %
1
3
5
7
9
1 1
1 3
1 5
I o u t (A )
E
FFI
C
I
E
N
F
SW
= 500KHz
V
IN
= 5V
V
IN
= 12V
L6725
L6725
L6725 demoboard
23/27
Figure 17. PCB Layout: Signal-Ground Layer
Figure 18. PCB Layout: Bottom Layer
Package mechanical data
L6725
24/27
8
Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK
packages.
These packages have a Lead-free second level interconnect . The category of second Level
Interconnect is marked on the package and on the inner box label, in compliance with JEDEC
Standard JESD97. The maximum ratings related to soldering conditions are also marked on
the inner box label. ECOPACK is an ST trademark. ECOPACK specifications are available at:
www.st.com.
L6725
Package mechanical data
25/27
Table 8.
SO16N mechanical data
Figure 19. Package dimensions
Dim. mm
inch
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75
0.069
a1 0.1
0.25
0.004
0.009
a2 1.6
0.063
b 0.35
0.46
0.014
0.018
b1 0.19
0.25
0.007
0.010
C 0.5
0.020
c1 45
(typ.)
D
(1)
1.
"D" and "F" do not include mold flash or protrusions -Mold flash or protrusions shall not exceed 0.15mm (.006inc.)
9.8 10
0.386
0.394
E 5.8
6.2
0.228
0.244
e 1.27
0.050
e3 8.89
0.350
F
(1)
3.8 4.0
0.150
0.157
G 4.60
5.30
0.181
0.208
L 0.4
1.27
0.150
0.050
M 0.62
0.024
S 8
(max.)
Revision history
L6725
26/27
9 Revision
history
Table 9.
Revision history
Date
Revision
Changes
20-Dec-2005
1
Initial release.
30-May-2006
2
New template, thermal data updated
26-Jun-2006
3
Note page 5 deleted
L6725
27/27
Please Read Carefully:
Information in this document is provided solely in connection with ST products. STMicroelectronics NV and its subsidiaries ("ST") reserve the
right to make changes, corrections, modifications or improvements, to this document, and the products and services described herein at any
time, without notice.
All ST products are sold pursuant to ST's terms and conditions of sale.
Purchasers are solely responsible for the choice, selection and use of the ST products and services described herein, and ST assumes no
liability whatsoever relating to the choice, selection or use of the ST products and services described herein.
No license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. If any part of this
document refers to any third party products or services it shall not be deemed a license grant by ST for the use of such third party products
or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoever of such
third party products or services or any intellectual property contained therein.
UNLESS OTHERWISE SET FORTH IN ST'S TERMS AND CONDITIONS OF SALE ST DISCLAIMS ANY EXPRESS OR IMPLIED
WARRANTY WITH RESPECT TO THE USE AND/OR SALE OF ST PRODUCTS INCLUDING WITHOUT LIMITATION IMPLIED
WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE (AND THEIR EQUIVALENTS UNDER THE LAWS
OF ANY JURISDICTION), OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.
UNLESS EXPRESSLY APPROVED IN WRITING BY AN AUTHORIZE REPRESENTATIVE OF ST, ST PRODUCTS ARE NOT DESIGNED,
AUTHORIZED OR WARRANTED FOR USE IN MILITARY, AIR CRAFT, SPACE, LIFE SAVING, OR LIFE SUSTAINING APPLICATIONS,
NOR IN PRODUCTS OR SYSTEMS, WHERE FAILURE OR MALFUNCTION MAY RESULT IN PERSONAL INJURY, DEATH, OR
SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE.
Resale of ST products with provisions different from the statements and/or technical features set forth in this document shall immediately void
any warranty granted by ST for the ST product or service described herein and shall not create or extend in any manner whatsoever, any
liability of ST.
ST and the ST logo are trademarks or registered trademarks of ST in various countries.
Information in this document supersedes and replaces all information previously supplied.
The ST logo is a registered trademark of STMicroelectronics. All other names are the property of their respective owners.
2006 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan -
Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America
www.st.com
PDF 
ZIP