1/38
September 2005
LRI64
Memory TAG IC, 64-bit Unique ID with WORM User Area
13.56MHz, ISO15693 and ISO18000-3 Mode 1 Compliant
FEATURES SUMMARY
ISO 15693 Compliant
ISO 18000-3 Mode 1 Compliant
13.56MHz
7kHz
Carrier Frequency
Supported data transfer to the LRI64:
10% ASK modulation using "1-out-of-4" pulse
position coding (26 kbit/s)
Supported data transfer from the LRI64:
Load modulation using Manchester coding
with 423kHz single sub-carrier in fast data rate
(26 kbit/s)
Internal Tuning Capacitor
7 x 8 bits WORM User Area
64-bit Unique Identifier (UID)
Read Block and Write Block Commands (8-bit
blocks)
7ms Programming Time (typical)
More than 40-Year Data Retention
Electrical Article Surveillance capable
(software controlled)
Figure 1.
Delivery Forms
Wafer
Antenna (A1)
Antenna (A7)
Antenna (A6)
UFDFPN8 (MB)
2x3mm (MLP)
LRI64
2/38
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
SUMMARY DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Memory Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
SIGNAL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
AC1, AC0. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
COMMANDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Read Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Write Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Get_System_Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Initial Dialogue for Vicinity Cards . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
POWER TRANSFER. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Frequency . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Operating Field . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
COMMUNICATION SIGNAL FROM VCD TO LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
DATA RATE AND DATA CODING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
VCD TO LRI64 FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
COMMUNICATIONS SIGNAL FROM LRI64 TO VCD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Load Modulation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Subcarrier. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Data Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Bit Representation and Coding using One Subcarrier, at the High Data Rate . . . . . . . . . . . . 10
Logic 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
Logic 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
LRI64 TO VCD FRAMES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
LRI64 SOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
LRI64 EOF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
SPECIAL FIELDS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Unique Identifier (UID). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Application Family Identifier (AFI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Data Storage Format Identifier (DSFID) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Cyclic Redundancy Code (CRC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3/38
LRI64
LRI64 PROTOCOL DESCRIPTION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
LRI64 STATES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Power-off State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Ready State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Quiet State . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
MODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Addressed Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Non-Addressed Mode (General Request) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
FLAGS AND ERROR CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Response Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Response Error Code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
ANTI-COLLISION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Request Flags . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Mask Length and Mask Value. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Inventory Responses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
REQUEST PROCESSING BY THE LRI64 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Explanation of the Possible Cases . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
TIMING DEFINITIONS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
LRI64 Response Delay, t1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
VCD New Request Delay, t2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
VCD New Request Delay when there is No LRI64 Response, t3 . . . . . . . . . . . . . . . . . . . . . . . . 19
COMMANDS CODES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Inventory . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Stay Quiet . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Read Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Write Single Block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Get System Info . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
APPENDIX A.ALGORITHM FOR PULSED SLOTS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
LRI64
4/38
APPENDIX B.C-EXAMPLE TO CALCULATE OR CHECK THE CRC16
ACCORDING TO ISO/IEC 13239 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
CRC Calculation Example. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
APPENDIX C.APPLICATION FAMILY IDENTIFIER (AFI) CODING . . . . . . . . . . . . . . . . . . . . . . . . . . 36
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
5/38
LRI64
SUMMARY DESCRIPTION
The LRI64 is a contactless memory, powered by
an externally transmitted radio wave. It contains a
120-bit non-volatile memory. The memory is orga-
nized as 15 blocks of 8 bits, of which 7 blocks are
accessible as Write-Once Read-Many (WORM)
memory.
Figure 2. Logic Diagram
The LRI64 is accessed using a 13.56MHz carrier
wave. Incoming data are demodulated from the re-
ceived Amplitude Shift Keying (ASK) signal, 10%
modulated. The data are transferred from the
reader to the LRI64 at 26Kbit/s, using the "1-out-
of-4" pulse encoding mode.
Outgoing data are sent by the LRI64, generated by
load variation on the carrier wave, using Manches-
ter coding with a single sub-carrier frequency of
423kHz. The data are transferred from the LRI64
to the reader at 26Kbit/s, in the high data rate
mode.
The LRI64 supports the high data rate communi-
cation protocols of ISO 15693 and ISO 18000-3
Mode 1 recommendations. All other data rates and
modulations are not supported by the LRI64.
Table 1. Signal Names
Figure 3. MLP Connections
Memory Mapping
The LRI64 is organized as 15 blocks of 8 bits as
shown in
Figure 4.
Each block is automatically
write-protected after the first valid write access.
Figure 4. LRI64 Memory Mapping
The LRI64 uses the first 8 blocks (blocks 0 to 7) to
store the 64-bit Unique Identifier (UID). The UID is
used during the anti-collision sequence (Invento-
ry). It is written, by ST, at time of manufacture, but
part of it can be customer-accessible and custom-
er-writable, on special request.
The LRI64 has an AFI register, in which to store
the Application Family Identifier value, which is
also used during the anti-collision sequence.
The LRI64 has a DSFID register, in which to store
the Data Storage Format Identifier value, which is
used for the LRI64 Inventory answer.
The five following blocks (blocks 10 to 14) are
Write-Once Read-Many (WORM) memory. It is
possible to write to each of them once. After the
first valid write access, the block is automatically
locked, and only read commands are possible.
AC1
Antenna Coil
AC0
Antenna Coil
AI08590
AC1
LRI64
AC0
Power
Supply
Regulator
Manchester
Load
Modulator
ASK
Demodulator
120-bit
WORM
Memory
1
AI11612
2
3
4
8
7
6
5
AC0
AC1
n/c
n/c
n/c
n/c
n/c
n/c
AI09741
Block
Addr
0 1 2 3 4 5 6 7
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
UID 0
UID 1
UID 2
UID 3
UID 4
UID 5 = IC_ID
UID 6 = 02h
UID 7 = E0h
AFI (WORM Area)
DSFID (WORM Area)
WORM Area
WORM Area
WORM Area
WORM Area
WORM Area
LRI64
6/38
SIGNAL DESCRIPTION
AC1, AC0. The pads for the Antenna Coil. AC1
and AC0 must be directly bonded to the antenna.
COMMANDS
The LRI64 supports the following commands:
Inventory. Used to perform the anti-collision se-
quence. The LRI64 answers to the Inventory com-
mand when all of the 64 bits of the UID have been
correctly written.
Stay Quiet. Used to put the LRI64 in Quiet mode.
In this mode, the LRI64 only responds to com-
mands in Addressed mode.
Read Block. Used to output the 8 bits of the se-
lected block.
Write Block. Used to write a new 8-bit value in
the selected block, provided that the block is not
locked. This command can be issued only once to
each block.
Get_System_Info. Used to allow the application
system to identify the product. It gives the LRI64
memory size, and IC reference (IC_ID).
Initial Dialogue for Vicinity Cards
The dialogue between the Vicinity Coupling De-
vice (VCD) and the LRI64 is conducted according
to a technique called Reader Talk First (RTF). This
involves the following sequence of operations:
1.
activation of the LRI64 by the RF operating
field of the VCD
2.
transmission of a command by the VCD
3.
transmission of a response by the LRI64
POWER TRANSFER
Power transfer to the LRI64 is accomplished by in-
ductive coupling of the 13.56MHz radio signal be-
tween the antennas of the LRI64 and VCD. The
RF field transmitted by the VCD induces an AC
voltage on the LRI64 antenna, which is then recti-
fied, smoothed and voltage-regulated. Any ampli-
tude modulation present on the signal is
demodulated by the Amplitude Shift Keying (ASK)
demodulator.
Frequency
ISO 15693 and ISO 18000-3 Mode 1 standards
define the carrier frequency (f
C
) of the operating
field to be 13.56MHz7kHz.
Operating Field
The LRI64 operates continuously between H
min
and H
max
.
The minimum operating field is H
min
and has a
value of 150mA/m (rms).
The maximum operating field is H
max
and has
a value of 5A/m (rms).
A VCD generates a field of at least H
min
and not
exceeding H
max
in the operating volume.
7/38
LRI64
COMMUNICATION SIGNAL FROM VCD TO LRI64
Communications between the VCD and the LRI64
involves a type of Amplitude Modulation called
Amplitude Shift Keying (ASK).
The LRI64 only supports the 10% modulation
mode specified in ISO 15693 and ISO 18000-3
Mode 1 standards. Any request that the VCD
might send using the 100% modulation mode, is
ignored, and the LRI64 remains in its current state.
However, the LRI64 is, in fact, operational for any
degree of modulation index from between 10%
and 30%.
The modulation index is defined as (a-b)/(a+b)
where a and b are the peak and minimum signal
amplitude, respectively, of the carrier frequency,
as shown in
Figure 5.
Table 2. 10% Modulation Parameters
Figure 5. 10% Modulation Waveform
Figure 6. "1-out-of-4" Coding Example
Parameter
Min
Max
hr
0.1 x (a-b)
hf
0.1 x (a-b)
AI06655B
tRFF
tRFSFL
tRFR
hr
hf
a
b
t
AI06659B
75.52 s
75.52 s
75.52 s
75.52 s
00
10
01
11
LRI64
8/38
DATA RATE AND DATA CODING
The data coding method involves pulse position
modulation. The LRI64 supports the "1-out-of-4"
pulse coding mode. Any request that the VCD
might send in the "1-out-of-256" pulse coded
mode, is ignored, and the LRI64 remains in its cur-
rent state.
Two bit values are encoded at a time, by the posi-
tioning of a pause of the carrier frequency in one
of four possible 18.88s (256/fc) time slots, as
shown in
Figure 7.
Four successive pairs of bits form a byte. The
transmission of one byte takes 302.08 s and,
consequently, the data rate is 26.48 kbits/s (fc/
512).
The encoding for the least significant pair of bits is
transmitted first. For example
Figure 6.
shows the
transmission of E1h (225d, 1110 0001b) by the
VCD.
Figure 7. "1-out-of-4" Coding Mode
AI06658
9.44 s
9.44 s
75.52 s
28.32 s
9.44 s
75.52 s
47.20s
9.44 s
75.52 s
66.08 s
9.44 s
75.52 s
Pulse position for "00"
Pulse position for "11"
Pulse position for "10" (0=LSB)
Pulse position for "01" (1=LSB)
9/38
LRI64
VCD TO LRI64 FRAMES
Request Frames are delimited by a Start of Frame
(SOF) and an End of Frame (EOF) and are imple-
mented using a code violation mechanism. Un-
used options are reserved for future use.
The LRI64 is ready to receive a new command
frame from the VCD after a delay of t
2
(see
Table
14.
) after having sent a response frame to the
VCD.
The LRI64 generates a Power On delay of t
POR
(see
Table 14.
) after being activated by the power-
ing field. After this delay, the LRI64 is ready to re-
ceive a command frame from the VCD.
In ISO 15693 and ISO 18000-3 Mode 1 standards,
the SOF is used to define the data coding mode
that the VCD is going to use in the following com-
mand frame.
The SOF that is shown in
Figure 8.
selects the "1-
out-of-4" data coding mode. (The LRI64 does not
support the SOF for the "1-out-of-256" data coding
mode.)
The corresponding EOF sequence is shown in
Figure 9.
Figure 8. Request SOF, using the "1-out-of-4" Data Coding Mode
Figure 9. Request EOF
AI06660
37.76 s
9.44 s
9.44 s
37.76 s
9.44 s
AI06662
9.44 s
37.76 s
9.44 s
LRI64
10/38
COMMUNICATIONS SIGNAL FROM LRI64 TO VCD
ISO 15693 and ISO 18000-3 Mode 1 standards
define several modes, for some parameters, to ca-
ter for use in different application requirements
and noise environments. The LRI64 does not sup-
port all of these modes, but supports the single
subcarrier mode at the fast data rate.
Load Modulation
The LRI64 is capable of communication to the
VCD via the inductive coupling between the two
antennas. The carrier is loaded, with a subcarrier
with frequency f
S
, generated by switching a load in
the LRI64.
The amplitude of the variation to the signal, as re-
ceived on the VCD antenna, is at least 10mV,
when measured as described in the test methods
defined in International Standard ISO10373-7.
Subcarrier
The LRI64 supports the one subcarrier modulation
response format. This format is selected by the
VCD using the first bit in the protocol header.
The frequency, f
S
, of the subcarrier load modula-
tion is 423.75kHz (=f
C
/32).
Data Rate
The LRI64 response uses the high data rate for-
mat (26.48 kbits/s). The selection of the data rate
is made by the VCD using the second bit in the
protocol header.
Bit Representation and Coding using One
Subcarrier, at the High Data Rate
Data bits are encoded using Manchester coding,
as described in
Figure 10.
and
Figure 11.
Logic 0. A logic 0 starts with 8 pulses of
423.75kHz (f
C
/32) followed by an unmodulated
period of 18.88s as shown in
Figure 10.
Figure 10. Logic 0, High Data Rate
Logic 1. A logic 1 starts with an unmodulated
period of 18.88s followed by 8 pulses of
423.75kHz (f
C
/32) as shown in
Figure 11.
Figure 11. Logic 1, High Data Rate
AI06663
37.76 s
AI06664
37.76 s
11/38
LRI64
LRI64 TO VCD FRAMES
Response Frames are delimited by a Start of
Frame (SOF) and an End of Frame (EOF) and are
implemented using a code violation mechanism.
The LRI64 supports these in the one subcarrier
mode, at the fast data rate, only.
The VCD is ready to receive a response frame
from the LRI64 before 320.9s (t
1
) after having
sent a command frame.
LRI64 SOF
SOF comprises three parts: (see
Figure 12.
)
an unmodulated period of 56.64s,
24 pulses of 423.75kHz (f
c
/32),
a logic 1 which starts with an unmodulated
period of 18.88s followed by 8 pulses of
423.75kHz.
LRI64 EOF
EOF comprises three parts: (see
Figure 13.
)
a logic 0 which starts with 8 pulses of
423.75kHz followed by an unmodulated
period of 18.88s.
24 pulses of 423.75kHz (f
C
/32),
an unmodulated time of 56.64s.
Figure 12. Response SOF, using High Data Rate and One Subcarrier
Figure 13. Response EOF, using High Data Rate and One Subcarrier
AI06671B
113.28 s
37.76 s
AI06675B
113.28 s
37.76 s
LRI64
12/38
SPECIAL FIELDS
Unique Identifier (UID)
Members of the LRI64 family are uniquely identi-
fied by a 64-bit Unique Identifier (UID). This is
used for addressing each LRI64 device uniquely
and individually, during the anti-collision loop and
for one-to-one exchange between a VCD and an
LRI64.
The UID complies with ISO/IEC 15963 and ISO/
IEC 7816-6. It is a read-only code, and comprises
(as summarized in
Figure 14.
):
8-bit prefix, the most significant bits, set at E0h
8-bit IC Manufacturer code (ISO/IEC 7816-6/
AM1), set at 02h (for STMicroelectronics)
48-bit Unique Serial Number
Figure 14. UID Format
Figure 15. Decision Tree for AFI
Application Family Identifier (AFI)
The Application Family Identifier (AFI) indicates
the type of application targeted by the VCD, and is
used to select only those LRI64 devices meeting
the required application criteria (as summarized in
Figure 15.
). The value is programmed by the
LRI64 issuer in the AFI register. Once pro-
grammed, it cannot be modified.
The most significant nibble of the AFI is used to in-
dicate one specific application, or all families. The
least significant nibble of the AFI is used to code
one specific sub-families, or all sub-families. Sub-
family codes, other than 0, are proprietary (as de-
scribed in ISO 15693 and ISO 18000-3 Mode 1
documentation).
Data Storage Format Identifier (DSFID)
The Data Storage Format Identifier (DSFID) indi-
cates how the data is structured in the LRI64
memory. It is coded on one byte. It allows for quick
and brief knowledge on the logical organization of
the data. It is programmed by the LRI64 issuer in
the DSFID register. Once programmed, it cannot
be modified.
Cyclic Redundancy Code (CRC)
The Cyclic Redundancy Code (CRC) is calculated
as defined in ISO/IEC 13239, starting from an ini-
tial register content of all ones: FFFFh.
The 2-byte CRC is appended to each Request and
each Response, within each frame, before the
EOF. The CRC is calculated on all the bytes after
the SOF, up to the CRC field.
Upon reception of a Request from the VCD, the
LRI64 verifies that the CRC value is valid. If it is in-
valid, it discards the frame, and does not answer
the VCD.
Upon reception of a Response from the LRI64, it is
recommended that the VCD verify that the CRC
value is valid. If it is invalid, the actions that need
to be performed are up to the VCD designer.
The CRC is transmitted Least Significant Byte first.
Each byte is transmitted Least Significant Bit first,
as shown in
Figure 16.
).
Figure 16. CRC Format
AI09725
E0h
Unique Serial Number
02h
63
55
47
0
Most significant bits
Least significant bits
AI06679B
Inventory Request
Received
No
No Answer
Yes
No
AFI value
= 0 ?
Yes
No
AFI Flag
Set ?
Yes
Answer given by the VICC
to the Inventory Request
AFI value
= Internal
value ?
AI09726
Most Significant Byte
Least Significant Byte
l.s.bit
l.s.bit
m.s.bit
m.s.bit
13/38
LRI64
LRI64 PROTOCOL DESCRIPTION
The Transmission protocol defines the mecha-
nism to exchange instructions and data between
the VCD and the LRI64, in each direction. Based
on "VCD talks first", the LRI64 does not start trans-
mitting unless it has received and properly decod-
ed an instruction sent by the VCD.
The protocol is based on an exchange of:
a Request from the VCD to the LRI64
a Response from the LRI64 to the VCD
Each Request and each Response are contained
in a Frame. The frame delimiters (SOF, EOF) are
described in the previous paragraphs.
Each Request (
Figure 17.
) consists of:
Request SOF (
Figure 8.
)
Request Flags (
Table 3.
to
Table 5.
)
Command Code
Parameters (depending on the Command)
Application Data
2-byte CRC (
Figure 16.
)
Request EOF (
Figure 9.
)
Each Response (
Figure 18.
) consists of:
Response SOF (
Figure 12.
)
Response Flags (
Table 6.
)
Parameters (depending on the Command)
Application Data
2-byte CRC (
Figure 16.
)
Response EOF (
Figure 13.
)
The number of bits transmitted in a frame is a mul-
tiple of eight, and thus always an integer number
of bytes.
Single-byte fields are transmitted Least Significant
Bit first.
Multiple-byte fields are transmitted Least Signifi-
cant Byte first, with each byte transmitted Least
Significant Bit first.
The setting of the flags indicates the presence of
any optional fields. When the flag is set, 1, the field
is present. When the flag is reset, 0, the field is ab-
sent.
Figure 17. VCD Request Frame Format
Figure 18. LRI64 Response Frame Format
Figure 19. LRI64 Protocol Timing
AI09727
Request
SOF
Request
Flags
Command
Code
Parameters
Data
2-Byte
CRC
Request
EOF
AI09728
Response
SOF
Response
Flags
Parameters
Data
2-Byte
CRC
Response
EOF
AI06830B
VCD
Request Frame
Request Frame
VICC
Response Frame
Response Frame
Timing
t1
t2
t1
t2
LRI64
14/38
LRI64 STATES
A LRI64 can be in any one of three states:
Power-off
Ready
Quiet
Transitions between these states are as specified
in
Figure 20.
Power-off State
The LRI64 is in the Power-off state when it re-
ceives insufficient energy from the VCD.
Ready State
The LRI64 is in the Ready state when it receives
enough energy from the VCD. It answers to any
Request in Addressed and Non-addressed
modes.
Quiet State
When in the Quiet State, the LRI64 answers to any
Request in Addressed mode.
MODES
The term mode refers to the mechanism for spec-
ifying, in a Request, the set of LRI64 devices that
shall answer to the Request.
Addressed Mode
When the Address_flag is set to 1 (Addressed
mode), the Request contains the Unique ID (UID)
of the addressed LRI64 device (such as an LRI64
device). Any LRI64 receiving a Request in which
the Address_flag is set to 1, compares the re-
ceived Unique ID to its own UID. If it matches, it
execute the Request (if possible) and returns a
Response to the VCD, as specified by the com-
mand description. If it does not match, the LRI64
device remains silent.
Non-Addressed Mode (General Request)
When the Address_flag is set to 0 (Non-addressed
mode), the Request does not contain a Unique ID
field. Any LRI64 device receiving a Request in
which the Address_flag is set to 0, executes the
Request and returns a Response to the VCD as
specified by the command description.
Figure 20. LRI64 State Transition Diagram
AI09723
Power Off
In field
Out of
field
Write, Read, Get_System_Info
in addressed mode
Stay quiet(UID)
Out of
field
Inventory (if UID written)
Write, Read, Get_System_Info
in addressed and
non-addressed modes
Ready
Quiet
15/38
LRI64
FLAGS AND ERROR CODES
Request Flags
In a Request, the 8-bit Flags Field specifies the ac-
tions to be performed by the LRI64, and whether
corresponding fields are present or not.
Flag bit 3 (the Inventory_flag) defines the way the
four most significant flag bits (5 to 8) are used.
When bit 3 is reset (0), bits 5 to 8 define the LRI64
selection criteria. When bit 3 is set (1), bits 5 to 8
define the LRI64 Inventory parameters.
Table 3. Request Flags 1 to 4
Note: 1. If the value of the Request Flag is a non authorized value,
the LRI64 does not execute the command, and does not
respond to the request.
Table 4. Request Flags 5 to 8 (when Bit 3 = 0)
Note: 1. Only bit 6 (Address flag) can be configured for the LRI64.
All others bits (5, 7 and 8) must be reset to 0.
Table 5. Request Flags 5 to 8 (when Bit 3 = 1)
Note: 1. Bits 7 and 8 must be reset to 0.
Response Flags
In a Response, the 8-bit Flags Field indicates how
actions have been performed by the LRI64, and
whether corresponding fields are present or not.
Table 6. Response Flags 1 to 8
Response Error Code
If the Error Flag is set by the LRI64 in the Re-
sponse, the Error Code Field is present and pro-
vides information about the error that occurred.
Table 7.
shows the one error code that is support-
ed by the LRI64.
Table 7. Response Error Code
Bit
Name
Value
1
Description
1
Sub-
carrier
Flag
0
Single sub-carrier
frequency mode.
(Option 1 is not supported)
2
Data_rate
Flag
1
High data rate mode.
(Option 0 is not supported)
3
Inventory
Flag
0
Flags 5 to 8 meaning are
according to
Table 4.
1
Flags 5 to 8 meaning are
according to
Table 5.
4
Protocol
Extension
Flag
0
No Protocol format
extension. Must be set to 0.
(Option 1 is not supported)
Bit
Name
Value
1
Description
5
Select
Flag
0
No selection mode.
Must be set to 0.
(Option 1 is not supported)
6
Address
Flag
0
Non addressed mode.
The UID field is not present
in the request. All LRI64
shall answer to the request.
1
Addressed mode.
The UID field is present in
the request. Only the LRI64
that matches the UID
answers the request.
7
Option
Flag
1
0
No option. Must be set to 0.
(Option 1 is not supported)
8
RFU
1
0
No option. Must be set to 0.
(Option 1 is not supported)
Bit
Name
Value
1
Description
5
AFI Flag
0
AFI field is not present
1
AFI field is present
6
Nb_slots
Flag
0
16 slots
1
1 slot
7
Option
Flag
0
No option. Must be set to 0.
(Option 1 is not supported)
8
RFU
0
No option. Must be set to 0.
(Option 1 is not supported)
Bit
Name
Value
Description
1
Error Flag
0
No error
1
Error detected. Error
code is in the "Error"
field.
2
RFU
0
3
RFU
0
4
RFU
0
5
RFU
0
6
RFU
0
7
RFU
0
8
RFU
0
Error
Code
Meaning
0Fh
Error with no specific information given
LRI64
16/38
ANTI-COLLISION
The purpose of the anti-collision sequence is to al-
low the VCD to compile a list of the LRI64 devices
that are present in the VCD field, each one identi-
fied by its unique ID (UID).
The VCD is the master of the communication with
one or multiple LRI64 devices. It initiates the com-
munication by issuing the Inventory Request
(
Figure 23.
).
Request Flags
The Nb_slots_flag needs to be set appropriately.
The AFI Flag needs to be set, if the Optional AFI
Field is to be present.
Mask Length and Mask Value
The Mask Length defines the number of significant
bits in the Mask Value.
The Mask Value is contained in an integer number
of bytes.
The least significant bit of each is transmitted first.
If the Mask Length is not a multiple of 8 (bits), the
most significant end of the Mask Value is padded
with the required number of null bits (set to 0) so
that the Mask Value is contained in an integer
number of bytes, so that the next field (the 2-Byte
CRC) starts at the next byte boundary.
In the example of
Figure 21.
, the Mask Length is
11 bits. The Mask Value, 10011001111, is padded
out at the most significant end with five bits set to
0. The 11 bits Mask plus the current slot number is
compared to the UID.
Inventory Responses
Each LRI64 sends its Response in a given time
slot, or else remains silent.
The first slot starts immediately after the reception
of the Request EOF.
To switch to the next slot, the VCD sends another
EOF.
The following rules and restrictions apply:
if no LRI64 answer is detected, the VCD may
switch to the next slot by sending an EOF
if one or more LRI64 answers are detected,
the VCD waits until the complete frame has
been received before sending an EOF, to
switch to the next slot.
The pulse shall be generated according to the def-
inition of the EOF in ISO 15693 and ISO 18000-3
Mode 1 standards.
Figure 21. Comparison between the Mask, Slot Number and UID
AI06682
Mask value received in the Inventory command
0000 0100 1100 1111 b 16 bits
The Mask value less the padding 0s is loaded
into the Tag comparator
100 1100 1111 b 11 bits
The Slot counter is calculated
xxxx
Nb_slots_flags = 0 (16 slots), Slot Counter is 4 bits
The Slot counter is concatened to the Mask value
xxxx 100 1100 1111 b
Nb_slots_flags = 0
15 bits
The concatenated result is compared with
the least significant bits of the Tag UID.
xxxx xxxx ..... xxxx xxxx x xxx xxxx xxxx xxxx
64 bits
LSB
MSB
b
LSB
MSB
LSB
MSB
LSB
MSB
b0
b63
Compare
Bits ignored
UID
4 bits
17/38
LRI64
REQUEST PROCESSING BY THE LRI64
Upon reception of a valid Request, the LRI64 per-
forms the following algorithm, where:
NbS is the total number of slots (1 or 16)
SN is the current slot number (0 to 15)
The function LSB(value,n) returns the n least
significant bits of value
The function MSB(value,n) returns the n most
significant bits of value
"&" is the concatenation operator
Slot_Frame is either a SOF or an EOF
SN = 0
if (Nb_slots_flag)
then
NbS = 1
SN_length = 0
endif
else
NbS = 16
SN_length = 4
endif
label1:
if LSB(UID, SN_length + Mask_length) =
LSB(SN,SN_length)&LSB(Mask,Mask_length)
then
answer to inventory request
endif
wait (Slot_Frame)
if Slot_Frame = SOF
then
Stop Anticollision
decode/process request
exit
endif
if Slot_Frame = EOF
if SN < NbS-1
thenSN = SN + 1
goto label1
exit
endif
endif
Explanation of the Possible Cases
Figure 22.
summarizes the main possible cases
that can occur during an anti-collision sequence
when the number of slots is 16.
The different steps are:
The VCD sends an Inventory Request, in a
frame, terminated by a EOF. The number of
slots is 16.
LRI64 #1 transmits its Response in Slot 0. It is
the only one to do so, therefore no collision
occurs and its UID is received and registered
by the VCD;
The VCD sends an EOF, to switch to the next
slot.
In slot 1, two LRI64 devices, #2 and #3,
transmit their Responses. This generates a
collision. The VCD records it, and remembers
that a collision was detected in Slot 1.
The VCD sends an EOF, to switch to the next
slot.
In Slot 2, no LRI64 transmits a Response.
Therefore the VCD does not detect a LRI64
SOF, and decides to switch to the next slot by
sending an EOF.
In slot 3, there is another collision caused by
Responses from LRI64 #4 and #5
The VCD then decides to send a Request (for
instance a Read Block) to LRI64 #1, whose
UID was already correctly received.
All LRI64 devices detect a SOF and exit the
anti-collision sequence. They process this
Request and since the Request is addressed
to LRI64 #1, only LRI64 #1 transmits its
Response.
All LRI64 devices are ready to receive another
Request. If it is an Inventory command, the
slot numbering sequence restarts from 0.
Note: the decision to interrupt the anti-collision se-
quence is up to the VCD. It could have continued
to send EOFs until Slot 15 and then send the Re-
quest to LRI64 #1.
LRI64
18/38
Figure 22. Description of a Possible Anti-collision Sequence between LRI64 Devices
AI06831B
S
lot 0
Slo
t 1
S
lot 2
Slo
t 3
VCD
SO
F
Inven
tory
Requ
est
EO
F
E
OF
EOF
E
O
F
SOF
Req
uest to
LR
I512 1
EO
F
Respo
nse
2
Resp
onse
4
VICCs
Resp
onse
fr
om
LRI5
12 1
Re
spon
se
1
Respo
nse
3
Resp
onse
5
Ti
m
i
n
g
t1
t2
t1
t2
t3
t1
t2
t1
Comm
ent
No
c
o
llisio
n
Collis
ion
No
Re
spon
se
Coll
ision
Ti
m
e
19/38
LRI64
TIMING DEFINITIONS
Figure 22.
shows three specific delay times: t
1
, t
2
and t
3
. All of them have a minimum value, speci-
fied in
Table 14.
. The t
1
parameter also has a max-
imum and a typical value specified in
Table 14.
, as
summarized in
Table 8.
Table 8. Timing Values
Note: 1.
t
SOF
is the duration for the LRI64 to transmit an SOF to
the VCD.
2.
t
1
(max)
does not apply for write alike requests. Timing
conditions for write alike requests are defined in the com-
mand description.
3. The tolerance of specific timings is 32/f
C
.
LRI64 Response Delay, t
1
Upon detection of the rising edge of the EOF re-
ceived from the VCD, the LRI64 waits for a time
equal to
t
1
(typ) = 4352 / f
C
before starting to transmit its response to a VCD
request, or switching to the next slot when in an in-
ventory process.
VCD New Request Delay, t
2
t
2
is the time after which the VCD may send an
EOF to switch to the next slot when one or more
LRI64 responses have been received during an in-
ventory command. It starts from the reception of
the EOF received from the LRI64 devices.
The EOF sent by the VCD is 10% modulated, in-
dependent of the modulation index used for trans-
mitting the VCD request to the LRI64.
t
2
is also the time after which the VCD may send a
new request to the LRI64 as described in
Figure
19.
t
2
(min) = 4192 / f
C
VCD New Request Delay when there is No
LRI64 Response, t
3
t
3
is the time after which the VCD may send an
EOF to switch to the next slot when no LRI64 re-
sponse has been received.
The EOF sent by the VCD is 10% modulated, in-
dependent of the modulation index used for trans-
mitting the VCD request to the LRI64.
From the time the VCD has generated the rising
edge of an EOF:
The VCD waits for a time at least equal to the
sum of t
3
(min) and the typical response time of
an LRI64, which depends on the data rate and
subcarrier modulation mode, before sending a
subsequent EOF.
Min.
Typ.
Max.
t
1
t
1
(min)
t
1
(typ) = 4352 / f
C
t
1
(max)
t
2
t
2
(min) = 4192 / f
C
--
--
t
3
t
1
(max) + t
SOF
(see notes
1,2
)
--
--
LRI64
20/38
COMMANDS CODES
The LRI64 supports the command codes listed in
Table 9.
Table 9. Command Codes
Inventory
When receiving the Inventory request, the LRI64
performs the anti-collision sequence. The
Inventory_flag is set to 1. The meanings of Flags
5 to 8 is as described in
Table 5.
The Request Frame (
Figure 23.
) contains:
Request Flags (
Table 3.
and
Table 5.
)
Inventory Command Code (01h,
Table 9.
)
AFI, if the AFI Flag is set
Mask Length
Mask Value
2-byte CRC (
Figure 16.
)
In case of errors in the Inventory request frame,
the LRI64 does not generate any answer.
The Response Frame (
Figure 24.
) contains:
Response Flags (
Table 6.
)
DSFID
Unique ID
2-byte CRC (
Figure 16.
)
Figure 23. Inventory, Request Frame Format
Figure 24. Inventory, Response Frame Format
Command Code
Function
01h
Inventory
02h
Stay Quiet
20h
Read Single Block
21h
Write Single Block
2Bh
Get System Info
AI09729
Request
SOF
Request
Flags
Command
Code
Optional
AFI
Mask Value
2-Byte
CRC
Request
EOF
8 bits
8 bits
01h
8 bits
0 to 8 bytes
16 bits
Mask
Length
8 bits
AI09730
Response
SOF
Response
Flags
DSFID
2-Byte
CRC
Response
EOF
8 bits
8 bits
16 bits
UID
64 bits
21/38
LRI64
Stay Quiet
The Stay Quiet Command is always executed in
Addressed Mode (the Address_Flag is set to 1).
The Request Frame (
Figure 25.
) contains:
Request Flags (22h, as described in
Table 3.
and
Table 4.
)
Stay Quiet Command Code (02h,
Table 9.
)
Unique ID
2-byte CRC (
Figure 16.
)
When receiving the Stay Quiet command, the
LRI64 enters the Quiet State and does not send
back a Response. There is no response to the
Stay Quiet Command.
When in the Quiet State:
the LRI64 does not process any Request in
which the Inventory_flag is set
the LRI64 responds to commands in the
Addressed mode if the UID matches
The LRI64 exits the Quiet State when it is taken to
the Power Off state (
Figure 20.
).
Figure 25. Stay Quiet, Request Frame Format
Figure 26. Stay Quiet Frame Exchange between VCD and LRI64
AI09731
Request
SOF
Request
Flags
Command
Code
2-Byte
CRC
Request
EOF
8 bits
22h
8 bits
02h
16 bits
UID
64 bits
AI06842
VCD
SOF
Stay Quiet
Request
EOF
LRI64
22/38
Read Single Block
When receiving the Read Single Block Command,
the LRI64 reads the requested block and sends
back its 8-bit value in the Response. The
Option_Flag is supported. The Read Single Block
can be issued in both addressed and non ad-
dressed modes.
The Request Frame (
Figure 27.
) contains:
Request Flags (
Table 3.
and
Table 4.
)
Read Single Block Command Code (20h,
Table 9.
)
Unique ID (Optional)
Block Number
2-byte CRC (
Figure 16.
)
If there is no error, at the LRI64, the Response
Frame (
Figure 28.
) contains:
Response Flags (
Table 6.
)
Block Locking Status, if Option_Flag is set
1 byte of Block Data (
Table 10.
)
2-byte CRC (
Figure 16.
)
Otherwise, if there is an error, the Response
Frame (
Figure 29.
) contains:
Response Flags (01h,
Table 6.
)
Error Code (0Fh,
Table 7.
)
2-byte CRC (
Figure 16.
)
Table 10. Block Lock Status
Figure 27. Read Single Block, Request Frame Format
Figure 28. Read Single Block, Response Frame Format, when Error_Flag is not Set
Figure 29. Read Single Block, Response Frame Format, when Error_Flag is Set
Figure 30. READ Single Block Frame Exchange between VCD and LRI64
Bit
Name
Value
Description
0
Block
Locked
0
Current Block not locked
1
Current Block locked
1
to
7
RFU
0
AI09732
Request
SOF
Request
Flags
Command
Code
UID
2-Byte
CRC
Request
EOF
8 bits
8 bits
20h
64 bits
16 bits
Block
Number
8 bits
AI09733
Response
SOF
Response
Flags
BlockLock
Status
2-Byte
CRC
Response
EOF
8 bits
8 bits
16 bits
Data
8 bits
AI09734
Response
SOF
Response
Flags
Error
Code
2-Byte
CRC
Response
EOF
8 bits
01h
8 bits
0Fh
16 bits
AI06832B
VCD
VICC
t1
SOF
Read Single
Block Request
EOF
SOF
Read Single
Block Response
EOF
23/38
LRI64
Write Single Block
When receiving the Write Single Block command,
the LRI64 writes the requested block with the data
contained in the Request and report the success
of the operation in the Response. The Option_Flag
is not supported and must be set to 0. The Write
Single Block can be issued in both addressed and
non addressed modes.
During the write cycle t
W
, no modulation shall oc-
cur, otherwise the LRI64 may program the data in-
correctly in the memory.
The Request Frame (
Figure 31.
) contains:
Request Flags (
Table 3.
and
Table 4.
)
Write Single Block Command Code (21h,
Table 9.
)
Unique ID (Optional)
Block Number
Data
2-byte CRC (
Figure 16.
)
If there is no error, at the LRI64, an empty Re-
sponse Frame (
Figure 32.
) is sent back after the
write cycle, containing no parameters. It just con-
tains:
Response Flags (
Table 6.
)
2-byte CRC (
Figure 16.
)
Otherwise, if there is an error, the Response
Frame (
Figure 33.
) contains:
Response Flags (01h,
Table 6.
)
Error Code (0Fh,
Table 7.
)
2-byte CRC (
Figure 16.
)
Figure 31. Write Single Block, Request Frame Format
Figure 32. Write Single Block, Response Frame Format, when Error_Flag is not Set
Figure 33. Write Single Block, Response Frame Format, when Error_Flag is Set
Figure 34. Write Single Block Frame Exchange between VCD and LRI64
AI09735
Request
SOF
Request
Flags
Command
Code
UID
2-Byte
CRC
Request
EOF
8 bits
8 bits
21h
64 bits
16 bits
Block
Number
8 bits
Data
8 bits
AI09736
Response
SOF
Response
Flags
2-Byte
CRC
Response
EOF
8 bits
16 bits
AI09737
Response
SOF
Response
Flags
Error
Code
2-Byte
CRC
Response
EOF
8 bit
01h
8 bits
0Fh
16 bits
AI06833B
VCD
VICC
VICC
t1
EOF
SOF
Write Single
Block Request
EOF
SOF
Write Single
Block Response
Write sequence when error
SOF
Write Single
Block Response
EOF
t1
tw
LRI64
24/38
Get System Info
When receiving the Get System Info command,
the LRI64 send back its information data in the Re-
sponse.The Option_Flag is not supported and
must be set to 0. The Get System Info can be is-
sued in both addressed and non addressed
modes.
The Request Frame (
Figure 27.
) contains:
Request Flags (
Table 3.
and
Table 4.
)
Get System Info Command Code (2Bh,
Table
9.
)
Unique ID (Optional)
2-byte CRC (
Figure 16.
)
If there is no error, at the LRI64, the Response
Frame (
Figure 28.
) contains:
Response Flags (
Table 6.
)
Information Flags set to 0Fh, indicating the
four information fields that are present
(DSFID, AFI, Memory Size, IC Reference)
Unique ID
DSFID value (as written in block 9)
AFI value (as written in block 8)
Memory size: for the LRI64, there are 15
blocks (0Eh) of 1 byte (00h).
IC Reference: only the 6 most significant bits
are used. The product code of the LRI64 is
00 0101
b
=5
d
2-byte CRC (
Figure 16.
)
Otherwise, if there is an error, the Response
Frame (
Figure 29.
) contains:
Response Flags (01h,
Table 6.
)
Error Code (0Fh,
Table 7.
)
2-byte CRC (
Figure 16.
)
Figure 35. Get System Info, Request Frame Format
Figure 36. Get System Info, Response Frame Format, when Error_Flag is not Set
Figure 37. Get System Info, Response Frame Format, when Error_Flag is Set
Figure 38. Get System Info Frame Exchange between VCD and LRI64
AI09738
Request
SOF
Request
Flags
Command
Code
UID
2-Byte
CRC
Request
EOF
8 bits
8 bits
2Bh
64 bits
16 bits
AI09739
Response
SOF
Response
Flags
Information
Flags
UID
2-Byte
CRC
Response
EOF
8 bits
00h
8 bits
0Fh
64 bits
16 bits
DSFID
8 bits
AFI
8 bits
Memory
Size
16 bits
000Eh
IC
Ref
8 bits
000101xxb
AI09740
Response
SOF
Response
Flags
Error
Code
2-Byte
CRC
Response
EOF
8 bits
01h
8 bits
0Fh
16 bits
AI09724
VCD
VICC
t1
SOF
Get System
Info Request
EOF
SOF
Get System
Info Response
EOF
25/38
LRI64
MAXIMUM RATING
Stressing the device above the rating listed in the
Absolute Maximum Ratings table may cause per-
manent damage to the device. These are stress
ratings only and operation of the device at these or
any other conditions above those indicated in the
Operating sections of this specification is not im-
plied. Exposure to Absolute Maximum Rating con-
ditions for extended periods may affect device
reliability. Refer also to the STMicroelectronics
SURE Program and other relevant quality docu-
ments.
Table 11. Absolute Maximum Ratings
Note: 1. Mil. Std. 883 - Method 3015
2. ESD test: ISO10373-7 specification
Symbol
Parameter
Min.
Max.
Unit
T
STG
, h
STG
, t
STG
Storage Conditions
Wafer
15
25
C
23
months
kept in its antistatic bag
A1, A6, A7
15
25
C
40%
60%
RH
2
years
I
CC
Supply Current on AC0 / AC1
20
20
mA
V
MAX
Input Voltage on AC0 / AC1
7
7
V
V
ESD
Electrostatic Discharge Voltage
1
A1, A6, A7
7000
7000
V
LRI64
26/38
DC AND AC PARAMETERS
This section summarizes the operating and mea-
surement conditions, and the DC and AC charac-
teristics of the device. The parameters in the DC
and AC Characteristic tables that follow are de-
rived from tests performed under the Measure-
ment Conditions summarized in the relevant
tables. Designers should check that the operating
conditions in their circuit match the measurement
conditions when relying on the quoted parame-
ters.
Table 12. Operating Conditions
Figure 39. LRI64 Synchronous Timing, Transmit and Receive
Figure 39.
shows an ASK modulated signal, from
the VCD to the LRI64. The test condition for the
AC/DC parameters are:
Close coupling condition with tester antenna
(1mm)
Gives LRI64 performance on tag antenna
Table 13. DC Characteristics
Note: 1. T
A
=20 to 85C
Symbol
Parameter
Min.
Max.
Unit
T
A
Ambient Operating Temperature
20
85
C
AI06680B
A
B
tRFF
tRFR
tRFSBL
tMIN CD
fCC
Symbol
Parameter
Test Conditions
1
Min.
Typ.
Max.
Unit
V
CC
Regulated Voltage
1.5
3.0
V
V
RET
Retromodulated Induced
Voltage
ISO10373-7
10
mV
I
CC
Supply Current
Read
V
CC
= 3.0V
50
A
Write
V
CC
= 3.0V
150
A
C
TUN
Internal Tuning Capacitor
f=13.56MHz for W4/1
21
pF
f=13.56MHz for W4/2
28.5
pF
27/38
LRI64
Table 14. AC Characteristics
Note: 1. T
A
=20 to 85C
2. All timing measurements were performed on a reference antenna with the following characteristics:
External size: 75mm x 48mm
Number of turns: 6
Width of conductor: 1mm
Space between 2 conductors: 0.4mm
Value of the Tuning Capacitor: 28.5pF (LRI64-W4)
Value of the coil: 4.3H
Tuning Frequency: 14.4MHz.
Symbol
Parameter
Test Conditions
1, 2
Min.
Typ.
Max.
Unit
f
C
External RF Signal Frequency
13.553
13.56
13.567
MHz
MI
CARRIER
10% Carrier Modulation Index
MI=(A-B)/(A+B)
10
30
%
t
RFR
, t
RFF
10% Rise and Fall Time
0
3.0
s
t
RFSBL
10% Minimum Pulse Width for
Bit
7.1
9.44
s
t
JIT
Bit Pulse Jitter
2
+2
s
t
MINCD
Minimum Time from Carrier
Generation to First Data
From H-field min
0.1
1
ms
f
SH
Subcarrier Frequency High
f
C
/32
423.75
kHz
t
1
Time for LRI64 Response
4352/f
C
313
320.9
322
s
t
2
Time between Commands
4224/f
C
309
311.5
314
s
t
W
Programming Time
93297/f
C
6.88
ms
LRI64
28/38
PACKAGE MECHANICAL
Figure 40. A1 Antenna on Tape Outline
Note: Drawing is not to scale.
Table 15. A1 Antenna on Tape Mechanical Data
Symbol
Parameter
Typ
Min
Max
Unit
A1
Coil Width
45
44.5
45.5
mm
A2
Coil Length
76
75.5
76.5
mm
B1
Antenna Cut Width
49
48.8
49.2
mm
B2
Antenna Cut Length
82
81.8
82.2
mm
C1
Die Position from Antenna
23
22.8
23.2
mm
C2
Die Position from Antenna
56
55.8
56.2
mm
Silicon Thickness
180
165
195
m
Q
Unloaded Q value
35
F
NOM
Unloaded free-air resonance
15.1
MHz
P
A
H-field Energy for Device Operation
0.03
90
A/m
dbA/m
A1
B1
A2
B2
C2
C1
ai10119
29/38
LRI64
Figure 41. A6 Antenna on Tape Outline
Note: Drawing is not to scale.
Table 16. A6 Antenna on Tape Mechanical Data
Symbol
Parameter
Typ
Min
Max
Unit
A
Coil Diameter
35
34.5
35.5
mm
B
Antenna cut diameter
40
38.8
40.2
mm
I
Hole Diameter
16
15.8
16.2
mm
Overall Thickness of copper antenna coil
80
70
90
m
Silicon Thickness
180
165
195
m
Q
Unloaded Q value
35
F
NOM
Unloaded free-air resonance
15.1
MHz
P
A
H-field Energy for Device Operation
0.5
114
A/m
dbA/m
A
B
ai10120
I
LRI64
30/38
Figure 42. A7 Antenna on Tape Outline
Note: Drawing is not to scale.
Table 17. A7 Antenna on Tape Mechanical Data
Symbol
Parameter
Typ
Min
Max
Unit
A1
Coil Width
40
39.5
40.5
mm
A2
Coil Length
20
19.5
20.5
mm
B1
Antenna Cut Width
44
43.8
44.2
mm
B2
Antenna Cut Length
24
23.8
24.2
mm
C1
Die Position from Antenna
10
9.8
10.2
mm
C2
Die Position from Antenna
20
19.8
20.2
mm
Overall Thickness of copper antenna coil
160
145
175
m
Silicon Thickness
180
165
195
m
Q
Unloaded Q value
35
F
NOM
Unloaded free-air resonance
15.1
MHz
P
A
H-field Energy for Device Operation
1
120
A/m
dbA/m
C2
A2
B2
C1
C1
A1
B1
ai10121
31/38
LRI64
Figure 43. 8-lead Ultra thin Fine pitch Dual Flat Package No lead (MLP) Outline
Note: Drawing is not to scale.
Table 18. 8-lead Ultra thin Fine pitch Dual Flat Package No lead (MLP) Mechanical Data
Symbol
Millimeters
Inches
Typ.
Min.
Max.
Typ.
Min.
Max.
A
0.55
0.50
0.60
0.022
0.020
0.024
A1
0.00
0.05
0.000
0.002
b
0.25
0.20
0.30
0.010
0.008
0.012
D
2.00
0.079
D2
1.55
1.65
0.061
0.065
ddd
0.05
0.002
E
3.00
0.118
E2
0.15
0.25
0.006
0.010
e
0.50
0.020
L
0.45
0.40
0.50
0.018
0.016
0.020
L1
0.15
0.006
L3
0.30
0.012
N
8
8
D
E
UFDFPN-01
A
A1
ddd
L1
e
b
D2
L
E2
L3
LRI64
32/38
PART NUMBERING
Table 19. Ordering Information Scheme
For a list of available options (speed, package, etc.) or for further information on any aspect of this device,
please contact your nearest ST Sales Office, or send your enquiries to the following e-mail address: mem-
ories.contactless@st.com
Example:
LRI64
W4
/ XXX
Device Type
LRI64
Package
W4 =180
m 15
m Unsawn Wafer, 18.5 pF tuning capacitor
SBN18= 180m 15 m Bumped and Sawn Wafer on 8-inch Frame
A1T= 45mm x 76mm Copper Antenna on Continuous Tape
A1S= 45mm x 76mm Copper Singulated Adhesive Antenna on Tape
A6S2U= 35mm Copper Singulated Adhesive CD Antenna on white PET Tape and no marking
A7T= 20mm x 40mm Copper Antenna on Continuous Tape
MBTG = UDFDFPN8 (MLP8), Tape & Reel Packing, Lead-Free, RoHS compliant,
Sb2O3-free and TBBA-free
Customer Code
XXX = Given by STMicroelectronics
33/38
LRI64
APPENDIX A. ALGORITHM FOR PULSED SLOTS
The following pseudo-code describes how the
anti-collision could be implemented on the VCD,
using recursive functions.
function push (mask, address); pushes on private stack
function pop (mask, address); pops from private stack
function pulse_next_pause; generates a power pulse
function store(LRI64_UID); stores LRI64_UID
function poll_loop (sub_address_size as integer)
pop (mask, address)
mask = address & mask; generates new mask
; send the Request
mode = anti-collision
send_Request (Request_cmd, mode, mask length, mask value)
for sub_address = 0 to (2^sub_address_size - 1)
pulse_next_pause
if no_collision_is_detected ; LRI64 is inventoried
then
store (LRI64_UID)
else; remember a collision was detected
push(mask,address)
endif
next sub_address
if stack_not_empty ; if some collisions have been detected and
then ; not yet processed, the function calls itself
poll_loop (sub_address_size); recursively to process the last stored collision
endif
end poll_loop
main_cycle:
mask = null
address = null
push (mask, address)
poll_loop(sub_address_size)
end_main_cycle
LRI64
34/38
APPENDIX B. C-EXAMPLE TO CALCULATE OR CHECK THE CRC16
ACCORDING TO ISO/IEC 13239
The Cyclic Redundancy Check (CRC) is calculat-
ed on all data contained in a message, from the
start of the Flags through to the end of Data. This
CRC is used from VCD to LRI64 and from LRI64
to VCD.
To add extra protection against shifting errors, a
further transformation on the calculated CRC is
made. The One's Complement of the calculated
CRC is the value attached to the message for
transmission.
For checking of received messages the 2 CRC
bytes are often also included in the re-calculation,
for ease of use. In this case, given the expected
value for the generated CRC is the residue of
F0B8h
Table 20. CRC Definition
CRC Calculation Example
This example in C language illustrates one method
of calculating the CRC on a given set of bytes
comprising a message.
#define POLYNOMIAL0x8408// x^16 + x^12 + x^5 + 1
#define PRESET_VALUE0xFFFF
#define CHECK_VALUE0xF0B8
#define NUMBER_OF_BYTES4// Example: 4 data bytes
#define CALC_CRC1
#define CHECK_CRC0
void main()
{
unsigned int current_crc_value;
unsigned char array_of_databytes[NUMBER_OF_BYTES + 2] = {1, 2, 3, 4, 0x91, 0x39};
int number_of_databytes = NUMBER_OF_BYTES;
int calculate_or_check_crc;
int i, j;
calculate_or_check_crc = CALC_CRC;
// calculate_or_check_crc = CHECK_CRC;// This could be an other example
if (calculate_or_check_crc == CALC_CRC)
{
number_of_databytes = NUMBER_OF_BYTES;
}
else // check CRC
{
number_of_databytes = NUMBER_OF_BYTES + 2;
}
current_crc_value = PRESET_VALUE;
for (i = 0; i < number_of_databytes; i++)
{
current_crc_value = current_crc_value ^ ((unsigned int)array_of_databytes[i]);
for (j = 0; j < 8; j++)
{
if (current_crc_value & 0x0001)
CRC Definition
CRC Type
Length
Polynomial
Direction
Preset
Residue
ISO/IEC 13239
16 bits
X
16
+ X
12
+ X
5
+ 1 = Ox8408
Backward
FFFFh
F0B8h
35/38
LRI64
{
current_crc_value = (current_crc_value >> 1) ^ POLYNOMIAL;
}
else
{
current_crc_value = (current_crc_value >> 1);
}
}
}
if (calculate_or_check_crc == CALC_CRC)
{
current_crc_value = ~current_crc_value;
printf ("Generated CRC is 0x%04X\n", current_crc_value);
// current_crc_value is now ready to be appended to the data stream
// (first LSByte, then MSByte)
}
else // check CRC
{
if (current_crc_value == CHECK_VALUE)
{
printf ("Checked CRC is ok (0x%04X)\n", current_crc_value);
}
else
{
printf ("Checked CRC is NOT ok (0x%04X)\n", current_crc_value);
}
}
}
LRI64
36/38
APPENDIX C. APPLICATION FAMILY IDENTIFIER (AFI) CODING
AFI (Application Family Identifier) represents the
type of application targeted by the VCD and is
used to extract from all the LRI64 present only the
LRI64 meeting the required application criteria.
It is programmed by the LRI64 issuer (the pur-
chaser of the LRI64). Once locked, it can not be
modified.
The most significant nibble of AFI is used to code
one specific or all application families, as defined
in
Table 21.
The least significant nibble of AFI is used to code
one specific or all application sub-families. Sub-
family codes different from 0 are proprietary.
Table 21. AFI Coding
Note: x and y each represent any single-digit hexadecimal value between 1 and F
AFI
Most
Significant
Nibble
AFI
Least
Significant
Nibble
Meaning
LRI64 Devices respond from
Examples / Note
0
0
All families and sub-families No
applicative
preselection
x
0
All sub-families of family X
Wide applicative preselection
x
y
Only the Yth sub-family of family X
0
y
Proprietary sub-family Y only
1
0, y
Transport
Mass transit, Bus, Airline,...
2
0, y
Financial
IEP, Banking, Retail,...
3
0, y
Identification
Access Control,...
4
0, y
Telecommunication
Public Telephony, GSM,...
5
0, y
Medical
6
0, y
Multimedia
Internet services....
7
0, y
Gaming
8
0, y
Data Storage
Portable Files...
9
0, y
Item Management
A
0, y
Express Parcels
B
0, y
Postal Services
C
0, y
Airline Bags
D
0, y
RFU
E
0, y
RFU
F
0, y
RFU
37/38
LRI64
REVISION HISTORY
Table 22. Document Revision History
Date
Rev.
Description of Revision
27-Aug-2003
1.0
First Issue
16-Jul-2004
2.0
First public release of full datasheet
22-Sep-2004
3.0
Values changed for t
W
, t
1
and t
2
11-Jul-2005
4.0
Added MLP package information.
7-Sept-2005
5.0
Modified Option_Flag information in
Get System Info
command and added ISO 18000-3 Mode
1 compliance.
LRI64
38/38
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
2005 STMicroelectronics - All rights reserved
STMicroelectronics group of companies
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