STP16NE06L
STP16NE06L/FP
N - CHANNEL ENHANCEMENT MODE
SINGLE FEATURE SIZE
TM
POWER MOSFET
TARGET DATA
s
TYPICAL R
DS(on)
= 0.09
s
AVALANCHE RUGGED TECHNOLOGY
s
100% AVALANCHE TESTED
s
175
o
C OPERATING TEMPERATURE
s
HIGH dV/dt CAPABILITY
s
APPLICATION ORIENTED
CHARACTERIZATION
DESCRIPTION
This Power Mosfet is the latest development of
SGS-THOMSON unique "Single Feature Size"
process whereby a single body is implanted on a
strip layout structure. The resulting transistor
shows extremely high packing density for low on-
resistance, rugged avalance characteristics and
less critical alignment steps therefore a remark-
able manufacturing reproducibility.
APPLICATIONS
s
DC MOTOR CONTROL
s
DC-DC & DC-AC CONVERTERS
s
SYNCHRONOUS RECTIFICATION
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Val ue
Un it
ST P16NE06L
STP16NE06LF P
V
DS
Drain-source Volt age (V
GS
= 0)
60
V
V
DGR
Drain- gate Volt age (R
GS
= 20 k
)
60
V
V
G S
Gat e-source Voltage
15
V
I
D
Drain Current (continuous) at T
c
= 25
o
C
16
11
A
I
D
Drain Current (continuous) at T
c
= 100
o
C
10
7
A
I
DM
(
)
Drain Current (pulsed)
64
64
A
P
t ot
Tot al Dissipation at T
c
= 25
o
C
60
30
W
Derating F act or
0.4
0.2
W /
o
C
V
ISO
Insulation W ithst and Voltage (DC)
2000
V
dV/ dt
Peak Diode Recovery voltage slope
6
V/ns
T
stg
Storage Temperature
-65 to 175
o
C
T
j
Max. O perat ing Junction Temperature
175
o
C
(
) Pulse width limited by safe operating area
(
1
) I
SD
16 A, di/dt
200 A/
s, V
DD
V
(BR)DSS
, T
j
T
JMAX
TYPE
V
DSS
R
DS(on)
I
D
ST P16NE06L
ST P16NE06LFP
60 V
60 V
< 0.12
< 0.12
16 A
11 A
October 1997
TO-220
TO-220FP
1
2
3
1
2
3
1/7
THERMAL DATA
T O-220
T O-220F P
R
t hj-ca se
Thermal Resistance Junction-case
Max
2.5
5
o
C/ W
R
t hj- amb
R
thc- si nk
T
l
Thermal Resistance Junction-ambient
Max
Thermal Resistance Case-sink
Typ
Maximum Lead Temperature For Soldering Purpose
62.5
0.5
300
o
C/ W
o
C/ W
o
C
AVALANCHE CHARACTERISTICS
Symb ol
Parameter
Max Valu e
Uni t
I
AR
Avalanche Current , Repet itive or Not -Repetitive
(pulse widt h limited by T
j
max,
< 1%)
16
A
E
AS
Single Pulse Avalanche Energy
(starting T
j
= 25
o
C, I
D
= I
AR
, V
DD
= 25 V)
80
mJ
ELECTRICAL CHARACTERISTICS (T
case
= 25
o
C unless otherwise specified)
OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
(BR)DSS
Drain-source
Breakdown Volt age
I
D
= 250
A
V
G S
= 0
60
V
I
DSS
Zero Gat e Voltage
Drain Current (V
GS
= 0)
V
DS
= Max Rating
V
DS
= Max Rating
T
c
= 125
o
C
1
10
A
A
I
GSS
Gate-body Leakage
Current (V
DS
= 0)
V
G S
=
15V
100
nA
ON (
)
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
V
GS(th)
Gate T hreshold Voltage V
DS
= V
GS
I
D
= 250
A
2
3
4
V
R
DS( on)
St atic Drain-source On
Resistance
V
G S
= 5V
I
D
= 8 A
V
G S
= 10V
I
D
= 8 A
0.090
0.12
I
D(o n)
On Stat e Drain Current
V
DS
> I
D(on)
x R
DS(on) max
V
G S
= 10 V
16
A
DYNAMIC
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
g
fs
(
)
Forward
Transconductance
V
DS
> I
D(on)
x R
DS(on) max
I
D
=8 A
6
S
C
iss
C
oss
C
rss
Input Capacitance
Output Capacit ance
Reverse Transfer
Capacitance
V
DS
= 25 V
f = 1 MHz
V
GS
= 0
800
100
50
pF
pF
pF
STP16NE06L/FP
2/7
ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
d(on)
t
r
Turn-on T ime
Rise Time
V
DD
= 30 V
I
D
= 8 A
R
G
=4.7 W
V
GS
= 5V
ns
ns
Q
g
Q
gs
Q
gd
Total Gat e Charge
Gate-Source Charge
Gate-Drain Charge
V
DD
= 40 V
I
D
= 16 A
V
G S
= 5 V
nC
nC
nC
SWITCHING OFF
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
t
r(Vof f)
t
f
t
c
Of f-voltage Rise Time
Fall T ime
Cross-over T ime
V
DD
= 48 V
I
D
= 16 A
R
G
=4.7
V
G S
= 5 V
ns
ns
ns
SOURCE DRAIN DIODE
Symb ol
Parameter
Test Cond ition s
Mi n.
Typ .
Max.
Un it
I
SD
I
SDM
(
)
Source-drain Current
Source-drain Current
(pulsed)
A
A
V
SD
(
)
Forward O n Volt age
I
SD
= 16 A
V
GS
= 0
1.5
V
t
rr
Q
rr
I
RRM
Reverse Recovery
Time
Reverse Recovery
Charge
Reverse Recovery
Current
I
SD
= 16 A
di/ dt = 100 A/
s
V
DD
= 30 V
T
j
= 150
o
C
ns
C
A
(
) Pulsed: Pulse duration = 300
s, duty cycle 1.5 %
(
) Pulse width limited by safe operating area
STP16NE06L/FP
3/7
Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STP16NE06L/FP
4/7
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
4.40
4.60
0.173
0.181
C
1.23
1.32
0.048
0.051
D
2.40
2.72
0.094
0.107
D1
1.27
0.050
E
0.49
0.70
0.019
0.027
F
0.61
0.88
0.024
0.034
F1
1.14
1.70
0.044
0.067
F2
1.14
1.70
0.044
0.067
G
4.95
5.15
0.194
0.203
G1
2.4
2.7
0.094
0.106
H2
10.0
10.40
0.393
0.409
L2
16.4
0.645
L4
13.0
14.0
0.511
0.551
L5
2.65
2.95
0.104
0.116
L6
15.25
15.75
0.600
0.620
L7
6.2
6.6
0.244
0.260
L9
3.5
3.93
0.137
0.154
DIA.
3.75
3.85
0.147
0.151
L6
A
C
D
E
D1
F
G
L7
L2
Dia.
F1
L5
L4
H2
L9
F2
G1
TO-220 MECHANICAL DATA
P011C
STP16NE06L/FP
5/7
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