ChipFind - документация

Электронный компонент: TDA7344

Скачать:  PDF   ZIP
TDA7344
DIGITAL CONTROLLED AUDIO PROCESSOR
WITH SURROUND SOUND MATRIX
1 STEREO INPUT
VOLUME CONTROL IN 1.25dB STEP
TREBLE AND BASS CONTROL
THREE SURROUND MODES ARE AVAIL-
ABLE:
MOVIE, MUSIC AND SIMULATED
FOUR SPEAKER ATTENUATORS:
4 INDEPENDENT SPEAKERS CONTROL
IN 1.25dB STEPS FOR BALANCE FACILITY
INDEPENDENT MUTE FUNCTION
ALL FUNCTIONS PROGRAMMABLE VIA SE-
RIAL BUS
DESCRIPTION
The TDA7344 is a volume tone (bass and treble)
balance (Left/Right) processor for quality audio
applications in car radio and Hi-Fi systems.
It reproduces surround sound by using phase
shifters and a signal matrix. Control of all the
functions is accomplished by serial bus.
The AC signal setting is obtained by resistor net-
works and switches combined with operational
amplifiers.
Thanks to the used BIPOLAR/CMOS Technology,
Low Distortion, Low Noise and DC stepping are
obtained.
February 1997
PIN CONNECTIONS
ORDERING NUMBERS: TDA7344P (PQFP44)
TDA7344S (SDIP42)
PQFP44
(10 X 10)
SDIP42
1/20
BLOCK DIAGRAM
TDA7344
2/20
TEST CIRCUIT
THERMAL DATA
Symbol
Description
Value
Unit
R
th j-pins
Thermal Resistance Junction-pins
Ma x.
85
C/W
QUICK REFERENCE DATA
Symbol
Parameter
Min.
Typ.
Max.
Unit
V
S
Supply Voltage
7
9
10.5
V
V
CL
Max. input signal handling
2
Vrms
THD
Total Harmonic Distortion V = 1Vrms f = 1KHz
0.02
0.1
%
S/N
Signal to Noise Ratio V
out
= 1Vrms (made = OFF)
106
dB
S
C
Channel Separation f = 1KHz
70
dB
Volume Control
1.25dB step
-78.75
0
dB
Treble Control
(2db step)
-14
+14
dB
Bass Control (2db step)
-14
+14
dB
Balance Control
1.25dB step (L
CH,
R
CH
)
-38.75
0
dB
Mute Attenuation
90
dB
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
V
S
Operating Supply Voltage
11
V
T
amb
Operating Ambient Temperature
-10 to 85
C
T
stg
Storage Temperature Range
-55 to +150
C
TDA7344
3/20
ELECTRICAL CHARACTERISTICS (refer to the test circuit T
amb
= 25
C, V
S
= 9V, R
L
= 10K
,
R
G
= 600
, all controls flat (G = 0),Effect Ctrl = -6dB, MODE = OFF; f = 1KHz
unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SUPPLY
V
S
Supply Voltage
7
9
10.5
V
I
S
Supply Current
20
25
35
mA
SVR
Ripple Rejection
L
CH
/ R
CH out
, Mode = OFF
60
80
dB
INPUT STAGE
R
II
Input Resistance
35
50
65
K
V
CL
Clipping Level
THD = 0.3%; Lin or Rin
2
2.5
Vrms
THD = 0.3%; Rin + Lin (2)
3.0
Vrms
C
RANGE
Control Range
19.68
dB
A
VMIN
Min. Attenuation
-1
0
1
dB
A
VMAX
Max. Attenuation
18.68
19.68
20.68
dB
A
STEP
Step Resolution
0.11
0.31
0.51
dB
V
DC
DC Steps
adjacent att. step
-3
0
3
mV
VOLUME CONTROL
C
RANGE
Control Range
70
75
dB
A
VMIN
Min. Attenuation
-1
0
1
dB
A
VMAX
Max. Attenuation
70
75
dB
A
STEP
Step Resolution
Av = 0 to -40dB
0.5
1.25
1.75
dB
E
A
Attenuation Set Error
Av = 0 to -20dB
Av = -20 to -60dB
-1.5
-3
0
1.5
2
dB
dB
E
T
Tracking Error
2
dB
V
DC
DC Steps
adjacent attenuation steps
From 0dB to Av max
-3
-5
0
0.5
3
5
mV
mV
BASS CONTROL (1)
Gb
Control Range
Max. Boost/cut
+11.5
+14
+16
dB
B
STEP
Step Resolution
1
2
3
dB
R
B
Internal Feedback Resistance
32
44
56
K
TREBLE CONTROL (1)
Gt
Control Range
Max. Boost/cut
+13
+14
+15
dB
T
STEP
Step Resolution
0.5
2
1.5
dB
EFFECT CONTROL
C
RANGE
Control Range
- 21
- 6
dB
S
STEP
Step Resolution
1
dB
TDA7344
4/20
ELECTRICAL CHARACTERISTICS (continued)
SURROUND SOUND MATRIX
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
G
OFF
In-phase Gain (OFF)
Mode OFF , Input signal of
1kHz, 1.4 V
p-p
, R
in
R
out
L
in
L
out
-1.5
0
1.5
dB
D
GOFF
LR In-phase Gain Difference
(OFF)
Mode OFF , Input signal of
1kHz, 1.4 V
p-p
(R
in
R
out
), (L
in
L
out
)
-1.5
0
1.5
dB
G
MOV1
In-phase Gain (Movie 1)
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
R
in
R
out
, L
in
L
out
7
dB
G
MOV2
In-phase Gain (Movie 2)
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
R
in
R
out
, L
in
L
out
8
dB
D
GMOV
LR In-phase Gain Diffrence
(Movie)
Movie mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
(R
in
R
out
) (L
in
L
out
)
0
dB
G
MUS1
In-phase Gain (Music 1)
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
(R
in
R
out
) (L
in
L
out
)
6
dB
G
MUS2
In-phase Gain (Music 2)
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
R
in
R
out
, L
in
L
out
7.5
dB
D
GMUS
LR In-phase Gain Difference
(Music)
Music mode, Effect Ctrl = -6dB
Input signal of 1kHz, 1.4 V
p-p
(R
in
R
out
) (L
in
L
out
)
0
dB
L
MON1
Simulated L Output 1
Simulated Mode, Effect Ctrl = -6dB
Input signal of 250Hz,
1.4 V
p-p
, R
in
and L
in
L
ou t
4.5
dB
L
MON2
Simulated L Output 2
Simulated Mode, Effect Ctrl = -6dB
Input signal of 1kHz,
1.4 V
p-p
, R
in
and L
in
L
ou t
4.0
dB
L
MON3
Simulated L Output 3
Simulated Mode, EffectCtrl = -6dB
Input signal of 3.6kHz,
1.4 V
p-p
, R
in
and L
in
L
ou t
7.0
dB
R
MON1
Simulated R Output 1
Simulated Mode, Effect Ctrl = -6dB
Input signal of 250Hz,
1.4 V
p-p
, R
in
and L
in
R
out
4.5
dB
R
MON2
Simulated R Output 2
Simulated Mode, Effect Ctrl = -6dB
Input signal of 1kHz,
1.4 V
p-p
, R
in
and L
in
R
out
3.8
dB
R
MON3
Simulated R Output 3
Simulated Mode, Effect Ctrl = -6dB
Input signal of 3.6kHz,
1.4 V
p-p
, R
in
and L
in
R
out
20
dB
R
LP1
Low Pass Filter Resistance
7.5
10
12.5
K
R
PS1
Phase Shifter 1 Resistance
13.5
17.95
22.5
k
R
PS2
Phase Shifter 2 Resistance
0.3
0.4
0.5
K
R
PS3
Phase Shifter 3 Resistance
13.6
18.08
22.6
K
R
PS4
Phase Shifter 4 Resistance
13.6
18.08
22.6
K
R
HPF
High Pass Filter Resistance
45
60
75
K
R
LPF
LP Pin Impedance
7.5
10
12.5
K
TDA7344
5/20
ELECTRICAL CHARACTERISTICS (continued)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
SPEAKER ATTENUATORS
C
range
Control Range
35
37.5
40
dB
S
STEP
Step Resolution
0.5
1.25
1.75
dB
E
A
Attenuation set error
-1.5
1.5
dB
A
MUTE
Output Mute Attenuation
80
90
dB
V
DC
DC Steps
adjacent att. steps
from 0 to mute
0
1
mV
mV
SPEAKER ATTENUATORS AUX
C
range
Control Range
70
75
dB
S
STEP
Step Resolution
Av = 0 to -40dB
0.5
1.25
1.75
dB
E
A
Attenuation set error
Av = 0 to 20dB
-1.5
0
1.5
dB
Av = -20 to -60dB
-3
0
2
dB
V
DC
DC Steps
adjacent att. steps
-3
0
3
mV
A
MUTE
Output Mute Attenuation
80
90
dB
AUDIO OUTPUTS
V
OCL
Clipping Level
d = 0.3%
2
2.5
Vrms
R
OUT
Output resistance
100
200
300
V
OUT
DC Voltage Level
4.2
4.5
4.8
V
GENERAL
N
O(OFF)
Output Noise (OFF)
B
W
= 20Hz to 20KHz
Output R and L
Output AUX R and L
8
15
15
30
Vrms
Vrms
N
O(MOV)
Output Noise (Movie)
Mode =Movie ,
B
W
= 20Hz to 20KHz
R
out
and L
out
measurement
30
Vrms
N
O(MUS)
Output Noise (Music)
Mode = Music ,
B
W
= 20Hz to 20KHz,
R
out
and L
out
measurement
30
Vrms
N
O(MON)
Output Noise (Simulated)
Mode = Simulated,
B
W
= 20Hz to 20KHz
R
out
and L
out
measurement
30
Vrms
d
Distorsion
Av = 0 ; V
in
= 1Vrms
0.02
0.1
%
S
C
Channel Separation
60
70
dB
BUS INPUTS
V
IL
Input Low Voltage
1
V
V
IH
Input High Voltage
3
V
I
IN
Input Current
-5
+5
A
V
O
Output Voltage SDA
Acknowledge
I
O
= 1.6mA
0.4
0.8
V
Note:
(1) Bass and Treble response: The center frequency and the resonance quality can be choosen by
the external circuitry. A standard first order bass response can be realized by a standard feedback network.
(2) The peack voltage of the two input signals must be less then
V
S
2
:
(Lin + Rin)
peak
A
Vin
<
V
S
2
TDA7344
6/20
I
2
C BUS INTERFACE
Data transmission from microprocessor to the
TDA7344 and viceversa takes place through the
2 wires I
2
C BUS interface, consisting of the two
lines SDA and SCL (pull-up resistors to positive
supply voltage must be connected).
Data Validity
As shown in fig. 3, the data on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH tran-
sition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred on the SDA line must con-
tain 8 bits. Each byte must be followed by an ac-
knowledge bit. The MSB is transferred first.
Acknowledge
The master (
P) puts a resistive HIGH level on the
SDA line during the acknowledge clock pulse (see
fig. 5). The peripheral (audioprocessor) that ac-
knowledges has to pull-down (LOW) the SDA line
during the acknowledge clock pulse, so that the
SDA line is stable LOW during this clock pulse.
The audioprocessor which has been addressed
has to generate an acknowledge after the recep-
tion of each byte, otherwise the SDA line remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can gen-
erate the STOP information in order to abort the
transfer.
Transmission without Acknowledge
Avoiding to detect the acknowledge of the audio-
processor, the
P can use a simpler transmission:
simply it waits one clock without checking the
slave acknowledging, and sends the new data.
This approach of course is less protected from
misworking and decreases the noise immunity.
Figure 3: Data Validity on the I
2
CBUS
Figure 4: Timing Diagram of I
2
CBUS
Figure 5: Acknowledge on the I
2
CBUS
TDA7344
7/20
INTERFACE FEATURES
- Due to the fact that the MSB is used to select
if the byte transmitted is a subaddress (func-
tion) or a data (value), between a start and
stop condition, is possible to receive, how
many subaddresses and datas as wanted.
- The subaddress (function) is fixed until a new
subaddress is transmitted, so the TDA7344
can receive how many data as wanted for the
selected subaddress (without the need for a
new start condition)
- If TDA7344 receives a subaddress with the
LSB = 1 the incremental bus is selected, so it
enters in a loop condition that means that
every acknowledge will increase automat-
ically the subaddress (function) and it re-
ceives the data related to the new subad-
dress.
EXAMPLES
1) NO INCREMENTAL BUS
TDA7344 receives a start condition, the correct
chip address, a subaddress with the LSB = 0 (no
incremental bus), N-datas (all these datas con-
cern the subaddress selected), a new subad-
dress, N-data, a stop condition.
So it can receive in a single transmission how
many subaddress are necessary, and for each
subaddress how many data are necessary.
2) INCREMENTAL BUS
TDA7344 receives a start condition, the correct
chip address a subaddress with the LSB = 1 (in-
cremental bus): now it is in a loop condition with
an autoincrease of the subaddress.
The first data that it receives doesn't concern the
subaddress sended but the next one, the second
one concerns the subaddress sended plus two in
the loop etc, and at the end it receives the stop
condition.
In the pictures there are some examples:
S = start
A
CHIP ADDRESS
0
80 (HEX)
1
82 (HEX)
ACK = acknowledge
B = 1 incremental bus, B = 0 no incremental bus
P = stop
SOFTWARE SPECIFICATION
Interface Protocol
The interface protocol comprises:
A start condition (s)
A chip address byte, containing the TDA7344
address (the 8th bit of the byte must be 0). The
TDA7344 must always acknowledge at the end
of each transmitted byte.
A subaddress (function) bytes (identified by the
MSB = 0)
A sequence of dates and subaddresses (N
bytes + achnowledge. The dates are identified
by MSB = 1, subaddresses by MSB = 0)
A stop condition (P)
1) one subaddress, with n data concerning that subaddress (no incremental bus)
ACK = Achnowledge
S = Start
P = Stop
TDA7344
8/20
MSB
LSB
SUBADDRESS
A0
A1
A2
A3
B
0
0
0
0
X
X
X
B
VOLUME ATTENUATION &
LOUDNESS
0
1
0
0
X
X
X
B
SURROUND & OUT &
EFFECT CONTROL
0
0
1
0
X
X
X
B
BASS
0
1
1
0
X
X
X
B
TREBLE
0
0
0
1
X
X
X
B
ATT SPEAKER R
0
1
0
1
X
X
X
B
ATT SPEAKER L
0
0
1
1
X
X
X
B
ATT. R
OUT
AUX
0
1
1
1
0
X
X
B
ATT. L
OUT
AUX
0
1
1
1
1
X
X
B
INPUT STAGE CONTROL
B = 1 yes incremental bus;
B = 0 no incremental bus;
X = indifferent 0,1
The first byte select the function, it is identified by the MSB = 0
DATA BYTES
FUNCTION SELECTION
FIRST BYTE (subaddress)
2) one subaddress, (with incremental bus) , with n data (data1 that concerns subaddress +1, data 2
that concerns subaddress + 2 etc.)
3) more subaddress with more data
TDA7344
9/20
VOLUME ATTENUATION
MSB
LSB
1.25 dB STEPS
1
0
0
0
0
1
0
0
1
-1.25
1
0
1
0
-2.50
1
0
1
1
-3.75
1
1
0
0
-5.00
1
1
0
1
-6.25
1
1
1
0
-7.50
1
1
1
1
-8.75
10 dB STEPS
1
0
0
0
0
1
0
0
1
-10
1
0
1
0
-20
1
0
1
1
-30
1
1
0
0
-40
1
1
0
1
-50
1
1
1
0
-60
1
1
1
1
-70
SELECTION
LOUDNESS
1
0
ON
1
1
OFF
ATT AUX OUT1 AND 2
MSB
LSB
1.25 dB STEPS
1
0
0
0
0
1
0
0
1
-1.25
1
0
1
0
-2.50
1
0
1
1
-3.75
1
1
0
0
-5.00
1
1
0
1
-6.25
1
1
1
0
-7.50
1
1
1
1
-8.75
10 dB STEPS
1
0
0
0
0
1
0
0
1
-10
1
0
1
0
-20
1
0
1
1
-30
1
1
0
0
-40
1
1
0
1
-50
1
1
1
0
-60
1
1
1
1
-70
MUTE
1
0
OFF
1
1
ON
VALUE SELECTION
The second byte select the value, it is identified by the MSB = 1
TDA7344
10/20
ATT SPEAKER R AND L
MSB
LSB
1.25 dB STEPS
1
X
X
0
0
0
0
1
X
X
0
0
1
-1.25
1
X
X
0
1
0
-2.50
1
X
X
0
1
1
-3.75
1
X
X
1
0
0
-5.00
1
X
X
1
0
1
-6.25
1
X
X
1
1
0
-7.50
1
X
X
1
1
1
-8.75
10 dB STEPS
1
X
X
0
0
0
1
X
X
0
1
-10
1
X
X
1
0
-20
1
X
X
1
1
-30
1
X
X
1
1
1
1
1
MUTE
TREBLE/ BASS
MSB
LSB
2 dB STEPS
1
X
X
X
0
1
1
1
14
1
X
X
X
0
1
1
0
12
1
X
X
X
0
1
0
1
10
1
X
X
X
0
1
0
0
8
1
X
X
X
0
0
1
1
6
1
X
X
X
0
0
1
0
4
1
X
X
X
0
0
0
1
2
1
X
X
X
0
0
0
0
0
1
X
X
X
1
0
0
0
0
1
X
X
X
1
0
0
1
-2
1
X
X
X
1
0
1
0
-4
1
X
X
X
1
0
1
1
-6
1
X
X
X
1
1
0
0
-8
1
X
X
X
1
1
0
1
-10
1
X
X
X
1
1
1
0
-12
1
X
X
X
1
1
1
1
-14
TDA7344
11/20
SURROUND & OUT & EFFECT CONTROL
MSB
LSB
SELECTION
SELECTION
SURROUND
1
0
0
SIMULATED
1
0
1
MUSIC
1
1
0
MOVIE
1
1
1
OFF
SELECTION
OUT
1
0
OUT VAR
1
1
OUT FIX
SELECTION
EFFECT CONTROL
1
0
0
0
0
-6
1
0
0
0
1
-7
1
0
0
1
0
-8
1
0
0
1
1
-9
1
0
1
0
0
-10
1
0
1
0
1
-11
1
0
1
1
0
-12
1
0
1
1
1
-13
1
1
0
0
0
-14
1
1
0
0
1
-15
1
1
0
1
0
-16
1
1
0
1
1
-17
1
1
1
0
0
-18
1
1
1
0
1
-19
1
1
1
1
0
-20
1
1
1
1
1
-21
For example to select the music mode, out fix, effect control =-9dB:
1 0 0 1 1 1 0 1
TDA7344
12/20
INPUT CONTROL RANGE (0 TO -19.68dB)
MSB
LSB
0.3125 dB STEPS
1
X
0
0
0
0
1
Xx
0
0
1
-0.3125
1
X
0
1
0
-0.625
1
X
0
1
1
-0.9375
1
X
1
0
0
-1.25
1
X
1
0
1
-1.5625
1
X
1
1
0
-1.875
1
X
1
1
1
-2.1875
2.5 dB STEPS
1
X
0
0
0
0
1
X
0
0
1
-2.5
1
X
0
1
0
-5.0
1
X
0
1
1
-7.5
1
X
1
0
0
-10
1
X
1
0
1
-12.5
1
X
1
1
0
-15
1
X
1
1
1
-17.5
POWER ON RESET
VOLUME ATTENUATION
MAX ATTENUATION, LOUDNESS OFF
TREBLE
-14dB
BASS
-14dB
SURROUND & OUT CONTROL + EFFECT CONTROL
OFF + FIX + MAX ATTENUATION
ATT SPEAKER R
MUTE
ATT SPEAKER L
MUTE
ATT AUX OUT 1
MUTE
ATT AUX OUT 2
MUTE
TDA7344
13/20
PIN: L
OUD -R
, L
OUB-L
PIN: L
in
, R
in
PIN: AC - L
IN
, AC - R
IN
,
PIN: AC - L
O
, AC - R
O
,
PIN: HP1
PIN: HP2
TDA7344
14/20
PIN: VAR
O
- L, VAR
O
-R
PIN: TREBLE - L, TREBLE - R
PIN: L
OUT
, R
OUT
, L
OUT AUX,
R
OUT AUX,
REAR
PIN: VAR
i
- L, VAR
i
-R
PIN: BASS - LA, BASS - RA
PIN: BASS - LB, BASS - RB
TDA7344
15/20
PIN: PS3, PS2
PIN: LP
PIN: C
REF
PIN: PS3A, PS4A
PIN: SCL, SDA
PIN: ADDR
TDA7344
16/20
PIN: PS1A
PIN: PS1
PIN: LP1
PIN: PS2
PIN: PS2A
TDA7344
17/20
A
A2
A1
B
Seating Plane
C
11
12
22
23
33
34
44
E3
D3
E1
E
D1
D
e
1
K
B
PQFP44
L
L1
0.10mm
.004
PQFP44 PACKAGE MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
2.45
0.096
A1
0.25
0.010
A2
1.95
2.00
2.10
0.077
0.079
0.083
B
0.30
0.45
0.012
0.018
c
0.13
0.23
0.005
0.009
D
12.95
13.20
13.45
0.51
0.52
0.53
D1
9.90
10.00
10.10
0.390
0.394
0.398
D3
8.00
0.315
e
0.80
0.031
E
12.95
13.20
13.45
0.510
0.520
0.530
E1
9.90
10.00
10.10
0.390
0.394
0.398
E3
8.00
0.315
L
0.65
0.80
0.95
0.026
0.031
0.037
L1
1.60
0.063
K
0
(min.), 7
(max.)
TDA7344
18/20
A1
B
e
B1
D
22
21
42
1
LA
e1
A2
c
E1
E
e2
Gage Plane
.015
0,38
e2
e3
E
SDIP42
SDIP42 PACKAGE MECHANICAL DATA
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
5.08
0.20
A1
0.51
0.020
A2
3.05
3.81
4.57
0.120
0.150
0.180
B
0.38
0.46
0.56
0.0149
0.0181
0.0220
B1
0.89
1.02
1.14
0.035
0.040
0.045
c
0.23
0.25
0.38
0.0090
0.0098
0.0150
D
36.58
36.83
37.08
1.440
1.450
1.460
E
15.24
16.00
0.60
0.629
E1
12.70
13.72
14.48
0.50
0.540
0.570
e
1.778
0.070
e1
15.24
0.60
e2
18.54
0.730
e3
1.52
0.060
L
2.54
3.30
3.56
0.10
0.130
0.140
TDA7344
19/20
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the
consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No
license is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specification mentioned
in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-
THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express
written approval of SGS-THOMSON Microelectronics.
1997 SGS-THOMSON Microelectronics Printed in Italy All Rights Reserved
SGS-THOMSON Microelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
TDA7344
20/20