1/27
TDA7416
September 2003
s
3 STEREO INPUTS
s
1 PSEUDO DIFFERENTIAL STEREO INPUT
s
VOLUME CONTROL
s
7 BAND EQUALIZER FILTER CONTROL
s
HIGH PASS FILTER FOR SUBWOOFER
APPLICATION
s
DIRECT MUTE AND SOFT MUTE
s
4 INDEPENDENT SPEAKER OUTPUTS
s
SOFT STEP SPEAKER CONTROL
s
SUBWOOFER OUTPUT WITH SOFT STEP
s
7 BAND SPECTRUM ANALYZER
s
FULL MIXING CAPABILITY
s
HPF2 WITH ZEROCROSS
s
I
2
C-BUS INTERFACE
DESCRIPTION
The device includes a high performance audiopro-
cessor with 7 bands equalizer and spectrum ana-
lyzer. The digital control allows a programming in
a wide range of all the filter characteristics.
TQFP44
ORDERING NUMBER: TDA7416
CARRADIO SIGNAL PROCESSOR
PIN CONNECTION (Top view)
1
2
3
5
6
4
7
8
9
10
17
11
18
19
20
21
22
44
43
42
41
39
40
38
37
36
35
34
28
27
26
24
23
25
33
32
31
29
30
N.C.
N.C.
AUXR
PDL+
PD-
N.C.
PDR+
MIX
N.C.
GND
N.C.
SDA
SCL
SAIN
MUTE
SAOUT
OUTSW
FILOR
AC2OUT3
AC2INR
OUTRR
OURF
N.C.
ACOUTR
ACINSW
ACOUTSW
Cref
N.C.
AML
AMR
MDL
MDR
AUXL
N.C.
OUTLR
OUTLF
FILOL
AC2OUTL
AC2INL
VDD
VREFOUT
ACINL
ACOUTL
ACINR
TQFP44
12
13
14
15
16
TDA7416
2/27
SUPPLY
THERMAL DATA
ABSOLUTE MAXIMUM RATINGS
ESD:
All pins are protected against ESD according to the MIL883 standard.
Symbol
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
V
S
Supply Voltage
7.5
9
10
V
I
S
Supply Current
V
S
= 9V
35
45
55
mA
SVRR
Ripple Rejection @ 1kHz
Audioprocessor (all Filters flat)
60
dB
Symbol
Description
Value
Unit
R
th j-pins
Thermal Resistance Junction-pins max
65
C/W
Symbol
Parameter
Value
Unit
V
S
Operating Supply Voltage
10.5
V
T
amb
Operating Temperature Range
-40 to 85
C
T
stg
Storage Temperature Range
-55 to +150
C
3/27
TDA7416
BLOCK DIAGRAM
TDA7416
4/27
FEATURES
Input multiplexer
1 pseudo differential CDC stereo input, programmable as single-ended input
3 single-ended stereo inputs
Input gain adjust 0 to 15dB with 1dB steps
direct mute
internal offset-cancellation (autozero)
Mixing stage
mixable mix input to Front speaker outputs
Input controls +15 to -79dB with 1dB steps
direct mute
Loudness
programmable center frequency and filter slope
19dB with 1dB steps
selectable flat-mode (constant attenuation)
Volume
+32 to -79.5dB with 0.5dB step resolution
soft-step control with programmable blend times
100dB range
Equalizer
seven bands
2nd order frequency response
center frequency programmable for lowest and highest filter
programmable quality factor in four steps for each filter
-15 to 15dB range with 1dB resolution
Spectrum analyzer
seven bandpass filters
2nd order frequency response
programmable quality factor for different visual appearance
analog output
controlled by external serial clock
High pass
2nd order butterworth highpass with programmable cut-off frequency
selectable flat-mode
Speaker
4 independent soft step speaker controls, +15 to -79dB with 1dB steps
mute
4 independent programmable mix inputs with 50% mixing ratio
Subwoofer
single-ended monaural output
independent soft step level control +15 to -79dB with 1dB steps
Mute functions
direct mute
digitally controlled SoftMute with 3 programmable mute-times
Effect
Gain effect or high pass effect fixed external components
5/27
TDA7416
Table 1. ELECTRICAL CHARACTERISTICS
(V
S
=9V; T
amb
=25C; R
L
=10k
; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
INPUT SELECTOR
R
in
Input Resistance
all single ended Inputs
70
100
130
k
V
CL
Clipping Level
1.8
2.2
V
RMS
S
IN
Input Separation
80
100
dB
G
IN MIN
Min. Input Gain
-1
0
1
dB
G
IN MAX
Max. Input Gain
13
15
17
dB
G
STEP
Step Resolution
0.5
1
1.5
dB
V
DC
DC Steps
Adjacent Gain Steps
-5
1
5
mV
G
MIN
to G
MAX
-10
1
10
mV
V
offset
Remaining offset with Autozero
0.5
mV
DIFFERENTIAL STEREO INPUTS
R
in
Input Resistance (see Fig. 1)
Differential
70
100
130
k
CMRR
Common Mode Rejection Ratio
V
CM
= 1V
RMS
@ 1kHz
46
70
dB
V
CM
= 1V
RMS
@ 10kHz
46
60
dB
e
NO
Output-Noise @ Speaker-Outputs 20Hz - 20kHz, flat; all stages 0dB
11
V
MIXING CONTROL
M
LEVEL
Mixing Ratio
Main / Mix-Source
-6/-6
dB
G
MAX
Max. Gain
13
15
17
dB
A
MAX
Max. Attenuation
-83
-79
-75
dB
A
STEP
Attenuation Step
0.5
1
1.5
dB
LOUDNESS CONTROL
A
STEP
Step Resolution
0.5
1
1.5
dB
A
MAX
Max. Attenuation
-21
-19
-17
dB
f
Peak
Peak Frequency
f
P1
180
200
220
Hz
f
P2
360
400
440
Hz
f
P3
540
600
660
Hz
f
P4
720
800
880
Hz
VOLUME CONTROL
G
MAX
Max. Gain
18
20
22
dB
A
MAX
Max. Attenuation
-83
-79
-75
dB
A
STEP
Step Resolution
0
0.5
1
dB
E
A
Attenuation Set Error
G = -20 to +20dB
-0.75
0
+0.75
dB
G = -80 to -20dB
-4
0
3
dB
E
T
Tracking Error
2
dB
V
DC
DC Steps
Adjacent Attenuation Steps
0.1
3
mV
From 0dB to G
MIN
0.5
5
mV
SOFT MUTE
A
MUTE
Mute Attenuation
80
100
dB
TDA7416
6/27
T
D
Delay Time
T1
0.48
1
ms
T2
0.96
2
ms
T3
70
123
170
ms
V
TH low
Low Threshold for SM-Pin
1)
1
V
V
TH high
High Threshold for SM - Pin
2.5
V
R
PU
Internal pull-up resistor
32
45
58
k
V
PU
Internal pull-up Voltage
3.3
V
EQUALIZER CONTROL
C
RANGE
Control Range
+14
+15
+16
dB
A
STEP
Step Resolution
0.5
1
1.5
dB
f
C1
Center Frequency Band 1
f
C1a
55
62
69
Hz
f
C1b
90
100
110
Hz
f
C2
Center Frequency Band 2
f
C2
141
157
173
Hz
f
C3
Center Frequency Band 3
f
C3
365
396
437
Hz
f
C4
Center Frequency Band 4
f
C4
0.9
1
1.1
kHz
f
C5
Center Frequency Band 5
f
C5
2.25
2.51
2.76
kHz
f
C6
Center Frequency Band 6
f
C6a
3.6
4
4.4
kHz
f
C6b
5.70
6.34
6.98
kHz
f
C7
Center Frequency Band 7
f
C7a
13.5
15
16.5
kHz
f
C7b
14.4
16
17.6
kHz
Q
Quality Factor
Q
1
0.9
1
1.1
Q
2
1.26
1.4
1.54
Q
3
1.62
1.8
1.98
Q
4
1.98
2.2
2.44
DC
GAIN
DC-gain, Band 1
DC = off
-1
0
+1
dB
DC = on, 15dB boost
4
dB
SPECTRUM ANALYZER CONTROL
V
SAOut
Output Voltage Range
0
3.3
V
f
C1
Center Frequency Band 1
f
C1
55
62
69
Hz
f
C2
Center Frequency Band 2
f
C2
141
157
173
Hz
f
C3
Center Frequency Band 3
f
C3
356
396
436
Hz
f
C4
Center Frequency Band 4
f
C4
0.9
1
1.1
kHz
f
C5
Center Frequency Band 5
f
C5
2.26
2.51
2.76
kHz
f
C6
Center Frequency Band 6
f
C6
5.70
6.34
6.98
kHz
f
C7
Center Frequency Band 7
f
C7
14.4
16
17.6
kHz
Q
Quality Factor
Q
1
1.62
1.8
1.98
Q
2
3.15
3.5
3.85
f
SAClk
Clock Frequency
1
100
kHz
t
SAdel
Analog Output Delay Time
2
s
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(V
S
=9V; T
amb
=25C; R
L
=10k
; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
1) The SM-Pin is active low (Mute = 0)
7/27
TDA7416
t
repeat
Spectrum Analyzer Repeat Time
50
ms
t
intres
Internal Reset Time
3
ms
HPF2
V
TH
Zero Crossing Threshold
20
mV
E
MAX
Max. Effect
22
dB
E
MIN
Min. Effect
4
dB
E
STEP
Step Resolution
1.5
2
2.5
dB
SPEAKER ATTENUATORS
R
in
Input Impedance
35
50
65
k
G
MAX
Max. Gain
13
15
17
dB
A
MAX
Max. Attenuation
-83
-79
-75
dB
A
STEP
Step Resolution
0.5
1
1.5
dB
A
MUTE
Output Mute Attenuation
80
90
dB
E
E
Attenuation Set Error
3
dB
V
DC
DC Steps
Adjacent Attenuation Steps
0.5
5
mV
M
R
Mixing Ratio
Signal/Mix
In
50/50
%
AUDIO OUTPUTS
V
CLIP
Clipping Level
Thd=0.3%
1.8
2.2
V
RMS
R
L
Output Load Resistance
2
k
C
L
Output Load Capacitance
10
nF
R
OUT
Output Impedance
30
120
V
DC
DC Voltage Level
4.3
4.5
4.7
V
HIGH PASS
f
HP
Highpass corner frequency
f
HP1
81
90
99
Hz
f
HP2
122
135
148
Hz
f
HP3
162
180
198
Hz
f
HP4
194
215
236
Hz
SUBWOOFER ATTENUATOR
R
in
Input Impedance
35
50
65
k
G
MAX
Max. Gain
14
15
16
dB
A
ATTN
Max. Attenuation
-83
-79
-75
dB
A
STEP
Step Resolution
0.5
1
1.5
dB
A
MUTE
Output Mute Attenuation
80
90
dB
E
E
Attenuation Set Error
2
dB
V
DC
DC Steps
Adjacent Attenuation Steps
1
5
mV
SUBWOOFER Lowpass
f
LP
Lowpass corner frequency
f
LP1
72
80
88
Hz
f
LP2
108
120
132
Hz
f
LP3
144
160
176
Hz
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(V
S
=9V; T
amb
=25C; R
L
=10k
; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
TDA7416
8/27
1
DESCRIPTION OF THE AUDIOPROCESSOR PART
1.1 Input stages
In the basic configuration one pseudo-differential, three single ended stereo are available.
Figure 1. Input-stages
GENERAL
e
NO
Output Noise
BW = 20Hz - 20kHz
output muted
3
15
V
BW = 20Hz - 20kHz
all gains = 0dB
single ended inputs
15
20
V
V
S/N
Signal to Noise Ratio
all gains = 0dB
flat; V
O
= 2V
RMS
103
dB
All EQ-bands at +12dB; Q = 1.0
a-weighted; V
O
= 2.6V
RMS
87
dB
d
distortion
V
IN
= 1V
RMS
; all stages 0dB
0.01
0.1
%
V
OUT
= 1V
RMS
; Bass & Treble = 12dB
0.05
0.1
%
S
C
Channel Separation left/right
80
90
dB
Table 1. ELECTRICAL CHARACTERISTICS (continued)
(V
S
=9V; T
amb
=25C; R
L
=10k
; all gains=0dB; f=1kHz; unless otherwise specified)
Symbol
Parameter
Test Condition
Min.
Typ.
Max.
Unit
Vref
Vref
Vref
Vref
Vref
Vref
Vref
+
-
1
1
IN1-
IN1+
IN2
IN3
IN4
InGain
Fader
Stereo
Pseudo
differential
Main Selector
Mute
Rear Selector
Mute
IN1
IN2
IN3
IN4
IN4
IN3
IN2
IN1
9/27
TDA7416
1.1.1 Pseudo-differential stereo Input (IN1)
The IN1-input is implemented as a buffered pseudo-differential stereo stage with 100k
input-impedance
at each input pin. This input is also configurable as single-ended stereo input . The common input-pin, IN1-
features a fast charge switch to speed up the charge time of external capacitors.- This switch is released
the first time the input-selector data-byte (0) is assessed.
1.1.2 Single-ended stereo Inputs
All single ended inputs have an input impedance of 100k
.
1.2 AutoZero
The AutoZero allows a reduction of the number of pins as well as external components by canceling any
offset generated by or before the In-Gain-stage (Please notice that externally generated offsets, e.g. gen-
erated through the leakage current of the coupling capacitors, are not canceled).
The auto-zeroing is started every time the DATA-BYTE 0 is selected and needs max. 0.3ms for the align-
ment. To avoid audible clicks the Audioprocessor have to be muted by softmute or hard mute during this
time.
1.2.1 AutoZero-Remain
In some cases, for example if the P is executing a refresh cycle of the IIC-Bus-programming, it is not
useful to start a new AutoZero-action because no new source is selected and an undesired mute would
appear at the out-puts. For such applications the TDA7416 could be switched in the AutoZero-Remain-
Mode (Bit 6(I1) of the subad-dress-byte). If this bit is set to high, the DATABYTE 0 could be loaded without
invoking the AutoZero and the old adjustment-value remains.
1.3 Loudness
There are four parameters programmable in the loudness stage:
1.3.1 Attenuation
Figure 2 shows the attenuation as a function of frequency at f
P
= 400Hz
Figure 2. Loudness Attenuation @ f
P
= 400Hz.
dB
Hz
-25.0
-20.0
-15.0
-10.0
-5.0
0.0
10.0
100.0
1.0K
10.0K
TDA7416
10/27
1.3.2 Peak Frequency
Figure 3 shows the four possible peak-frequencies at 200, 400, 600 and 800Hz
Figure 3. Loudness Center frequencies @ Attn. = 15dB
1.3.3 Loudness filter order
Different shapes of 1st and 2nd-Order Loudness
Figure 4. 1st and 2nd Order Loudness @ Attn. = 15dB, fP=400Hz
1.3.4 Flat Mode
In flat mode the loudness stage works as a 0dB to -19dB attenuator.
dB
Hz
-20.0
-15.0
-10.0
-5.0
0.0
10.0
100.0
1.0K
10.0K
dB
Hz
-20.0
-15.0
-10.0
-5.0
0.0
10.0
100.0
1.0K
10.0K
11/27
TDA7416
1.4 SoftMute
The digitally controlled SoftMute stage allows muting/demuting the signal with a I
2
C-bus programmable
slope. The mute process can either be activated by the SoftMute pin or by the I
2
C-bus. This slope is real-
ized in a special S-shaped curve to mute slow in the critical regions (see Figure 5).
For timing purposes the Bit0 of the I
2
C-bus output register is set to 1 from the start of muting until the end
of de-muting.
Figure 5. Soft Mute-Timing
Note: Please notice that a started Mute-action is always terminated and could not be interrupted by a change of the mute -signal.
1.5 SoftStep Volume and Speaker
When the speaker-level is changed audible clicks could appear at the output. The root cause of those
clicks could either be a DC-Offset before the speaker-stage or the sudden change of the envelope of the
audio signal. With the SoftStep-feature both kinds of clicks could be reduced to a minimum and are no
more audible. The blend-time from one step to the next is programmable in four steps.
Figure 6. SoftStep-Timing for Volume
Note: For steps more than 0.5dB (Volume) or 1dB (Speaker) the SoftStep mode should be deactivated because it could generate a hard 1dB
step during blending.
1dB
0.5dB
-0.5dB
-1dB
SS Time
TDA7416
12/27
1.6 Equalizer filter
There are three parameters programmable in the equalizer filter:
1.6.1 Attenuation
Figure 7 shows the boost and cut response as a function of frequency at a center frequency of 1kHz.
Figure 7. Equalizer filter control @ f
Center
= 1kHz, Q = 1.0
1.6.2 Center Frequency
This parameter is programmable in the filter stage 1(62/100Hz), 6(4/6.34kHz) and 7(15/16kHz) only.
Figure 8 shows the center frequencies 62, 156, 396, 1000, 2510, 6340 and 15000Hz of the 7 equalizer
filters.
Figure 8. Center frequencies @ Gain = 15dB, Q = 1.0
20
10k
100
1k
Hz
-15
15
-10
10
-5
5
0
dB
20k
10
20k
100
1k
Hz
-2
0
16
2
14
4
12
6
10
8
dB
13/27
TDA7416
1.6.3 Quality Factors
Figure 9 shows the four possible quality factors 1, 1.4, 1.8 and 2.2
Figure 9. Quality factors @ boost = 15dB, f
Center
= 1kHz
1.6.4 Superposition of all EQ Filters
Figure 10 shows the superposition of all equalizer filter curves for different quality factors. The gain for all
filters is +15dB.
Figure 10. Superposition of all EQ bands @ boost = 15dB
10
20k
100
1k
Hz
-2
0
16
2
14
4
12
6
10
8
dB
10
20k
100
1k
Hz
0
2
18
4
16
6
14
8
12
10
dB
TDA7416
14/27
1.6.5 DC-mode of equalizer band 1 (62/100 Hz)
In this mode, the DC-gain 4dB when set to 15dB boost.
Figure 11. EQ band1, normal- and DC-mode @ boost = 15 dB, f
Center
= 62 Hz
Note: The center frequency, Q, DC-mode and boost/cut can be set fully independently for each filter.
1.7 Subwoofer Application
Figure 12. Subwoofer Application with Lowpass @ 80/120/160Hz and HighPass @ 90/135/180Hz
Both filters, the lowpass- as well as the highpass-filter, have butterworth characteristic so that their cut-off
frequen-cies are not equal but shifted by the factor 1.125 to get a flat frequency response.
1
10K
10
1K
100
Hz
-1
16
0
14
2
12
4
10
6
8
dB
dB
Hz
-50.0
-40.0
-30.0
-20.0
-10.0
0.0
10.0
100.0
1.0K
10.0K
15/27
TDA7416
1.8 Spectrum analyzer
A fully integrated seven band spectrum analyzer with programmable quality factor is present in the
TDA7416(Fig. 13).
The spectrum analyzer consists of seven band pass filters with rectifier and sample capacitor which stores
the maximum peak signal level since the last read cycle. This peak signal level can be read by a micro-
processor at the SAout-pin. To allow easy interfacing to an analog port of the microprocessor, the output
voltage at this pin is re-ferred to device ground.
The microprocessor starts a read cycle with the negative going clock edge at the SAclk input. On the fol-
lowing positive clock edges, the peak signal level for the band pass filters is subsequently switched to
SAout. Each analog output data is valid after the time t
SAdel
. A reset of the sample capacitors is induced
whenever SAclk remains high for the time t
intres
. Note that a proper reset requires the clock signal SAclk
to be held at high potential. Figure 13 shows the block diagram and figure 14 illustrates the read cycle
timing of the spectrum analyzer.
Figure 13. Spectrum analyzer block diagram
Figure 14. Timing spectrum analyzer
TDA7416
16/27
1.9 AC-coupling
In some applications additional signal manipulations are desired. For this purpose an AC-coupling is
placed before the speaker(fader)-attenuators, which can be activated or internally shorted by I
2
C-Bus. In
short condition the input-signal of the speaker-attenuator is available at the AC-outputs. The input-imped-
ance of this AC-inputs is 50k . In addition there are Mix inputs available. With this inputs it is possible to
mix an external signal to every speaker with a mixing ratio of 50% (see figure 14).
The source of front and rear speaker can be set independently.
As source is choosable :
- internal dc coupling (not recommended)
- external ac coupling using ACin pins
Figure 15. AC/DC-coupling
1.10 Front Speaker-Attenuator and Mixing
A Mixing-stage is placed after front speaker-attenuator and can be set independently to mixing-mode.
Having a full volume for the Mix-signal the stage offers a wide flexibility to adapt the mixing levels.
Figure 16. Output Selector
1.11 Audioprocessor Testing
During the Testmode, which can be activated by setting bit I
2
of the subaddress byte and D
0
of the audio-
processor testing byte, several internal signals are available at the Mix pin. During this mode the input
resistance of 100kOhm is disconnected from the pin. The internal signals available are shown in the Data-
byte specification.
Vref
Vref
1
1
left channel
right channel
SWin
ACinL
A CoutL
SWout
Front Fader
Rear Fader
Subwoofer Fader
Rear selector
Highpass
Lowpass
fr
flat
fr
flat
1
Front
From M I Xin
OutF
Volume
+15/-79dB
1dB step
Volume
+15/-79dB
1dB step
Highpass2
25k
25k
17/27
TDA7416
2
I
2
C BUS INTERFACE
2.1 Interface Protocol
The interface protocol comprises:
-a start condition (S)
-a chip address byte (the LSB bit determines read / write transmission)
-a subaddress byte
-a sequence of data (N-bytes + acknowledge)
-a stop condition (P)
S = Start
R/W = "0" -> Receive-Mode (Chip could be programmed by P)
"1" -> Transmission-Mode (Data could be received by P)
ACK = Acknowledge
P = Stop
MAX CLOCK SPEED 500kbits/s
2.1.1 Auto increment
If bit I in the subaddress byte is set to "1", the auto increment of the subaddress is enabled.
2.1.2 TRANSMITTED DATA (send mode)
SM = Soft mute activated
X = Not Used
The transmitted data is automatically updated after each ACK.
Transmission can be repeated without new chip address.
2.1.3 Reset Condition
A Power-On-Reset is invoked if the Supply-Voltage is below than 3.5V. After that, the following data is written
automatically into the registers of all subaddresses:
The programming after POR is marked bold-face / underlined in the programming tables.
With this programming all the outputs are muted to V
REF
(V
OUT
= V
DD
/2).
CHIP ADDRESS
SUBADDRESS
DATA 1...DATA n
MSB
LSB
MSB
LSB
MSB
LSB
S 1 0 0 0 1 1 0 R/W ACK
T
AZ
I
A
A
A
A
A
ACK
DATA
ACK
P
MSB
LSB
X
X
X
X
X
X
X
SM
MSB
LSB
1
1
1
1
1
1
1
0
TDA7416
18/27
2.2 SUBADDRESS (receive mode)
1MSB
LSB
FUNCTION
I
2
I
1
I
0
A
4
A
3
A
2
A
1
A
0
0
1
Audioprocessor Testmode
off
on
0
1
AutoZero Remain
off
on
0
1
Auto-Increment Mode
off
on
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
Subaddress
Source Selector
Loudness
Volume
EQ Filter 1 (62/100Hz)
EQ Filter 2 (157Hz)
EQ Filter 3 (396Hz)
EQ Filter 4 (1kHz)
EQ Filter 5 (2.51kHz)
EQ Filter 6 (4/6.34kHz)
EQ Filter 7 (15/16kHz)
Mixing Programming
SoftMute
Subwoofer / Spectrum analyzer / HighPass
Configuration Audioprocessor I
Mixing Level Control
Speaker attenuator LF
Speaker attenuator RF
Speaker attenuator LR
Speaker attenuator RR
Subwoofer attenuator
Testing Audioprocessor
19/27
TDA7416
2.3 DATA BYTE SPECIFICATION
The status after Power-On-Reset is marked bold-face / underlined in the programming tables.
2.3.1 Input Selector (0)
2.3.2 Loudness (1)
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
X
X
X
X
0
0
1
1
0
1
0
1
Source Selector
BUS/PD
AUX
MD
AM/FM
0
0
:
1
1
0
0
:
1
1
0
0
:
1
1
0
1
:
0
1
Input Gain
0dB
1dB
:
14dB
15dB
0
1
Mute
off
on
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
0
:
0
0
:
1
:
0
0
:
1
1
:
0
:
0
0
:
1
1
:
0
:
0
0
:
1
1
:
1
:
0
1
:
0
1
:
1
:
Attenuation
0 dB
-1 dB
:
-14 dB
-15 dB
:
-19 dB
not allowed
0
0
1
1
0
1
0
1
Center Frequency
200Hz
400Hz
600Hz
800Hz
0
1
Loudness Order
First Order
Second Order
TDA7416
20/27
2.3.3 Volume (2)
Note: It is not recommended to use a gain more than 20dB for system performance reason. In general, the max.
gain should be limited by software to the maximum value, which is needed for the system.
2.3.4 Equalizer (3,4,5,6,7,8,9)
MSB
LSB
ATTENUATION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
0
:
0
0
0
:
0
0
0
:
1
1
0
0
:
0
0
0
:
0
1
1
:
1
1
0
0
:
0
0
0
:
1
0
0
:
X
X
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
1
1
1
:
1
0
0
:
1
1
0
0
:
0
0
0
:
1
0
0
:
1
1
0
0
:
0
0
1
:
1
0
0
:
1
1
0
1
:
0
1
0
:
1
0
1
:
0
1
Gain/Attenuation
(+32.0dB)
(+31.5dB)
:
+20.0dB
+19.5dB
+19.0dB
:
+0.5dB
0.0dB
-0.5dB
:
-79.0dB
-79.5dB
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
0
:
0
0
1
1
:
1
1
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
0
:
1
1
1
1
:
0
0
0
1
:
0
1
1
0
:
1
0
Equalizer cut/boost level
-15dB
-14dB
:
-1dB
0dB
0dB
+1dB
:
+14dB
+15dB
0
0
1
1
0
1
0
1
Equalizer Q-Factor
2.2
1.8
1.4
1.0
0
1
Equalizer Center Frequency (only Subaddresses 3,8,9)
62Hz(addr 3)/4kHz(addr 8)/15kHz(addr 9)
100Hz(addr 3)/6.24kHz(addr 8)/16kHz(addr 9)
0
1
DC mode EQ Band 1 (62/100 Hz, Subaddress. 4!)
on
off
21/27
TDA7416
2.3.5 Mixing Programming (10)
2.3.6 SoftMute & HPF2 (11)
Note: It is recommended to set D3(Filter available or not) during initial mute.
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
Mixing
Mute
enable
0
0
1
1
0
1
0
1
Rear Source Selector
BUS'(PD)
AUX
MD
AM/FM
0
1
0
1
Mixing Target
Speaker LF off
Speaker LF on
Speaker RF off
Speaker RF on
0
1
X
X
ZeroCross on HPF2
on
off
0
1
Spectrum Analyzer Detect Point
After EQ
Before EQ
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
SoftMute
On (Mute)
Off
0
0
1
0
1
X
SoftMute Time
Mute time = 0.48ms
Mute time = 0.96ms
Mute time = 123ms
0
1
Secondary High Pass Enable
Filter available
No Filter (Gain)
0
0
0
0
0
0
0
0
1
1
1
0
0
0
0
1
1
1
1
X
X
X
0
0
1
1
0
0
1
1
X
0
1
0
1
0
1
0
1
0
1
0
1
1
Secondary High Pass effect (with ZeroCross)
4 dB
6 dB
8 dB
10 dB
12 dB
14 dB
16 dB
18dB
20dB
22dB
0dB
TDA7416
22/27
2.3.7 Subwoofer Configuration / Spectrum Analyzer / HighPass (12)
2.3.8 Configuration Audioprocessor I (13)
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
0
1
1
0
1
0
1
Subwoofer Filter
off
80Hz
120Hz
160Hz
X
X
0
1
Subwoofer Coupling
AC using SW
In
pin
DC
0
1
Spectrum Analyzer Q-Factor
3.5
1.8
0
1
High Pass Enable
Filter off
Filter on
0
0
1
1
0
1
0
1
High Pass Cut-Off-Frequency
90Hz
135Hz
180Hz
225Hz
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
PD Input Mode
single ended
pseudo differential
0
1
PD Input Gain
-6 dB
0 dB
0
1
SoftStep Volume
off
on
0
0
1
1
0
1
0
1
SoftStep Time
320s
1.28ms
5.12ms
20.4ms
0
1
Loudness
flat
filter ON
0
1
Front AC Speaker
AC coupling (ACin)
DC coupling
0
1
Rear effect
No effect signal
Equalizing signal
23/27
TDA7416
2.3.9 Mixer Level Control (14)
2.3.10Speaker and Subwoofer Level Control (15,16,17,18,19)
MSB
LSB
ATTENUATION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
1
1
1
0
0
:
0
0
:
0
0
X
0
:
0
0
0
0
:
0
0
:
1
1
1
0
:
0
0
0
0
:
0
0
:
0
0
1
0
:
0
0
0
0
:
0
1
:
0
0
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
0
0
0
0
:
1
0
:
1
1
X
1
:
1
0
0
1
:
1
0
:
0
1
X
Gain/Attenuation
+15dB
:
+ 1dB
0dB
0dB
- 1dB
:
-15dB
-16dB
:
-78dB
-79dB
Mute
MSB
LSB
ATTENUATION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
:
0
0
0
0
:
0
:
0
:
1
:
1
:
1
1
0
:
0
0
0
0
:
1
:
1
:
0
:
0
:
0
1
0
:
0
0
1
1
:
0
:
1
:
0
:
1
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
0
0
0
0
:
0
:
0
:
0
:
0
:
1
X
1
:
1
0
0
1
:
0
:
0
:
0
:
0
:
1
X
Gain/Attenuation
+15dB
:
+ 1dB
0dB
0dB
- 1dB
:
-16dB
:
-32dB
:
-48dB
:
-64dB
-79dB
Mute
0
1
SoftStep On/Off
On
Off
TDA7416
24/27
2.3.11Testing Audioprocessor (20)
Note: This byte is used for testing or evaluation purposes only and must not set to other values than "11111110"
in the application!
MSB
LSB
FUNCTION
D
7
D
6
D
5
D
4
D
3
D
2
D
1
D
0
0
1
Audioprocessor Testmode
off
on
0
1
0
1
0
1
X
0
1
X
X
X
0
0
0
0
0
0
0
1
1
1
1
1
0
0
0
0
1
1
1
0
0
0
1
1
0
0
1
1
0
0
1
0
0
1
0
1
Test-Multiplexer
Spectrum Analyzer Filter 62Hz
Spectrum Analyzer Filter 157Hz
Spectrum Analyzer Filter 396Hz
Spectrum Analyzer Filter 1kHz
Spectrum Analyzer Filter 2.51kHz
Spectrum Analyzer Filter 6.34kHz
Spectrum Analyzer Filter 16kHz
Switch-Ron measurement setup (Level input)
not used
200kHz Oscillator
NB-Hold
internal Reference
0
1
Clock
external
internal
0
1
AZ Function
off
on
0
1
SC-Clock
Fast Mode
Normal Mode
25/27
TDA7416
Figure 17. Application Diagram
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
IN2L
IN 3R
IN 3L
IN 4R
IN4L
A CoutSW
A CoutR
A CoutL
VREFout
IN 2R
IN 1L+
IN !-
IN 1R+
MIX
SDA
SCL
SACLK
SMute SAOut
SWOut
OutRR
OutRF
OutLR
OutLF
FI LOR A C2OutR
AC2I nR
FI LOL
AC2OutL
AC2I nL
+VS1
-9
TDA7416
26/27
TQFP44 (10 x 10)
DIM.
mm
inch
MIN.
TYP.
MAX.
MIN.
TYP.
MAX.
A
1.60
0.063
A1
0.05
0.15
0.002
0.006
A2
1.35
1.40
1.45
0.053
0.055
0.057
B
0.30
0.37
0.45
0.012
0.014
0.018
C
0.09
0.20
0.004
0.008
D
12.00
0.472
D1
10.00
0.394
D3
8.00
0.315
e
0.80
0.031
E
12.00
0.472
E1
10.00
0.394
E3
8.00
0.315
L
0.45
0.60
0.75
0.018
0.024
0.030
L1
1.00
0.039
K
0
(min.), 3.5(typ.), 7
(max.)
A
A2
A1
B
Seating Plane
C
11
12
22
23
33
34
44
E1
E
D1
D
e
1
K
B
TQFP4410
L
0.10mm
.004
OUTLINE AND
MECHANICAL DATA
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted
by implication or otherwise under any patent or patent rights of STMicroelectronics. Specifications mentioned in this publication are subject
to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products are not
authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics.
All other names are the property of their respective owners
2003 STMicroelectronics - All rights reserved
STMicroelectronics GROUP OF COMPANIES
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27/27
TDA7416
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